Fix CMake mips32 build with DSPR2 enabled.
- Add aom_scale dspr2 sources to the correct target (aom).
- Fix an inverted high bit depth condition.
- Remove claims that dspr2 variants of av1_iht16x16_256_add_dspr2,
av1_iht8x8_64_add_dspr2, av1_iht4x4_16_add_dspr2 from
av1_rtcd_defs.pl exist in low bit depth configs.
Change-Id: Ibdd42e475b81c2491f02ba10ca0d461f7ff15bc5
diff --git a/aom_scale/aom_scale.cmake b/aom_scale/aom_scale.cmake
index b52fd83..1c00b59 100644
--- a/aom_scale/aom_scale.cmake
+++ b/aom_scale/aom_scale.cmake
@@ -30,7 +30,7 @@
if (HAVE_DSPR2)
add_intrinsics_object_library("" "dspr2" "aom_scale"
- "AOM_SCALE_INTRIN_DSPR2" "aom_scale")
+ "AOM_SCALE_INTRIN_DSPR2" "aom")
endif ()
set(AOM_LIB_TARGETS ${AOM_LIB_TARGETS} aom_scale PARENT_SCOPE)
diff --git a/av1/av1.cmake b/av1/av1.cmake
index 26344c1..3630b29 100644
--- a/av1/av1.cmake
+++ b/av1/av1.cmake
@@ -171,11 +171,6 @@
"${AOM_ROOT}/av1/common/x86/highbd_inv_txfm_avx2.c"
"${AOM_ROOT}/av1/common/x86/hybrid_inv_txfm_avx2.c")
-set(AOM_AV1_COMMON_INTRIN_DSPR2
- "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans16_dspr2.c"
- "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans4_dspr2.c"
- "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans8_dspr2.c")
-
set(AOM_AV1_COMMON_INTRIN_MSA
"${AOM_ROOT}/av1/common/mips/msa/av1_idct16x16_msa.c"
"${AOM_ROOT}/av1/common/mips/msa/av1_idct4x4_msa.c"
@@ -224,6 +219,12 @@
${AOM_AV1_COMMON_INTRIN_SSE4_1}
"${AOM_ROOT}/av1/common/x86/av1_highbd_convolve_sse4.c")
else ()
+ set(AOM_AV1_COMMON_INTRIN_DSPR2
+ ${AOM_AV1_COMMON_INTRIN_DSPR2}
+ "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans16_dspr2.c"
+ "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans4_dspr2.c"
+ "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans8_dspr2.c")
+
set(AOM_AV1_COMMON_INTRIN_NEON
${AOM_AV1_COMMON_INTRIN_NEON}
"${AOM_ROOT}/av1/encoder/arm/neon/dct_neon.c"
diff --git a/av1/common/av1_rtcd_defs.pl b/av1/common/av1_rtcd_defs.pl
index eb90586..5230aa6 100755
--- a/av1/common/av1_rtcd_defs.pl
+++ b/av1/common/av1_rtcd_defs.pl
@@ -105,7 +105,7 @@
{
add_proto qw/void av1_iht4x4_16_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, const struct txfm_param *param";
if (aom_config("CONFIG_DAALA_DCT4") ne "yes") {
- specialize qw/av1_iht4x4_16_add sse2 neon dspr2/;
+ specialize qw/av1_iht4x4_16_add sse2 neon/;
}
add_proto qw/void av1_iht4x8_32_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, const struct txfm_param *param";
@@ -136,12 +136,12 @@
add_proto qw/void av1_iht8x8_64_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride, const struct txfm_param *param";
if (aom_config("CONFIG_DAALA_DCT8") ne "yes") {
- specialize qw/av1_iht8x8_64_add sse2 neon dspr2/;
+ specialize qw/av1_iht8x8_64_add sse2 neon/;
}
add_proto qw/void av1_iht16x16_256_add/, "const tran_low_t *input, uint8_t *output, int pitch, const struct txfm_param *param";
if (aom_config("CONFIG_DAALA_DCT16") ne "yes") {
- specialize qw/av1_iht16x16_256_add sse2 avx2 dspr2/;
+ specialize qw/av1_iht16x16_256_add sse2 avx2/;
}
add_proto qw/void av1_iht32x32_1024_add/, "const tran_low_t *input, uint8_t *output, int pitch, const struct txfm_param *param";
diff --git a/av1/common/mips/dspr2/av1_itrans16_dspr2.c b/av1/common/mips/dspr2/av1_itrans16_dspr2.c
index 1b33431..8319858 100644
--- a/av1/common/mips/dspr2/av1_itrans16_dspr2.c
+++ b/av1/common/mips/dspr2/av1_itrans16_dspr2.c
@@ -20,7 +20,7 @@
#include "aom_dsp/txfm_common.h"
#include "aom_ports/mem.h"
-#if HAVE_DSPR2
+#if HAVE_DSPR2 && CONFIG_HIGHBITDEPTH
void av1_iht16x16_256_add_dspr2(const int16_t *input, uint8_t *dest, int pitch,
TxfmParam *txfm_param) {
int i, j;
@@ -94,4 +94,4 @@
default: printf("av1_short_iht16x16_add_dspr2 : Invalid tx_type\n"); break;
}
}
-#endif // #if HAVE_DSPR2
+#endif // #if HAVE_DSPR2 && CONFIG_HIGHBITDEPTH
diff --git a/av1/common/mips/dspr2/av1_itrans4_dspr2.c b/av1/common/mips/dspr2/av1_itrans4_dspr2.c
index d9da3a1..542f2c7 100644
--- a/av1/common/mips/dspr2/av1_itrans4_dspr2.c
+++ b/av1/common/mips/dspr2/av1_itrans4_dspr2.c
@@ -20,7 +20,7 @@
#include "aom_dsp/txfm_common.h"
#include "aom_ports/mem.h"
-#if HAVE_DSPR2
+#if HAVE_DSPR2 && CONFIG_HIGHBITDEPTH
void av1_iht4x4_16_add_dspr2(const int16_t *input, uint8_t *dest,
int dest_stride, TxfmParam *txfm_param) {
int i, j;
@@ -88,4 +88,4 @@
default: printf("av1_short_iht4x4_add_dspr2 : Invalid tx_type\n"); break;
}
}
-#endif // #if HAVE_DSPR2
+#endif // #if HAVE_DSPR2 && CONFIG_HIGHBITDEPTH
diff --git a/av1/common/mips/dspr2/av1_itrans8_dspr2.c b/av1/common/mips/dspr2/av1_itrans8_dspr2.c
index f62d5fa..bd18c24 100644
--- a/av1/common/mips/dspr2/av1_itrans8_dspr2.c
+++ b/av1/common/mips/dspr2/av1_itrans8_dspr2.c
@@ -20,7 +20,7 @@
#include "aom_dsp/txfm_common.h"
#include "aom_ports/mem.h"
-#if HAVE_DSPR2
+#if HAVE_DSPR2 && CONFIG_HIGHBITDEPTH
void av1_iht8x8_64_add_dspr2(const int16_t *input, uint8_t *dest,
int dest_stride, TxfmParam *txfm_param) {
int i, j;
@@ -83,4 +83,4 @@
default: printf("av1_short_iht8x8_add_dspr2 : Invalid tx_type\n"); break;
}
}
-#endif // #if HAVE_DSPR2
+#endif // #if HAVE_DSPR2 && CONFIG_HIGHBITDEPTH
