Snap for 5988121 from a41ac98b1d170be965813732b0de2e9a9206ada5 to qt-aml-networking-release

Change-Id: I414d9c17376796dcdd35e064b247b4d5483e2976
diff --git a/Android.bp b/Android.bp
new file mode 100644
index 0000000..3cbbf14
--- /dev/null
+++ b/Android.bp
@@ -0,0 +1,33 @@
+cc_test {
+    name: "gem_blt",
+    srcs: [
+        "benchmarks/gem_blt.c",
+        "lib/drmtest.c",
+        "lib/igt_aux.c",
+        "lib/igt_core.c",
+        "lib/igt_debugfs.c",
+        "lib/igt_dummyload.c",
+        "lib/igt_kmod.c",
+        "lib/igt_sysfs.c",
+        "lib/ioctl_wrappers.c",
+        "lib/i915/gem_mman.c",
+    ],
+    cflags: [
+        "-Wall",
+        "-Werror",
+        "-Wno-missing-field-initializers",
+        "-Wno-unused-parameter",
+        "-Wno-unused-variable",
+        "-DHAVE_GETTID",
+        "-DHAVE_LIBGEN_H",
+        "-DHAVE_MEMFD_CREATE",
+    ],
+    local_include_dirs: [
+        "lib",
+        "lib/stubs/drm",
+        "prebuilt-intermediates",
+    ],
+    static_libs: ["libelf", "libkmod"],
+    shared_libs: ["libdrm", "libunwind"],
+    stl: "none",
+}
diff --git a/OWNERS b/OWNERS
index a941078..0cd5bb9 100644
--- a/OWNERS
+++ b/OWNERS
@@ -1 +1,2 @@
-astrachan@google.com
+adelva@google.com
+spyffe@google.com
diff --git a/lib/igt_aux.c b/lib/igt_aux.c
index 578f857..0ade7ac 100644
--- a/lib/igt_aux.c
+++ b/lib/igt_aux.c
@@ -51,8 +51,10 @@
 #include <assert.h>
 #include <grp.h>
 
+#ifndef ANDROID
 #include <proc/readproc.h>
 #include <libudev.h>
+#endif
 
 #include "drmtest.h"
 #include "i915_drm.h"
@@ -428,6 +430,8 @@
 	igt_stop_helper(&shrink_helper);
 }
 
+#ifndef ANDROID
+
 static void show_kernel_stack(pid_t pid)
 {
 	char buf[80], *str;
@@ -526,6 +530,7 @@
 {
 	igt_stop_helper(&hang_detector);
 }
+#endif
 
 /**
  * igt_check_boolean_env_var:
@@ -1262,6 +1267,8 @@
 	igt_set_module_param(name, str);
 }
 
+#ifndef ANDROID
+
 /**
  * igt_is_process_running:
  * @comm: Name of process in the form found in /proc/pid/comm (limited to 15
@@ -1388,7 +1395,6 @@
 	igt_info("\n");
 }
 
-
 static void
 igt_show_stat_header(void)
 {
@@ -1545,6 +1551,7 @@
 
 	free(sanitized);
 }
+#endif
 
 static struct igt_siglatency {
 	timer_t timer;
diff --git a/lib/igt_core.c b/lib/igt_core.c
index 1cbb09f..20115f8 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1414,6 +1414,8 @@
 	__write_stderr(str, strlen(str));
 }
 
+#ifndef ANDROID
+
 static void print_backtrace(void)
 {
 	unw_cursor_t cursor;
@@ -1648,6 +1650,8 @@
 	}
 }
 
+#endif
+
 void __igt_fail_assert(const char *domain, const char *file, const int line,
 		       const char *func, const char *assertion,
 		       const char *f, ...)
@@ -1669,7 +1673,9 @@
 		va_end(args);
 	}
 
+#ifndef ANDROID
 	print_backtrace();
+#endif
 
 	if (running_under_gdb())
 		abort();
@@ -2164,7 +2170,9 @@
 				       handled_signals[i].name_len);
 			write_stderr(".\n");
 
+#ifndef ANDROID
 			print_backtrace_sig_safe();
+#endif
 		}
 
 		if (crash_signal(sig)) {
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 2bd57f4..e3176ac 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -34,7 +34,6 @@
 #define BIT(x) (1ul <<(x))
 
 struct pci_device *intel_get_pci_device(void);
-uint32_t intel_get_drm_devid(int fd);
 
 struct intel_device_info {
 	unsigned gen;
@@ -77,7 +76,14 @@
 
 const struct intel_device_info *intel_get_device_info(uint16_t devid) __attribute__((pure));
 
+#ifdef ANDROID
+static inline uint32_t intel_get_drm_devid(int __attribute__((unused)) fd) { return 0U; }
+static inline unsigned intel_gen(uint16_t __attribute__((unused)) devid) { return false; }
+#else
+uint32_t intel_get_drm_devid(int fd);
 unsigned intel_gen(uint16_t devid) __attribute__((pure));
+#endif
+
 unsigned intel_gt(uint16_t devid) __attribute__((pure));
 
 extern enum pch_type intel_pch;
diff --git a/prebuilt-intermediates/cairo.h b/prebuilt-intermediates/cairo.h
new file mode 100644
index 0000000..86bcb82
--- /dev/null
+++ b/prebuilt-intermediates/cairo.h
@@ -0,0 +1,3 @@
+#pragma once
+typedef struct _cairo_surface cairo_surface_t;
+typedef struct _cairo cairo_t;
diff --git a/prebuilt-intermediates/glib.h b/prebuilt-intermediates/glib.h
new file mode 100644
index 0000000..9cd1928
--- /dev/null
+++ b/prebuilt-intermediates/glib.h
@@ -0,0 +1,18 @@
+#pragma once
+
+#define G_KEY_FILE_NONE 0
+
+typedef void GError;
+typedef void GKeyFile;
+
+static inline void g_clear_error(GError *error) { }
+static inline void g_error_free(GError *error) { }
+static inline char *g_get_home_dir(void) { return "/data/local/tmp"; }
+static inline void g_key_file_free(GKeyFile *file) { }
+static inline GKeyFile *g_key_file_new(void) { return NULL; }
+static inline int g_key_file_get_integer(GKeyFile *key_file,
+    const char *group_name, const char *key, GError **error) { return 0; }
+static inline char *g_key_file_get_string(GKeyFile *key_file,
+    const char *group_name, const char *key, GError **error) { return NULL; }
+static inline bool g_key_file_load_from_file(GKeyFile *key_file,
+    const char *file, int flags, GError **error) { return false; }
diff --git a/prebuilt-intermediates/pciaccess.h b/prebuilt-intermediates/pciaccess.h
new file mode 100644
index 0000000..13f205a
--- /dev/null
+++ b/prebuilt-intermediates/pciaccess.h
@@ -0,0 +1,28 @@
+#pragma once
+typedef uint64_t pciaddr_t;
+struct pci_mem_region {
+    void *memory;
+    pciaddr_t bus_addr;
+    pciaddr_t base_addr;
+    pciaddr_t size;
+    unsigned is_IO:1;
+    unsigned is_prefetchable:1;
+    unsigned is_64:1;
+};
+struct pci_device {
+    uint16_t domain;
+    uint8_t bus;
+    uint8_t dev;
+    uint8_t func;
+    uint16_t vendor_id;
+    uint16_t device_id;
+    uint16_t subvendor_id;
+    uint16_t subdevice_id;
+    uint32_t device_class;
+    uint8_t revision;
+    struct pci_mem_region regions[6];
+    pciaddr_t rom_size;
+    int irq;
+    intptr_t user_data;
+    int vgaarb_rsrc;
+};
diff --git a/prebuilt-intermediates/version.h b/prebuilt-intermediates/version.h
new file mode 100644
index 0000000..1969ae6
--- /dev/null
+++ b/prebuilt-intermediates/version.h
@@ -0,0 +1,3 @@
+#pragma once
+#define IGT_GIT_SHA1 "ANDROID"
+#define TARGET_CPU_PLATFORM "x86"