Improve makefiles
Added the use of the $(MAKE) variable to support 'gnumake'.
Fixed an issue with some make compile rule and the -o option.
All targets are removed from the build directory when running 'make clean'.
diff --git a/Makefile b/Makefile
index ea10d3a..a774e0b 100644
--- a/Makefile
+++ b/Makefile
@@ -1,10 +1,10 @@
-all:
+all:
mkdir -p build
- cd gtest; make all
- cd test; make all
- cd examples; make all
+ cd gtest; $(MAKE) all
+ cd test; $(MAKE) all
+ cd examples; $(MAKE) all
clean:
- cd gtest; make clean
- cd test; make clean
- cd examples; make clean
+ cd gtest; $(MAKE) clean
+ cd test; $(MAKE) clean
+ cd examples; $(MAKE) clean
diff --git a/examples/Makefile b/examples/Makefile
index c49de2b..f352de3 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -1,7 +1,7 @@
all:
- cd embedded_ui; make all
- cd driver_testing; make all
+ cd embedded_ui; $(MAKE) all
+ cd driver_testing; $(MAKE) all
clean:
- cd embedded_ui; make clean
- cd driver_testing; make clean
+ cd embedded_ui; $(MAKE) clean
+ cd driver_testing; $(MAKE) clean
diff --git a/examples/driver_testing/Makefile b/examples/driver_testing/Makefile
index 108cb32..b636a01 100644
--- a/examples/driver_testing/Makefile
+++ b/examples/driver_testing/Makefile
@@ -30,10 +30,8 @@
@echo " rm -f *~"
rm -f *~
@echo "Removing programs"
- @echo " rm -f "$(C_PROGNAME)
- rm -f $(C_PROGNAME)
- @echo " rm -f "$(CPP_PROGNAME) $(TEMPLATE_PROGNAME)
- rm -f $(CPP_PROGNAME) $(TEMPLATE_PROGNAME)
+ @echo " rm -f $(CPP_PROGNAME_NOFFF) $(CPP_PROGNAME_FFF) $(TEMPLATE_PROGNAME)"
+ rm -f $(CPP_PROGNAME_NOFFF) $(CPP_PROGNAME_FFF) $(TEMPLATE_PROGNAME)
$(BUILD_DIR)/%.o: %.c
diff --git a/gtest/Makefile b/gtest/Makefile
index eb7b8f4..6593c0e 100644
--- a/gtest/Makefile
+++ b/gtest/Makefile
@@ -10,7 +10,7 @@
$(BUILD_DIR)/%.o: %.cc
@echo 'Building file: $<'
@echo 'Invoking: GCC C++ Compiler'
- g++ -I../ -O0 -g3 -Wall -c -o"$@" "$<"
+ g++ -I../ -O0 -g3 -Wall -c -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
diff --git a/test/Makefile b/test/Makefile
index 67407e6..76fc8fc 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -32,14 +32,14 @@
$(BUILD_DIR)/%.o: %.cpp
@echo 'Building file: $<'
@echo 'Invoking: GCC C++ Compiler'
- g++ -I../ -O0 -g3 -Wall -c -o"$@" "$<"
+ g++ -I../ -O0 -g3 -Wall -c -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
$(BUILD_DIR)/%.o: %.c
@echo 'Building file: $<'
@echo 'Invoking: GCC C Compiler'
- gcc -I../ -O0 -g3 -Wall -std=c99 -c -o"$@" "$<"
+ gcc -I../ -O0 -g3 -Wall -std=c99 -c -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
@@ -75,6 +75,7 @@
# Other Targets
clean:
- -$(RM) $(FFF_TEST_CPP_OBJS) $(FFF_TEST_GLOBAL_C_OBJS) $(FFF_TEST_C_OBJS) $(FFF_TEST_CPP_TARGET) $(FFF_TEST_C_TARGET) $(FFF_TEST_GLOBAL_C_TARGET)
+ -$(RM) $(FFF_TEST_CPP_OBJS) $(FFF_TEST_GLOBAL_C_OBJS) $(FFF_TEST_C_OBJS) \
+ $(FFF_TEST_CPP_TARGET) $(FFF_TEST_C_TARGET) $(FFF_TEST_GLOBAL_CPP_TARGET) $(FFF_TEST_GLOBAL_C_TARGET)
-@echo ' '
