Fix cache-related examples in the README
diff --git a/README.md b/README.md
index 829a64c..89f4cb8 100644
--- a/README.md
+++ b/README.md
@@ -44,7 +44,7 @@
Get the size of level 1 data cache on the fastest core in the processor (e.g. big core in big.LITTLE ARM systems):
```c
cpuinfo_initialize();
-const size_t l1_size = cpuinfo_get_processor(0)->l1d->size;
+const size_t l1_size = cpuinfo_get_processor(0)->cache.l1d->size;
```
Pin thread to cores sharing L2 cache with the current core (Linux or Android)
@@ -52,7 +52,7 @@
cpuinfo_initialize();
cpu_set_t cpu_set;
CPU_ZERO(&cpu_set);
-const struct cpuinfo_cache* current_l2 = cpuinfo_get_current_processor()->l2;
+const struct cpuinfo_cache* current_l2 = cpuinfo_get_current_processor()->cache.l2;
for (uint32_t i = 0; i < current_l2->processor_count; i++) {
CPU_SET(cpuinfo_get_processor(current_l2->processor_start + i).linux_id, &cpu_set);
}
