commit 1d6ba6139c4717271eaf89383891bfb36f3abfc0
author Guillaume Chatelet <chatelet.guillaume@gmail.com> Thu Feb 08 16:34:15 2018 +0100
committer GitHub <noreply@github.com> Thu Feb 08 16:34:15 2018 +0100
tree 829415ee3a0dbfdb2fd6880277fd96f57d8bd4b8
parent 338484f6f2176c3d8ede0ed2f3fbd6cf1eb0274c
parent efcc49a49368e6e97d4b244543c98b7e01574cc7

Merge pull request #5 from bsurmanski/patch-1

Fix spelling mistake for 'Cannon Lake'

include/cpuinfo_x86.h

diff --git a/include/cpuinfo_x86.h b/include/cpuinfo_x86.h
index 43675c1..4e1bcbd 100644
--- a/include/cpuinfo_x86.h
+++ b/include/cpuinfo_x86.h
@@ -25,7 +25,7 @@
   int erms : 1;
   int f16c : 1;
   int fma3 : 1;
-  int vpclmulqdq : 1;
+  int pclmulqdq : 1;
   int bmi1 : 1;
   int bmi2 : 1;
 
@@ -110,7 +110,7 @@
   X86_ERMS,
   X86_F16C,
   X86_FMA3,
-  X86_VPCLMULQDQ,
+  X86_PCLMULQDQ,
   X86_BMI1,
   X86_BMI2,
   X86_SSSE3,

src/cpuinfo_x86.c

diff --git a/src/cpuinfo_x86.c b/src/cpuinfo_x86.c
index 3238ab1..d4eb2d5 100644
--- a/src/cpuinfo_x86.c
+++ b/src/cpuinfo_x86.c
@@ -100,7 +100,7 @@
   features->f16c = IsBitSet(leaf_1.ecx, 29);
   features->bmi1 = IsBitSet(leaf_7.ebx, 3);
   features->bmi2 = IsBitSet(leaf_7.ebx, 8);
-  features->vpclmulqdq = IsBitSet(leaf_7.ecx, 10);
+  features->pclmulqdq = IsBitSet(leaf_7.ecx, 10);
 
   if (have_sse_os_support) {
     features->ssse3 = IsBitSet(leaf_1.ecx, 9);
@@ -267,8 +267,8 @@
       return features->f16c;
     case X86_FMA3:
       return features->fma3;
-    case X86_VPCLMULQDQ:
-      return features->vpclmulqdq;
+    case X86_PCLMULQDQ:
+      return features->pclmulqdq;
     case X86_BMI1:
       return features->bmi1;
     case X86_BMI2:
@@ -329,8 +329,8 @@
       return "f16c";
     case X86_FMA3:
       return "fma3";
-    case X86_VPCLMULQDQ:
-      return "vpclmulqdq";
+    case X86_PCLMULQDQ:
+      return "pclmulqdq";
     case X86_BMI1:
       return "bmi1";
     case X86_BMI2: