commit ab79f4120d479600c25a7cf82997385dccfb48f7
author Ed Schouten <ed@80386.nl> Fri May 31 19:18:14 2013 +0000
committer Ed Schouten <ed@80386.nl> Fri May 31 19:18:14 2013 +0000
tree 37b8217e7a5dd3cd276f9362b1f59c14b6054302
parent 708eb71b3d677ffb8fb899b386062d92ecdcc675

Slightly extend matching for atomic loads.

Also add the "=" to the matched pattern, to see whether we actually save
the loaded value.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@183029 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/atomics-inlining.c

diff --git a/test/CodeGen/atomics-inlining.c b/test/CodeGen/atomics-inlining.c
index 9b0d413..3ef96e5 100644
--- a/test/CodeGen/atomics-inlining.c
+++ b/test/CodeGen/atomics-inlining.c
@@ -24,26 +24,26 @@
   (void)__atomic_load(&ll1, &ll2, memory_order_seq_cst);
 
 // PPC32: define void @test1
-// PPC32: load atomic i8* @c1 seq_cst
-// PPC32: load atomic i16* @s1 seq_cst
-// PPC32: load atomic i32* @i1 seq_cst
+// PPC32: = load atomic i8* @c1 seq_cst
+// PPC32: = load atomic i16* @s1 seq_cst
+// PPC32: = load atomic i32* @i1 seq_cst
 // PPC32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*)
 
 // PPC64: define void @test1
-// PPC64: load atomic i8* @c1 seq_cst
-// PPC64: load atomic i16* @s1 seq_cst
-// PPC64: load atomic i32* @i1 seq_cst
-// PPC64: load atomic i64* @ll1 seq_cst
+// PPC64: = load atomic i8* @c1 seq_cst
+// PPC64: = load atomic i16* @s1 seq_cst
+// PPC64: = load atomic i32* @i1 seq_cst
+// PPC64: = load atomic i64* @ll1 seq_cst
 
 // MIPS32: define void @test1
-// MIPS32: load atomic i8* @c1 seq_cst
-// MIPS32: load atomic i16* @s1 seq_cst
-// MIPS32: load atomic i32* @i1 seq_cst
+// MIPS32: = load atomic i8* @c1 seq_cst
+// MIPS32: = load atomic i16* @s1 seq_cst
+// MIPS32: = load atomic i32* @i1 seq_cst
 // MIPS32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*)
 
 // MIPS64: define void @test1
-// MIPS64: load atomic i8* @c1 seq_cst
-// MIPS64: load atomic i16* @s1 seq_cst
-// MIPS64: load atomic i32* @i1 seq_cst
-// MIPS64: load atomic i64* @ll1 seq_cst
+// MIPS64: = load atomic i8* @c1 seq_cst
+// MIPS64: = load atomic i16* @s1 seq_cst
+// MIPS64: = load atomic i32* @i1 seq_cst
+// MIPS64: = load atomic i64* @ll1 seq_cst
 }