blob: cc46f12535910124951eea730d04b32f8c82c3c4 [file] [log] [blame]
# Copyright 2021 Google LLC
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neon_mul8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neon_mul8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neonv8_mul8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neonv8_mul8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neon_mla8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neon_mla8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neonv8_mla8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neonv8_mla8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__sse2_mul16
init: xnn_init_qs8_minmax_sse2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__sse2_mul16
init: xnn_init_qs8_minmax_sse2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__sse2_mul16
init: xnn_init_qs8_minmax_sse2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__sse41_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__sse41_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__sse41_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__avx_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__avx_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx2_mul16
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__avx2_mul16
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__sse41_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__sse41_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__sse41_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__avx_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__avx_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__xop_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__xop_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__xop_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__avx512skx_mul32
init: xnn_init_qs8_minmax_avx512_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x9__avx512skx_mul32
init: xnn_init_qs8_minmax_avx512_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x9__wasmsimd_mul16
init: xnn_init_qs8_minmax_wasmsimd_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x9__wasmsimd_mul16
init: xnn_init_qs8_minmax_wasmsimd_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x9__wasmsimd_mul16
init: xnn_init_qs8_minmax_wasmsimd_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up1x9__scalar_lrint
init: xnn_init_qs8_minmax_scalar_lrint_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up2x9__scalar_lrint
init: xnn_init_qs8_minmax_scalar_lrint_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up4x9__scalar_lrint
init: xnn_init_qs8_minmax_scalar_lrint_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up1x9__scalar_magic
init: xnn_init_qs8_minmax_scalar_magic_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up2x9__scalar_magic
init: xnn_init_qs8_minmax_scalar_magic_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up4x9__scalar_magic
init: xnn_init_qs8_minmax_scalar_magic_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neon_mul8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neon_mul8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neonv8_mul8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neonv8_mul8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neon_mla8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neon_mla8
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neonv8_mla8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neonv8_mla8
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__neon_mul16
init: xnn_init_qs8_minmax_neon_fp32_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__neonv8_mul16
init: xnn_init_qs8_minmax_neon_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__sse2_mul16
init: xnn_init_qs8_minmax_sse2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__sse2_mul16
init: xnn_init_qs8_minmax_sse2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__sse2_mul16
init: xnn_init_qs8_minmax_sse2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__sse41_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__sse41_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__sse41_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__avx_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__avx_mul16
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx2_mul16
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__avx2_mul16
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__sse41_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__sse41_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__sse41_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__avx_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__avx_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__xop_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__xop_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__xop_mul32
init: xnn_init_qs8_minmax_sse4_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__avx2_mul32
init: xnn_init_qs8_minmax_avx2_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__avx512skx_mul32
init: xnn_init_qs8_minmax_avx512_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up32x25__avx512skx_mul32
init: xnn_init_qs8_minmax_avx512_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up8x25__wasmsimd_mul16
init: xnn_init_qs8_minmax_wasmsimd_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up16x25__wasmsimd_mul16
init: xnn_init_qs8_minmax_wasmsimd_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up24x25__wasmsimd_mul16
init: xnn_init_qs8_minmax_wasmsimd_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up1x25__scalar_lrint
init: xnn_init_qs8_minmax_scalar_lrint_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up2x25__scalar_lrint
init: xnn_init_qs8_minmax_scalar_lrint_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up4x25__scalar_lrint
init: xnn_init_qs8_minmax_scalar_lrint_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up1x25__scalar_magic
init: xnn_init_qs8_minmax_scalar_magic_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up2x25__scalar_magic
init: xnn_init_qs8_minmax_scalar_magic_params
- name: xnn_qc8_dwconv_minmax_fp32_ukernel_up4x25__scalar_magic
init: xnn_init_qs8_minmax_scalar_magic_params