Add .clang-format and reformat jit related files
Using `/usr/bin/clang-format src/jit/aarch32-assembler.cc src/xnnpack/aarch32-assembler.h test/aarch32-assembler.cc --style=file -i`
And a manual fix for EXPECT_INSTR in test/aarch32-assembler.cc
PiperOrigin-RevId: 415129333
diff --git a/google3/third_party/XNNPACK/.clang-format b/google3/third_party/XNNPACK/.clang-format
new file mode 100644
index 0000000..533174b
--- /dev/null
+++ b/google3/third_party/XNNPACK/.clang-format
@@ -0,0 +1,4 @@
+BasedOnStyle: Google
+AllowShortFunctionsOnASingleLine: Inline
+PackConstructorInitializers: Never
+ColumnLimit: 120
diff --git a/src/jit/aarch32-assembler.cc b/src/jit/aarch32-assembler.cc
index 17c3422..e81b4d5 100644
--- a/src/jit/aarch32-assembler.cc
+++ b/src/jit/aarch32-assembler.cc
@@ -34,8 +34,7 @@
return r.d() << single_bit_pos | r.vd() << four_bits_pos | regs.length;
}
-uint32_t encode(DRegisterList regs, uint32_t single_bit_pos,
- uint32_t four_bits_pos) {
+uint32_t encode(DRegisterList regs, uint32_t single_bit_pos, uint32_t four_bits_pos) {
const DRegister r = regs.start;
return r.d() << single_bit_pos | r.vd() << four_bits_pos | regs.length * 2;
}
@@ -47,7 +46,9 @@
error_ = Error::kNoError;
}
-Assembler::~Assembler() { delete[] buffer_; }
+Assembler::~Assembler() {
+ delete[] buffer_;
+}
Assembler& Assembler::emit32(uint32_t value) {
if (error_ != Error::kNoError) {
@@ -128,8 +129,8 @@
return *this;
}
- return emit32(kAL | 0x41 << 20 | op.p() << 24 | op.u() << 23 | op.w() << 21 |
- op.base().code << 16 | rt.code << 12 | offset);
+ return emit32(kAL | 0x41 << 20 | op.p() << 24 | op.u() << 23 | op.w() << 21 | op.base().code << 16 | rt.code << 12 |
+ offset);
}
Assembler& Assembler::mov(CoreRegister rd, CoreRegister rm) {
@@ -171,13 +172,11 @@
}
Assembler& Assembler::vldm(CoreRegister rn, SRegisterList regs, bool wb) {
- return emit32(kAL | 0x0C900A00 | wb << 21 | rn.code << 16 |
- encode(regs, 22, 12));
+ return emit32(kAL | 0x0C900A00 | wb << 21 | rn.code << 16 | encode(regs, 22, 12));
}
Assembler& Assembler::vldm(CoreRegister rn, DRegisterList regs, bool wb) {
- return emit32(kAL | 0x0C900B00 | wb << 21 | rn.code << 16 |
- encode(regs, 22, 12));
+ return emit32(kAL | 0x0C900B00 | wb << 21 | rn.code << 16 | encode(regs, 22, 12));
}
Assembler& Assembler::vldr(DRegister dd, MemOperand op) {
@@ -187,8 +186,7 @@
return *this;
}
- return emit32(kAL | 0x0D100B00 | op.u() << 23 | encode(dd, 22, 12) |
- op.base().code << 16 | op.offset() >> 2);
+ return emit32(kAL | 0x0D100B00 | op.u() << 23 | encode(dd, 22, 12) | op.base().code << 16 | op.offset() >> 2);
}
Assembler& Assembler::vmov(SRegister sd, SRegister sm) {
@@ -196,18 +194,15 @@
}
Assembler& Assembler::vmov(DRegister dm, CoreRegister rt, CoreRegister rt2) {
- return emit32(kAL | 0x0C400B10 | rt2.code << 16 | rt.code << 12 |
- encode(dm, 5, 0));
+ return emit32(kAL | 0x0C400B10 | rt2.code << 16 | rt.code << 12 | encode(dm, 5, 0));
}
Assembler& Assembler::vmov(DRegister dd, DRegister dm) {
- return emit32(0xF2600110 | encode(dd, 22, 12) | encode(dm, 7, 16) |
- encode(dm, 5, 0));
+ return emit32(0xF2600110 | encode(dd, 22, 12) | encode(dm, 7, 16) | encode(dm, 5, 0));
}
Assembler& Assembler::vmov(QRegister qd, QRegister qm) {
- return emit32(0xF2200150 | encode(qd, 22, 12) | encode(qm, 7, 16) |
- encode(qm, 5, 0));
+ return emit32(0xF2200150 | encode(qd, 22, 12) | encode(qm, 7, 16) | encode(qm, 5, 0));
}
Assembler& Assembler::vpush(SRegisterList regs) {
diff --git a/src/xnnpack/aarch32-assembler.h b/src/xnnpack/aarch32-assembler.h
index 8c0f3af..2970930 100644
--- a/src/xnnpack/aarch32-assembler.h
+++ b/src/xnnpack/aarch32-assembler.h
@@ -166,7 +166,8 @@
struct ConsecutiveRegisterList {
// End must be >= start.
ConsecutiveRegisterList(RegType s, RegType end)
- : start(s), length(end.code - s.code + 1) {}
+ : start(s),
+ length(end.code - s.code + 1) {}
ConsecutiveRegisterList(RegType start)
: ConsecutiveRegisterList(start, start) {}
@@ -221,10 +222,14 @@
class MemOperand {
public:
MemOperand(CoreRegister rn, int32_t offset)
- : mode_(AddressingMode::kOffset), rn_(rn), offset_(offset) {}
+ : mode_(AddressingMode::kOffset),
+ rn_(rn),
+ offset_(offset) {}
MemOperand(CoreRegister rn, int32_t offset, AddressingMode mode)
- : mode_(mode), rn_(rn), offset_(offset) {}
+ : mode_(mode),
+ rn_(rn),
+ offset_(offset) {}
CoreRegister base() const { return rn_; }
int32_t offset() const { return offset_; }
@@ -243,8 +248,7 @@
};
static inline bool operator==(const MemOperand lhs, const MemOperand rhs) {
- return lhs.mode() == rhs.mode() && lhs.base() == rhs.base() &&
- lhs.offset() == rhs.offset();
+ return lhs.mode() == rhs.mode() && lhs.base() == rhs.base() && lhs.offset() == rhs.offset();
}
static inline MemOperand operator,(CoreRegister r, int32_t offset) {
@@ -326,12 +330,8 @@
// VLDM <Rn>{!}, <list>. {!} is indicated by setting `wb` argument.
Assembler& vldm(CoreRegister rn, SRegisterList regs, bool wb);
Assembler& vldm(CoreRegister rn, DRegisterList regs, bool wb);
- Assembler& vldm(CoreRegister rn, SRegisterList regs) {
- return vldm(rn, regs, false);
- }
- Assembler& vldm(CoreRegister rn, DRegisterList regs) {
- return vldm(rn, regs, false);
- }
+ Assembler& vldm(CoreRegister rn, SRegisterList regs) { return vldm(rn, regs, false); }
+ Assembler& vldm(CoreRegister rn, DRegisterList regs) { return vldm(rn, regs, false); }
Assembler& vldr(DRegister dd, MemOperand op);
// VMOV.F32 <Sd>, <Sm>; encoding A2.
Assembler& vmov(SRegister sd, SRegister sm);
diff --git a/test/aarch32-assembler.cc b/test/aarch32-assembler.cc
index aca0d08..559d9bd 100644
--- a/test/aarch32-assembler.cc
+++ b/test/aarch32-assembler.cc
@@ -4,10 +4,11 @@
#include <gtest/gtest.h>
-#define EXPECT_INSTR(expected, actual) \
- EXPECT_EQ(expected, actual) << "expected = 0x" << std::hex << std::setw(8) \
- << std::setfill('0') << expected << std::endl \
- << " actual = 0x" << actual;
+// clang-format off
+#define EXPECT_INSTR(expected, actual) \
+ EXPECT_EQ(expected, actual) << "expected = 0x" << std::hex << std::setw(8) << std::setfill('0') << expected \
+ << std::endl << " actual = 0x" << actual;
+// clang-format on
#define CHECK_ENCODING(expected, call) \
a.reset(); \
@@ -58,8 +59,7 @@
CHECK_ENCODING(0xEC930A01, a.vldm(r3, {s0}));
CHECK_ENCODING(0xED99FB0E, a.vldr(d15, mem[r9, 56]));
- EXPECT_ERROR(Error::kInvalidOperand,
- a.vldr(d15, MemOperand(r9, 56, AddressingMode::kPostIndexed)));
+ EXPECT_ERROR(Error::kInvalidOperand, a.vldr(d15, MemOperand(r9, 56, AddressingMode::kPostIndexed)));
EXPECT_ERROR(Error::kInvalidOperand, a.vldr(d15, mem[r9, 256]));
CHECK_ENCODING(0xEEB0EA4F, a.vmov(s28, s30));
