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| <title>const-wide</title> |
| <link rel=stylesheet href="opcode.css"> |
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| <body> |
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| <h1>const-wide</h1> |
| |
| <h2>Purpose</h2> |
| |
| <p> |
| Move the given literal value (sign-extended to 64 bits) into the specified |
| register-pair. |
| </p> |
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| <h2>Details</h2> |
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| <table class="instruc"> |
| <thead> |
| <tr> |
| <th>Op & Format</th> |
| <th>Mnemonic / Syntax</th> |
| <th>Arguments</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr> |
| <td>16 21s</td> |
| <td>const-wide/16 vAA, #+BBBB</td> |
| <td><code>A:</code> destination register (8 bits)<br/> |
| <code>B:</code> signed int (16 bits)</td> |
| </tr> |
| <tr> |
| <td>17 31i</td> |
| <td>const-wide/32 vAA, #+BBBBBBBB</td> |
| <td><code>A:</code> destination register (8 bits)<br/> |
| <code>B:</code> signed int (32 bits)</td> |
| </tr> |
| <tr> |
| <td>18 51l</td> |
| <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td> |
| <td><code>A:</code> destination register (8 bits)<br/> |
| <code>B:</code> arbitrary double-width (64-bit) constant</td> |
| </tr> |
| <tr> |
| <td>19 21h</td> |
| <td>const-wide/high16 vAA, #+BBBB000000000000</td> |
| <td><code>A:</code> destination register (8 bits)<br/> |
| <code>B:</code> signed int (16 bits)</td> |
| </tr> |
| </tbody> |
| </table> |
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| <h2>Constraints</h2> |
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| <ul> |
| <li> |
| A must be a valid register index in the current stack frame. |
| </li> |
| </ul> |
| |
| <h2>Behavior</h2> |
| |
| <ul> |
| <li> |
| First, an adjusted value B' is determined as follows: |
| <ul> |
| <li> |
| If we are executing the /high16 variant, then B is left-shifted by 40 |
| bits, that is, B'=B << 0x28 |
| <li> |
| Otherwise, if B is a 16 bit or 32 bit constant, it is sign-extended to |
| 64 bits, that is, B'=sign-extended(B). |
| </li> |
| <li> |
| Otherwise, B'=B. |
| </li> |
| </ul> |
| <li> |
| The immediate value B is moved into the register pair (vA, v(A+1)), that is, |
| <ul> |
| <li> |
| vA' = B << 0x20 |
| </li> |
| <li> |
| v(A+1)' = B & 0xffffffff |
| </li> |
| </ul> |
| </li> |
| <li> |
| If v(A-1) is the lower half of a register pair, v(A-1)' becomes undefined. |
| </li> |
| <li> |
| If v(A+2) is the upper half of a register pair, v(A+2)' becomes undefined. |
| </li> |
| </ul> |
| |
| <h2>Exceptions</h2> |
| |
| <p> |
| None. |
| </p> |
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| </body> |
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