commit c7ad9b2542d5f1a491c9278c998697141ed2582a
author Elliott Hughes <enh@google.com> Wed Apr 28 13:52:02 2010 -0700
committer Elliott Hughes <enh@google.com> Wed Apr 28 14:09:46 2010 -0700
tree 25a3e0a8117db3ea19e241e4d319c6aef09b0fcb
parent c7b38fe8d622f9613ac51faa73cc3aa447ff826a

Don't accidentally convert % into /...

Fix a JIT bug I introduced the other day by not paying attention to the exact
dalvik opcode being optimized.

Change-Id: Ic0518645a5436e2903c2a34ef46d0205f23d571b

vm/compiler/codegen/arm/CodegenDriver.c

diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index ef7de28..c691d15 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1900,9 +1900,12 @@
 
 // Returns true if it added instructions to 'cUnit' to divide 'rlSrc' by 'lit'
 // and store the result in 'rlDest'.
-static bool handleEasyDivide(CompilationUnit *cUnit,
+static bool handleEasyDivide(CompilationUnit *cUnit, OpCode dalvikOpCode,
                              RegLocation rlSrc, RegLocation rlDest, int lit)
 {
+    if (dalvikOpCode != OP_DIV_INT_LIT8 && dalvikOpCode != OP_DIV_INT_LIT16) {
+        return false;
+    }
     if (lit < 2 || !isPowerOfTwo(lit)) {
         return false;
     }
@@ -2050,7 +2053,7 @@
                 genInterpSingleStep(cUnit, mir);
                 return false;
             }
-            if (handleEasyDivide(cUnit, rlSrc, rlDest, lit)) {
+            if (handleEasyDivide(cUnit, dalvikOpCode, rlSrc, rlDest, lit)) {
                 return false;
             }
             dvmCompilerFlushAllRegs(cUnit);   /* Everything to home location */