Stop reporting negative widths.
At one point, returning a negative width for dexopt output was useful.
That stopped being the case a long time ago.
This also removes a bad assert that went into my previous checkin.
Change-Id: I18880c2316f5499a09dc479d271ca70b2a5be259
diff --git a/dexdump/DexDump.c b/dexdump/DexDump.c
index 4fb3878..26bb07b 100644
--- a/dexdump/DexDump.c
+++ b/dexdump/DexDump.c
@@ -1089,7 +1089,7 @@
insnWidth = 4 + ((size * width) + 1) / 2;
} else {
opCode = instr & 0xff;
- insnWidth = dexGetInstrWidthAbs(gInstrInfo.widths, opCode);
+ insnWidth = dexGetInstrWidth(gInstrInfo.widths, opCode);
if (insnWidth == 0) {
fprintf(stderr,
"GLITCH: zero-width instruction at idx=0x%04x\n", insnIdx);
diff --git a/libdex/InstrUtils.c b/libdex/InstrUtils.c
index 6af6e65..5d324b7 100644
--- a/libdex/InstrUtils.c
+++ b/libdex/InstrUtils.c
@@ -25,8 +25,7 @@
/*
* Generate a table that holds the width of all instructions.
*
- * Standard instructions have positive values, optimizer instructions
- * have negative values, unimplemented instructions have a width of zero.
+ * Unimplemented instructions have a width of zero.
*
* I'm doing it with a giant switch statement because it's easier to
* maintain and update than a static table with 256 unadorned integers,
@@ -35,9 +34,6 @@
*
* (To save space in the binary we could generate a static table with a
* command-line utility.)
- *
- * TODO: it doesn't look like we're using the negative values anymore.
- * Consider switching to only positive values.
*/
InstructionWidth* dexCreateInstrWidthTable(void)
{
@@ -288,11 +284,10 @@
break;
/*
- * Optimized instructions. We return negative size values for these
- * to distinguish them.
+ * Optimized instructions.
*/
case OP_RETURN_VOID_BARRIER:
- width = -1;
+ width = 1;
break;
case OP_IGET_QUICK:
case OP_IGET_WIDE_QUICK:
@@ -313,7 +308,7 @@
case OP_SGET_WIDE_VOLATILE:
case OP_SPUT_WIDE_VOLATILE:
case OP_THROW_VERIFICATION_ERROR:
- width = -2;
+ width = 2;
break;
case OP_INVOKE_VIRTUAL_QUICK:
case OP_INVOKE_VIRTUAL_QUICK_RANGE:
@@ -322,7 +317,7 @@
case OP_EXECUTE_INLINE:
case OP_EXECUTE_INLINE_RANGE:
case OP_INVOKE_DIRECT_EMPTY:
- width = -3;
+ width = 3;
break;
/* these should never appear when scanning bytecode */
@@ -1628,7 +1623,7 @@
* works for special OP_NOP entries, including switch statement data tables
* and array data.
*/
-size_t dexGetInstrOrTableWidthAbs(const InstructionWidth* widths,
+size_t dexGetInstrOrTableWidth(const InstructionWidth* widths,
const u2* insns)
{
size_t width;
@@ -1642,7 +1637,7 @@
u4 len = insns[2] | (((u4)insns[3]) << 16);
width = 4 + (elemWidth * len + 1) / 2;
} else {
- width = dexGetInstrWidthAbs(widths, INST_INST(insns[0]));
+ width = dexGetInstrWidth(widths, INST_INST(insns[0]));
}
return width;
}
diff --git a/libdex/InstrUtils.h b/libdex/InstrUtils.h
index bea38d7..940e1e0 100644
--- a/libdex/InstrUtils.h
+++ b/libdex/InstrUtils.h
@@ -108,9 +108,9 @@
} DecodedInstruction;
/*
- * Instruction width, a value in the range -3 to 5.
+ * Instruction width, a value in the range 0 to 5.
*/
-typedef signed char InstructionWidth;
+typedef unsigned char InstructionWidth;
/*
* Instruction flags, used by the verifier and JIT to determine where
@@ -147,16 +147,11 @@
/*
* Return the width of the specified instruction, or 0 if not defined.
*/
-DEX_INLINE size_t dexGetInstrWidthAbs(const InstructionWidth* widths,
+DEX_INLINE size_t dexGetInstrWidth(const InstructionWidth* widths,
OpCode opCode)
{
//assert(/*opCode >= 0 &&*/ opCode < kNumDalvikInstructions);
-
- int val = widths[opCode];
- if (val < 0)
- val = -val;
- /* XXX - the no-compare trick may be a cycle slower on ARM */
- return val;
+ return widths[opCode];
}
/*
@@ -164,7 +159,7 @@
* works for special OP_NOP entries, including switch statement data tables
* and array data.
*/
-size_t dexGetInstrOrTableWidthAbs(const InstructionWidth* widths,
+size_t dexGetInstrOrTableWidth(const InstructionWidth* widths,
const u2* insns);
/*
diff --git a/vm/analysis/CodeVerify.c b/vm/analysis/CodeVerify.c
index 3986aee..790d1d9 100644
--- a/vm/analysis/CodeVerify.c
+++ b/vm/analysis/CodeVerify.c
@@ -2456,8 +2456,6 @@
bool changed = false;
int i;
- assert(dvmInsnIsBranchTarget(insnFlags, nextInsn));
-
for (i = 0; i < insnRegCount + kExtraRegs; i++) {
targetRegs[i] = mergeTypes(targetRegs[i], workRegs[i], &changed);
}
diff --git a/vm/analysis/DexVerify.c b/vm/analysis/DexVerify.c
index dd09859..b35c4ae 100644
--- a/vm/analysis/DexVerify.c
+++ b/vm/analysis/DexVerify.c
@@ -112,8 +112,7 @@
for (i = 0; i < (int) insnCount; /**/) {
- size_t width =
- dexGetInstrOrTableWidthAbs(gDvm.instrInfo.widths, insns);
+ size_t width = dexGetInstrOrTableWidth(gDvm.instrInfo.widths, insns);
if (width == 0) {
LOG_VFY_METH(meth,
"VFY: invalid post-opt instruction (0x%04x)\n", *insns);
diff --git a/vm/analysis/Optimize.c b/vm/analysis/Optimize.c
index 3e43f71..6bc221e 100644
--- a/vm/analysis/Optimize.c
+++ b/vm/analysis/Optimize.c
@@ -299,7 +299,7 @@
}
}
- width = dexGetInstrOrTableWidthAbs(gDvm.instrInfo.widths, insns);
+ width = dexGetInstrOrTableWidth(gDvm.instrInfo.widths, insns);
assert(width > 0);
insns += width;
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index de0d6e6..17c356b 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1283,8 +1283,7 @@
if (isEnter) {
/* Get dPC of next insn */
loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
- dexGetInstrWidthAbs(gDvm.instrInfo.widths,
- OP_MONITOR_ENTER)));
+ dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_ENTER)));
#if defined(WITH_DEADLOCK_PREDICTION)
genDispatchToHandler(cUnit, TEMPLATE_MONITOR_ENTER_DEBUG);
#else
@@ -1298,8 +1297,7 @@
ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondNe, r0, 0);
loadConstant(cUnit, r0,
(int) (cUnit->method->insns + mir->offset +
- dexGetInstrWidthAbs(gDvm.instrInfo.widths,
- OP_MONITOR_EXIT)));
+ dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_EXIT)));
genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
ArmLIR *target = newLIR0(cUnit, kArmPseudoTargetLabel);
target->defMask = ENCODE_ALL;
diff --git a/vm/compiler/codegen/arm/Thumb2/Gen.c b/vm/compiler/codegen/arm/Thumb2/Gen.c
index 051d16d..d689160 100644
--- a/vm/compiler/codegen/arm/Thumb2/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb2/Gen.c
@@ -225,8 +225,7 @@
/* Get dPC of next insn */
loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
- dexGetInstrWidthAbs(gDvm.instrInfo.widths,
- OP_MONITOR_ENTER)));
+ dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_ENTER)));
// Export PC (part 2)
newLIR3(cUnit, kThumb2StrRRI8Predec, r3, rFP,
sizeof(StackSaveArea) -
@@ -290,7 +289,7 @@
ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondNe, r0, 0);
loadConstant(cUnit, r0,
(int) (cUnit->method->insns + mir->offset +
- dexGetInstrWidthAbs(gDvm.instrInfo.widths, OP_MONITOR_EXIT)));
+ dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_EXIT)));
genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
// Resume here
diff --git a/vm/interp/Jit.c b/vm/interp/Jit.c
index 6dab426..1abf68b 100644
--- a/vm/interp/Jit.c
+++ b/vm/interp/Jit.c
@@ -685,8 +685,8 @@
interpState->trace[currTraceRun].frag.isCode = true;
interpState->totalTraceLen++;
- interpState->currRunLen =
- dexGetInstrOrTableWidthAbs(gDvm.instrInfo.widths, moveResultPC);
+ interpState->currRunLen = dexGetInstrOrTableWidth(gDvm.instrInfo.widths,
+ moveResultPC);
}
/*
@@ -752,7 +752,7 @@
LOGD("TraceGen: adding %s", dexGetOpcodeName(decInsn.opCode));
#endif
flags = dexGetInstrFlags(gDvm.instrInfo.flags, decInsn.opCode);
- len = dexGetInstrOrTableWidthAbs(gDvm.instrInfo.widths, lastPC);
+ len = dexGetInstrOrTableWidth(gDvm.instrInfo.widths, lastPC);
offset = lastPC - interpState->method->insns;
assert((unsigned) offset <
dvmGetMethodInsnsSize(interpState->method));
