commit 9d8ae21b54d2fc38163dfe63fbd86c5c9e0ff678
author mikaelpeltier <mikaelpeltier@google.com> Mon Oct 08 14:46:07 2012 +0200
committer Brian Carlstrom <bdc@google.com> Fri May 03 17:59:03 2013 -0700
tree 4a7e6d8ceaaa5903bae0b4b100922d4cc7272865
parent f7e2a54823232a9cc249f799e666547fac0ab27d

Fix bug on register compatibility.

- Bad register usage to compute prefix or suffix expansion.

(cherry picked from commit 5bce02865087b7ec3c6321a1bef9542c18b0f90e)

Change-Id: Ife9b2b07870bbc933f959c194a4a72dfa9507cfb

dx/src/com/android/dx/dex/code/form/Form12x.java

diff --git a/dx/src/com/android/dx/dex/code/form/Form12x.java b/dx/src/com/android/dx/dex/code/form/Form12x.java
index b4d5b4a..a2e88e3 100644
--- a/dx/src/com/android/dx/dex/code/form/Form12x.java
+++ b/dx/src/com/android/dx/dex/code/form/Form12x.java
@@ -112,9 +112,33 @@
     public BitSet compatibleRegs(DalvInsn insn) {
         RegisterSpecList regs = insn.getRegisters();
         BitSet bits = new BitSet(2);
+        int r0 = regs.get(0).getReg();
+        int r1 = regs.get(1).getReg();
 
-        bits.set(0, unsignedFitsInNibble(regs.get(0).getReg()));
-        bits.set(1, unsignedFitsInNibble(regs.get(1).getReg()));
+        switch (regs.size()) {
+          case 2: {
+            bits.set(0, unsignedFitsInNibble(r0));
+            bits.set(1, unsignedFitsInNibble(r1));
+            break;
+          }
+          case 3: {
+            if (r0 != r1) {
+                bits.set(0, false);
+                bits.set(1, false);
+            } else {
+                boolean dstRegComp = unsignedFitsInNibble(r1);
+                bits.set(0, dstRegComp);
+                bits.set(1, dstRegComp);
+            }
+
+            bits.set(2, unsignedFitsInNibble(regs.get(2).getReg()));
+            break;
+          }
+          default: {
+            throw new AssertionError();
+          }
+        }
+
         return bits;
     }