Get rid of the copies of the opcode table pointers.
This inclduded fixing all the accessor functions to refer to the
global ones defined in InstrUtils.[ch] instead of taking separate
"table pointer" arguments.
This did end up adding a few more truly global references to some of
the code paths, particularly when performing dex optimization, so I
went ahead and measured the time to do a cold first-boot both before
and after the change (on real hardware). The times were identical (to
one-second granularity), so I'm reasonably comfortable making this
change.
Change-Id: I604d9f7882bad4245bb11371218d13b06c3a5375
diff --git a/dexdump/DexDump.c b/dexdump/DexDump.c
index 556dbc2..3950a81 100644
--- a/dexdump/DexDump.c
+++ b/dexdump/DexDump.c
@@ -49,8 +49,6 @@
static const char* gProgName = "dexdump";
-static InstructionInfoTables gInstrInfo;
-
typedef enum OutputFormat {
OUTPUT_PLAIN = 0, /* default */
OUTPUT_XML, /* fancy */
@@ -710,7 +708,7 @@
u4 width;
/* TODO: Make the index *always* be in field B, to simplify this code. */
- switch (dexGetInstrFormat(gInstrInfo.formats, pDecInsn->opCode)) {
+ switch (dexGetInstrFormat(pDecInsn->opCode)) {
case kFmt20bc:
case kFmt21c:
case kFmt35c:
@@ -882,7 +880,7 @@
indexBufChars, sizeof(indexBufChars));
}
- switch (dexGetInstrFormat(gInstrInfo.formats, pDecInsn->opCode)) {
+ switch (dexGetInstrFormat(pDecInsn->opCode)) {
case kFmt10x: // op
break;
case kFmt12x: // op vA, vB
@@ -1089,7 +1087,7 @@
insnWidth = 4 + ((size * width) + 1) / 2;
} else {
opCode = instr & 0xff;
- insnWidth = dexGetInstrWidth(gInstrInfo.widths, opCode);
+ insnWidth = dexGetInstrWidth(opCode);
if (insnWidth == 0) {
fprintf(stderr,
"GLITCH: zero-width instruction at idx=0x%04x\n", insnIdx);
@@ -1890,9 +1888,6 @@
wantUsage = true;
}
- /* initialize some VM tables */
- dexGetInstructionInfoTables(&gInstrInfo);
-
if (wantUsage) {
usage();
return 2;
diff --git a/libdex/InstrUtils.c b/libdex/InstrUtils.c
index 936bd01..9c2b48f 100644
--- a/libdex/InstrUtils.c
+++ b/libdex/InstrUtils.c
@@ -468,14 +468,6 @@
};
/*
- * Copy pointers to all of the instruction info tables into
- * the given struct.
- */
-void dexGetInstructionInfoTables(InstructionInfoTables* info) {
- *info = gDexOpcodeInfo;
-}
-
-/*
* Handy macros for helping decode instructions.
*/
#define FETCH(_offset) (insns[(_offset)])
@@ -500,10 +492,10 @@
{
u2 inst = *insns;
OpCode opCode = (OpCode) INST_INST(inst);
- InstructionFormat format = dexGetInstrFormat(gOpcodeFormatTable, opCode);
+ InstructionFormat format = dexGetInstrFormat(opCode);
pDec->opCode = opCode;
- pDec->indexType = dexGetInstrIndexType(gOpcodeIndexTypeTable, opCode);
+ pDec->indexType = dexGetInstrIndexType(opCode);
switch (format) {
case kFmt10x: // op
@@ -715,7 +707,7 @@
u4 len = insns[2] | (((u4)insns[3]) << 16);
width = 4 + (elemWidth * len + 1) / 2;
} else {
- width = dexGetInstrWidth(gOpcodeWidthTable, INST_INST(insns[0]));
+ width = dexGetInstrWidth(INST_INST(insns[0]));
}
return width;
}
diff --git a/libdex/InstrUtils.h b/libdex/InstrUtils.h
index b4678ff..c7f57bc 100644
--- a/libdex/InstrUtils.h
+++ b/libdex/InstrUtils.h
@@ -145,11 +145,10 @@
/*
* Return the width of the specified instruction, or 0 if not defined.
*/
-DEX_INLINE size_t dexGetInstrWidth(const InstructionWidth* widths,
- OpCode opCode)
+DEX_INLINE size_t dexGetInstrWidth(OpCode opCode)
{
//assert(/*opCode >= 0 &&*/ opCode < kNumDalvikInstructions);
- return widths[opCode];
+ return gDexOpcodeInfo.widths[opCode];
}
/*
@@ -162,10 +161,10 @@
/*
* Returns the flags for the specified opcode.
*/
-DEX_INLINE int dexGetInstrFlags(const InstructionFlags* flags, OpCode opCode)
+DEX_INLINE int dexGetInstrFlags(OpCode opCode)
{
//assert(/*opCode >= 0 &&*/ opCode < kNumDalvikInstructions);
- return flags[opCode];
+ return gDexOpcodeInfo.flags[opCode];
}
/*
@@ -179,30 +178,22 @@
/*
* Return the instruction format for the specified opcode.
*/
-DEX_INLINE InstructionFormat dexGetInstrFormat(const InstructionFormat* fmts,
- OpCode opCode)
+DEX_INLINE InstructionFormat dexGetInstrFormat(OpCode opCode)
{
//assert(/*opCode >= 0 &&*/ opCode < kNumDalvikInstructions);
- return fmts[opCode];
+ return gDexOpcodeInfo.formats[opCode];
}
/*
* Return the instruction index type for the specified opcode.
*/
-DEX_INLINE InstructionIndexType dexGetInstrIndexType(
- const InstructionIndexType* types, OpCode opCode)
+DEX_INLINE InstructionIndexType dexGetInstrIndexType(OpCode opCode)
{
//assert(/*opCode >= 0 &&*/ opCode < kNumDalvikInstructions);
- return types[opCode];
+ return gDexOpcodeInfo.indexTypes[opCode];
}
/*
- * Copy pointers to all of the instruction info tables into
- * the given struct.
- */
-void dexGetInstructionInfoTables(InstructionInfoTables* info);
-
-/*
* Decode the instruction pointed to by "insns".
*/
void dexDecodeInstruction(const u2* insns, DecodedInstruction* pDec);
diff --git a/vm/Globals.h b/vm/Globals.h
index fb60120..b96a1ab 100644
--- a/vm/Globals.h
+++ b/vm/Globals.h
@@ -495,12 +495,6 @@
*/
AtomicCache* instanceofCache;
- /*
- * instruction info tables, used for optimization, verification, and
- * compilation. This is a struct that contains several pointers.
- */
- InstructionInfoTables instrInfo;
-
/* inline substitution table, used during optimization */
InlineSub* inlineSubs;
diff --git a/vm/analysis/CodeVerify.c b/vm/analysis/CodeVerify.c
index e9ae842..bda4b53 100644
--- a/vm/analysis/CodeVerify.c
+++ b/vm/analysis/CodeVerify.c
@@ -3559,7 +3559,7 @@
#endif
dexDecodeInstruction(insns, &decInsn);
- int nextFlags = dexGetInstrFlags(gDvm.instrInfo.flags, decInsn.opCode);
+ int nextFlags = dexGetInstrFlags(decInsn.opCode);
/*
* Make a copy of the previous register state. If the instruction
diff --git a/vm/analysis/DexVerify.c b/vm/analysis/DexVerify.c
index 654bd01..c412f29 100644
--- a/vm/analysis/DexVerify.c
+++ b/vm/analysis/DexVerify.c
@@ -33,7 +33,7 @@
*/
bool dvmVerificationStartup(void)
{
- dexGetInstructionInfoTables(&gDvm.instrInfo);
+ /* No need to do anything here. */
return true;
}
@@ -813,7 +813,6 @@
const Method* meth = vdata->method;
const DvmDex* pDvmDex = meth->clazz->pDvmDex;
InsnFlags* insnFlags = vdata->insnFlags;
- const InstructionFlags* flagTable = gDvm.instrInfo.flags;
const u2* insns = meth->insns;
unsigned int codeOffset;
@@ -1221,7 +1220,7 @@
const int kGcMask = kInstrCanBranch | kInstrCanSwitch |
kInstrCanThrow | kInstrCanReturn;
- InstructionFlags opFlags = dexGetInstrFlags(flagTable, decInsn.opCode);
+ InstructionFlags opFlags = dexGetInstrFlags(decInsn.opCode);
if ((opFlags & kGcMask) != 0) {
/*
* This instruction is probably a GC point. Branch instructions
diff --git a/vm/compiler/Frontend.c b/vm/compiler/Frontend.c
index af704af..4e5a882 100644
--- a/vm/compiler/Frontend.c
+++ b/vm/compiler/Frontend.c
@@ -34,7 +34,7 @@
if (opcode == OP_NOP && instr != 0) {
return 0;
} else {
- insnWidth = gDvm.instrInfo.widths[opcode];
+ insnWidth = dexGetInstrWidth(opcode);
if (insnWidth < 0) {
insnWidth = -insnWidth;
}
@@ -205,7 +205,7 @@
static int analyzeInlineTarget(DecodedInstruction *dalvikInsn, int attributes,
int offset)
{
- int flags = dexGetInstrFlags(gDvm.instrInfo.flags, dalvikInsn->opCode);
+ int flags = dexGetInstrFlags(dalvikInsn->opCode);
int dalvikOpCode = dalvikInsn->opCode;
if ((flags & kInstrInvoke) &&
@@ -570,8 +570,7 @@
dvmCompilerAppendMIR(curBB, insn);
cUnit.numInsts++;
- int flags =
- dexGetInstrFlags(gDvm.instrInfo.flags, insn->dalvikInsn.opCode);
+ int flags = dexGetInstrFlags(insn->dalvikInsn.opCode);
if ((flags & kInstrInvoke) &&
(insn->dalvikInsn.opCode != OP_INVOKE_DIRECT_EMPTY)) {
@@ -644,8 +643,7 @@
/* Link the taken and fallthrough blocks */
BasicBlock *searchBB;
- int flags = dexGetInstrFlags(gDvm.instrInfo.flags,
- lastInsn->dalvikInsn.opCode);
+ int flags = dexGetInstrFlags(lastInsn->dalvikInsn.opCode);
if (flags & kInstrInvoke) {
cUnit.hasInvoke = true;
@@ -1208,9 +1206,8 @@
* aligned to 4-byte boundary (alignment instruction to be
* inserted later.
*/
- if (dexGetInstrFlags(gDvm.instrInfo.flags,
- curBB->lastMIRInsn->dalvikInsn.opCode) &
- kInstrInvoke) {
+ if (dexGetInstrFlags(curBB->lastMIRInsn->dalvikInsn.opCode)
+ & kInstrInvoke) {
newBB->isFallThroughFromInvoke = true;
}
diff --git a/vm/compiler/InlineTransformation.c b/vm/compiler/InlineTransformation.c
index f93558c..92488b1 100644
--- a/vm/compiler/InlineTransformation.c
+++ b/vm/compiler/InlineTransformation.c
@@ -85,7 +85,7 @@
/* Now setup the Dalvik instruction with converted src/dst registers */
newGetterMIR->dalvikInsn = getterInsn;
- newGetterMIR->width = gDvm.instrInfo.widths[getterInsn.opCode];
+ newGetterMIR->width = dexGetInstrWidth(getterInsn.opCode);
newGetterMIR->OptimizationFlags |= MIR_CALLEE;
@@ -164,7 +164,7 @@
/* Now setup the Dalvik instruction with converted src/dst registers */
newSetterMIR->dalvikInsn = setterInsn;
- newSetterMIR->width = gDvm.instrInfo.widths[setterInsn.opCode];
+ newSetterMIR->width = dexGetInstrWidth(setterInsn.opCode);
newSetterMIR->OptimizationFlags |= MIR_CALLEE;
@@ -296,7 +296,7 @@
continue;
MIR *lastMIRInsn = bb->lastMIRInsn;
int opCode = lastMIRInsn->dalvikInsn.opCode;
- int flags = dexGetInstrFlags(gDvm.instrInfo.flags, opCode);
+ int flags = dexGetInstrFlags(opCode);
/* No invoke - continue */
if ((flags & kInstrInvoke) == 0)
diff --git a/vm/compiler/Loop.c b/vm/compiler/Loop.c
index de05644..6492187 100644
--- a/vm/compiler/Loop.c
+++ b/vm/compiler/Loop.c
@@ -311,7 +311,7 @@
/* Skip extended MIR instructions */
if (dInsn->opCode > 255) continue;
- int instrFlags = dexGetInstrFlags(gDvm.instrInfo.flags, dInsn->opCode);
+ int instrFlags = dexGetInstrFlags(dInsn->opCode);
/* Instruction is clean */
if ((instrFlags & kInstrCanThrow) == 0) continue;
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index 17c356b..8e1d9a2 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1233,7 +1233,7 @@
*/
static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir)
{
- int flags = dexGetInstrFlags(gDvm.instrInfo.flags, mir->dalvikInsn.opCode);
+ int flags = dexGetInstrFlags(mir->dalvikInsn.opCode);
int flagsToCheck = kInstrCanBranch | kInstrCanSwitch | kInstrCanReturn |
kInstrCanThrow;
@@ -1283,7 +1283,7 @@
if (isEnter) {
/* Get dPC of next insn */
loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
- dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_ENTER)));
+ dexGetInstrWidth(OP_MONITOR_ENTER)));
#if defined(WITH_DEADLOCK_PREDICTION)
genDispatchToHandler(cUnit, TEMPLATE_MONITOR_ENTER_DEBUG);
#else
@@ -1297,7 +1297,7 @@
ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondNe, r0, 0);
loadConstant(cUnit, r0,
(int) (cUnit->method->insns + mir->offset +
- dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_EXIT)));
+ dexGetInstrWidth(OP_MONITOR_EXIT)));
genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
ArmLIR *target = newLIR0(cUnit, kArmPseudoTargetLabel);
target->defMask = ENCODE_ALL;
@@ -4097,8 +4097,7 @@
OpCode dalvikOpCode = mir->dalvikInsn.opCode;
- InstructionFormat dalvikFormat =
- dexGetInstrFormat(gDvm.instrInfo.formats, dalvikOpCode);
+ InstructionFormat dalvikFormat = dexGetInstrFormat(dalvikOpCode);
char *note;
if (mir->OptimizationFlags & MIR_INLINED) {
note = " (I)";
diff --git a/vm/compiler/codegen/arm/Thumb2/Gen.c b/vm/compiler/codegen/arm/Thumb2/Gen.c
index d689160..3d689c9 100644
--- a/vm/compiler/codegen/arm/Thumb2/Gen.c
+++ b/vm/compiler/codegen/arm/Thumb2/Gen.c
@@ -225,7 +225,7 @@
/* Get dPC of next insn */
loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
- dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_ENTER)));
+ dexGetInstrWidth(OP_MONITOR_ENTER)));
// Export PC (part 2)
newLIR3(cUnit, kThumb2StrRRI8Predec, r3, rFP,
sizeof(StackSaveArea) -
@@ -289,7 +289,7 @@
ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondNe, r0, 0);
loadConstant(cUnit, r0,
(int) (cUnit->method->insns + mir->offset +
- dexGetInstrWidth(gDvm.instrInfo.widths, OP_MONITOR_EXIT)));
+ dexGetInstrWidth(OP_MONITOR_EXIT)));
genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
// Resume here
diff --git a/vm/interp/Jit.c b/vm/interp/Jit.c
index 2ae49ca..151e66f 100644
--- a/vm/interp/Jit.c
+++ b/vm/interp/Jit.c
@@ -750,7 +750,7 @@
#if defined(SHOW_TRACE)
LOGD("TraceGen: adding %s", dexGetOpcodeName(decInsn.opCode));
#endif
- flags = dexGetInstrFlags(gDvm.instrInfo.flags, decInsn.opCode);
+ flags = dexGetInstrFlags(decInsn.opCode);
len = dexGetInstrOrTableWidth(lastPC);
offset = lastPC - interpState->method->insns;
assert((unsigned) offset <
