Quick compiler: free up space in MIR.
The width field in MIR isn't especially useful - it could always
be recalculated from the Dalvik instruction. This CL eliminates
it to allow the 16 bits it occupied to be used for the ID of the
parent BasicBlock.
Change-Id: I75ab8562ca217f0f819ecfc417014dee74bc587e
diff --git a/compiler/dex/local_value_numbering_test.cc b/compiler/dex/local_value_numbering_test.cc
index 2b1c420..e56e016 100644
--- a/compiler/dex/local_value_numbering_test.cc
+++ b/compiler/dex/local_value_numbering_test.cc
@@ -144,7 +144,6 @@
mir->ssa_rep->fp_def = nullptr; // Not used by LVN.
mir->dalvikInsn.opcode = def->opcode;
mir->offset = i; // LVN uses offset only for debug output
- mir->width = 1u; // Not used by LVN.
mir->optimization_flags = 0u;
if (i != 0u) {
diff --git a/compiler/dex/mir_graph.cc b/compiler/dex/mir_graph.cc
index ba4224e..08d1bca 100644
--- a/compiler/dex/mir_graph.cc
+++ b/compiler/dex/mir_graph.cc
@@ -633,7 +633,6 @@
insn->offset = current_offset_;
insn->m_unit_index = current_method_;
int width = ParseInsn(code_ptr, &insn->dalvikInsn);
- insn->width = width;
Instruction::Code opcode = insn->dalvikInsn.opcode;
if (opcode_count_ != NULL) {
opcode_count_[static_cast<int>(opcode)]++;
diff --git a/compiler/dex/mir_graph.h b/compiler/dex/mir_graph.h
index 11d2fbe..ded1c99 100644
--- a/compiler/dex/mir_graph.h
+++ b/compiler/dex/mir_graph.h
@@ -263,7 +263,8 @@
Instruction::Code opcode;
} dalvikInsn;
- uint16_t width; // Note: width can include switch table or fill array data.
+ // TODO: Add id of parent basic block.
+ // BasicBlockId parent_bb; // ID of parent basic block.
NarrowDexOffset offset; // Offset of the instruction in code units.
uint16_t optimization_flags;
int16_t m_unit_index; // From which method was this MIR included
diff --git a/compiler/dex/mir_optimization_test.cc b/compiler/dex/mir_optimization_test.cc
index 891d9fb..86092b6 100644
--- a/compiler/dex/mir_optimization_test.cc
+++ b/compiler/dex/mir_optimization_test.cc
@@ -170,7 +170,6 @@
}
mir->ssa_rep = nullptr;
mir->offset = 2 * i; // All insns need to be at least 2 code units long.
- mir->width = 2u;
mir->optimization_flags = 0u;
merged_df_flags |= MIRGraph::GetDataFlowAttributes(def->opcode);
}
diff --git a/compiler/dex/quick/dex_file_method_inliner.cc b/compiler/dex/quick/dex_file_method_inliner.cc
index 3ec31ba..9f98e55 100644
--- a/compiler/dex/quick/dex_file_method_inliner.cc
+++ b/compiler/dex/quick/dex_file_method_inliner.cc
@@ -38,12 +38,7 @@
ArenaAllocator* arena = mir_graph->GetArena();
MIR* insn = static_cast<MIR*>(arena->Alloc(sizeof(MIR), kArenaAllocMIR));
insn->offset = invoke->offset;
- insn->width = invoke->width;
insn->optimization_flags = MIR_CALLEE;
- if (move_return != nullptr) {
- DCHECK_EQ(move_return->offset, invoke->offset + invoke->width);
- insn->width += move_return->width;
- }
return insn;
}
@@ -660,7 +655,6 @@
}
MIR* insn = AllocReplacementMIR(mir_graph, invoke, move_result);
- insn->width += insn->offset - invoke->offset;
insn->offset = invoke->offset;
insn->dalvikInsn.opcode = opcode;
insn->dalvikInsn.vA = move_result->dalvikInsn.vA;
@@ -737,9 +731,7 @@
if (move_result != nullptr) {
MIR* move = AllocReplacementMIR(mir_graph, invoke, move_result);
- insn->width = invoke->width;
move->offset = move_result->offset;
- move->width = move_result->width;
if (move_result->dalvikInsn.opcode == Instruction::MOVE_RESULT) {
move->dalvikInsn.opcode = Instruction::MOVE_FROM16;
} else if (move_result->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
