commit c029c98cc056bc247b69160f413ee7ce9a93d8c3
author Johnny Qiu <joqiu@nvidia.com> Wed Jun 04 07:23:49 2014 +0000
committer Johnny Qiu <joqiu@nvidia.com> Thu Jun 05 11:00:56 2014 +0000
tree 58281eeb05aa52bb5185833a3c179a2dbebdf600
parent 57795db7d44bcd6d106481fa192691400b2358c8

Update maximum number of reachable blocks in last step

Change-Id: I58e20d74fafdffd86ab3b7e4a1523b93abaae9a5
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>

compiler/dex/mir_graph.cc

diff --git a/compiler/dex/mir_graph.cc b/compiler/dex/mir_graph.cc
index 3ef1dbf..d6cd238 100644
--- a/compiler/dex/mir_graph.cc
+++ b/compiler/dex/mir_graph.cc
@@ -1418,9 +1418,6 @@
   temp_bit_vector_size_ = cu_->num_dalvik_registers;
   temp_bit_vector_ = new (temp_scoped_alloc_.get()) ArenaBitVector(
       temp_scoped_alloc_.get(), temp_bit_vector_size_, false, kBitMapRegisterV);
-
-  // Update the maximum number of reachable blocks.
-  max_num_reachable_blocks_ = num_reachable_blocks_;
 }
 
 void MIRGraph::SSATransformationEnd() {
@@ -1433,6 +1430,9 @@
   temp_bit_vector_ = nullptr;
   DCHECK(temp_scoped_alloc_.get() != nullptr);
   temp_scoped_alloc_.reset();
+
+  // Update the maximum number of reachable blocks.
+  max_num_reachable_blocks_ = num_reachable_blocks_;
 }
 
 void MIRGraph::ComputeTopologicalSortOrder() {