| commit | bde6ae1c6e1bc0ea1c8d80e3b0ec401517c6d7f7 | [log] [tgz] |
|---|---|---|
| author | Anton Kirilov <anton.kirilov@linaro.org> | Fri Jun 10 17:46:12 2016 +0100 |
| committer | Anton Kirilov <anton.kirilov@linaro.org> | Tue Jun 28 11:07:24 2016 +0100 |
| tree | b8b358dbab45a235af3413b6750db13419d81dc2 | |
| parent | 47fe36d8dea0309e5ff08fc77244a371ba10d9db [diff] |
ARM64: Ensure stricter alignment when loading and storing register pairs The impetus for this change is the fact that loads that cross a 64 byte boundary and stores that cross a 16 byte boundary are a performance issue on Cortex-A57 and A72. Change-Id: I81263dc72272192ad2d190b741a955f175880461