tree b8b358dbab45a235af3413b6750db13419d81dc2
parent 47fe36d8dea0309e5ff08fc77244a371ba10d9db
author Anton Kirilov <anton.kirilov@linaro.org> 1465577172 +0100
committer Anton Kirilov <anton.kirilov@linaro.org> 1467108444 +0100

ARM64: Ensure stricter alignment when loading and storing register pairs

The impetus for this change is the fact that loads that cross a 64 byte
boundary and stores that cross a 16 byte boundary are a performance issue
on Cortex-A57 and A72.

Change-Id: I81263dc72272192ad2d190b741a955f175880461