commit 26ee07a9dbdff5d7ea61ff412e5fb7f510972aad
author Dmitry Petrochenko <dmitry.petrochenko@intel.com> Tue May 13 12:58:19 2014 +0700
committer Dmitry Petrochenko <dmitry.petrochenko@intel.com> Wed May 14 10:39:58 2014 +0700
tree 1dc424e41913cc598411bb24a49ab56b5b043d3c
parent d0916f36d27b643bca970f3645c38f44270c74ef

Support any cpu register sequence in LoadArgRegs

The LoadArgRegs was designed only for case when
arg1.reg < arg2.reg < arg3.reg which is not true for x86_64 ABI.
Now LoadArgRegs supports three args passed by any cpu register.

Change-Id: I62f58c47ec12b8e3f8124724cb3b5371dde8173f
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>

compiler/dex/quick/gen_invoke.cc

diff --git a/compiler/dex/quick/gen_invoke.cc b/compiler/dex/quick/gen_invoke.cc
index 7aaffcb..eeab754 100644
--- a/compiler/dex/quick/gen_invoke.cc
+++ b/compiler/dex/quick/gen_invoke.cc
@@ -801,8 +801,10 @@
                          const MethodReference& target_method,
                          uint32_t vtable_idx, uintptr_t direct_code,
                          uintptr_t direct_method, InvokeType type, bool skip_this) {
-  int last_arg_reg = TargetReg(kArg3).GetReg();
-  int next_reg = TargetReg(kArg1).GetReg();
+  int last_arg_reg = 3 - 1;
+  int arg_regs[3] = {TargetReg(kArg1).GetReg(), TargetReg(kArg2).GetReg(), TargetReg(kArg3).GetReg()};
+
+  int next_reg = 0;
   int next_arg = 0;
   if (skip_this) {
     next_reg++;
@@ -811,8 +813,8 @@
   for (; (next_reg <= last_arg_reg) && (next_arg < info->num_arg_words); next_reg++) {
     RegLocation rl_arg = info->args[next_arg++];
     rl_arg = UpdateRawLoc(rl_arg);
-    if (rl_arg.wide && (next_reg <= TargetReg(kArg2).GetReg())) {
-      RegStorage r_tmp(RegStorage::k64BitPair, next_reg, next_reg + 1);
+    if (rl_arg.wide && (next_reg <= last_arg_reg - 1)) {
+      RegStorage r_tmp(RegStorage::k64BitPair, arg_regs[next_reg], arg_regs[next_reg + 1]);
       LoadValueDirectWideFixed(rl_arg, r_tmp);
       next_reg++;
       next_arg++;
@@ -821,7 +823,7 @@
         rl_arg = NarrowRegLoc(rl_arg);
         rl_arg.is_const = false;
       }
-      LoadValueDirectFixed(rl_arg, RegStorage::Solo32(next_reg));
+      LoadValueDirectFixed(rl_arg, RegStorage::Solo32(arg_regs[next_reg]));
     }
     call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx,
                                 direct_code, direct_method, type);