Optimizing: Improve shift simplification, x >>> 64.
Simplify shifts by a multiple of bit size, not just 0.
ARM codegen does not expect to see such shifts and it
is guarding against them with a DCHECK().
Bug: 27638111
Change-Id: I3ae8383d7edefa0facd375ce511e7a226d5468a1
diff --git a/compiler/optimizing/instruction_simplifier.cc b/compiler/optimizing/instruction_simplifier.cc
index 09f841c..f1f4652 100644
--- a/compiler/optimizing/instruction_simplifier.cc
+++ b/compiler/optimizing/instruction_simplifier.cc
@@ -235,7 +235,10 @@
HInstruction* input_other = instruction->GetLeastConstantLeft();
if (input_cst != nullptr) {
- if (input_cst->IsZero()) {
+ int64_t cst = Int64FromConstant(input_cst);
+ int64_t mask =
+ (input_cst->GetType() == Primitive::kPrimLong) ? kMaxLongShiftValue : kMaxIntShiftValue;
+ if ((cst & mask) == 0) {
// Replace code looking like
// SHL dst, src, 0
// with
diff --git a/test/458-checker-instruction-simplification/src/Main.java b/test/458-checker-instruction-simplification/src/Main.java
index f7c721a..53c2e0b 100644
--- a/test/458-checker-instruction-simplification/src/Main.java
+++ b/test/458-checker-instruction-simplification/src/Main.java
@@ -414,6 +414,23 @@
return arg >> 0;
}
+ /// CHECK-START: long Main.Shr64(long) instruction_simplifier (before)
+ /// CHECK-DAG: <<Arg:j\d+>> ParameterValue
+ /// CHECK-DAG: <<Const64:i\d+>> IntConstant 64
+ /// CHECK-DAG: <<Shr:j\d+>> Shr [<<Arg>>,<<Const64>>]
+ /// CHECK-DAG: Return [<<Shr>>]
+
+ /// CHECK-START: long Main.Shr64(long) instruction_simplifier (after)
+ /// CHECK-DAG: <<Arg:j\d+>> ParameterValue
+ /// CHECK-DAG: Return [<<Arg>>]
+
+ /// CHECK-START: long Main.Shr64(long) instruction_simplifier (after)
+ /// CHECK-NOT: Shr
+
+ public static long Shr64(long arg) {
+ return arg >> 64;
+ }
+
/// CHECK-START: long Main.Sub0(long) instruction_simplifier (before)
/// CHECK-DAG: <<Arg:j\d+>> ParameterValue
/// CHECK-DAG: <<Const0:j\d+>> LongConstant 0
@@ -1671,6 +1688,7 @@
assertLongEquals(OrSame(arg), arg);
assertIntEquals(Shl0(arg), arg);
assertLongEquals(Shr0(arg), arg);
+ assertLongEquals(Shr64(arg), arg);
assertLongEquals(Sub0(arg), arg);
assertIntEquals(SubAliasNeg(arg), -arg);
assertLongEquals(UShr0(arg), arg);