commit 0da7a26e1ae2a701529c5c15c280f3efae0ccec0
author Nicolas Geoffray <ngeoffray@google.com> Mon Jan 26 13:33:33 2015 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> Mon Jan 26 13:33:33 2015 +0000
tree 92971e2efa73cac2ed9148eaa8ebc27ad96ae13c
parent ebb3cbc5869f78170f08ffdb1e782b3b3371e638
parent a0bb2bd5b6a049ad806c223f00672d1f0210db67

Merge "Fix codegen_test."

compiler/optimizing/code_generator_arm.cc

diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc
index 824663a..0fe28e8 100644
--- a/compiler/optimizing/code_generator_arm.cc
+++ b/compiler/optimizing/code_generator_arm.cc
@@ -455,7 +455,7 @@
   return Location();
 }
 
-void CodeGeneratorARM::SetupBlockedRegisters(bool is_baseline ATTRIBUTE_UNUSED) const {
+void CodeGeneratorARM::SetupBlockedRegisters(bool is_baseline) const {
   // Don't allocate the dalvik style register pair passing.
   blocked_register_pairs_[R1_R2] = true;
 

compiler/optimizing/codegen_test.cc

diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc
index aa4fc8f..2d59136 100644
--- a/compiler/optimizing/codegen_test.cc
+++ b/compiler/optimizing/codegen_test.cc
@@ -36,9 +36,34 @@
 #include "utils.h"
 
 #include "gtest/gtest.h"
-
+  
 namespace art {
 
+// Provide our own codegen, that ensures the C calling conventions
+// are preserved. Currently, ART and C do not match as R4 is caller-save
+// in ART, and callee-save in C. Alternatively, we could use or write
+// the stub that saves and restores all registers, but it is easier
+// to just overwrite the code generator.
+class TestCodeGeneratorARM : public arm::CodeGeneratorARM {
+ public:
+  TestCodeGeneratorARM(HGraph* graph,
+                       const ArmInstructionSetFeatures& isa_features,
+                       const CompilerOptions& compiler_options)
+      : arm::CodeGeneratorARM(graph, isa_features, compiler_options) {
+    AddAllocatedRegister(Location::RegisterLocation(6));
+    AddAllocatedRegister(Location::RegisterLocation(7));
+  }
+
+  void SetupBlockedRegisters(bool is_baseline) const OVERRIDE {
+    arm::CodeGeneratorARM::SetupBlockedRegisters(is_baseline);
+    blocked_core_registers_[4] = true;
+    blocked_core_registers_[6] = false;
+    blocked_core_registers_[7] = false;
+    // Makes pari R6-R7 available.
+    blocked_register_pairs_[6 >> 1] = false;
+  }
+};
+
 class InternalCodeAllocator : public CodeAllocator {
  public:
   InternalCodeAllocator() : size_(0) { }
@@ -92,7 +117,7 @@
 
   std::unique_ptr<const ArmInstructionSetFeatures> features(
       ArmInstructionSetFeatures::FromCppDefines());
-  arm::CodeGeneratorARM codegenARM(graph, *features.get(), compiler_options);
+  TestCodeGeneratorARM codegenARM(graph, *features.get(), compiler_options);
   codegenARM.CompileBaseline(&allocator, true);
   if (kRuntimeISA == kArm || kRuntimeISA == kThumb2) {
     Run(allocator, codegenARM, has_result, expected);
@@ -136,9 +161,9 @@
                              Expected expected) {
   CompilerOptions compiler_options;
   if (kRuntimeISA == kArm || kRuntimeISA == kThumb2) {
-    arm::CodeGeneratorARM codegenARM(graph,
-                                     *ArmInstructionSetFeatures::FromCppDefines(),
-                                     compiler_options);
+    TestCodeGeneratorARM codegenARM(graph,
+                                    *ArmInstructionSetFeatures::FromCppDefines(),
+                                    compiler_options);
     RunCodeOptimized(&codegenARM, graph, hook_before_codegen, has_result, expected);
   } else if (kRuntimeISA == kArm64) {
     arm64::CodeGeneratorARM64 codegenARM64(graph, compiler_options);