| /* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| #include "qcom-base/sdmmagpie-thermal-overlay.dtsi" |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> |
| #include <dt-bindings/iio/qcom,spmi-vadc.h> |
| #include <dt-bindings/input/input.h> |
| #include "qcom-base/sdmmagpie-sde-display.dtsi" |
| |
| #include "sm7150-sunfish-camera-pmic.dtsi" |
| #include "sm7150-sunfish-camera-sensor.dtsi" |
| #include "sm7150-sunfish-citadel.dtsi" |
| #include "sm7150-sunfish-haptics.dtsi" |
| #include "sm7150-sunfish-pac193x.dtsi" |
| #include "sm7150-sunfish-thermal.dtsi" |
| #include "sm7150-sunfish-nfc.dtsi" |
| #include "sm7150-sunfish-ese.dtsi" |
| #include "sm7150-sunfish-memory.dtsi" |
| #include "sm7150-sunfish-fingerprint.dtsi" |
| #include "sm7150-sunfish-touch-common.dtsi" |
| #include "sm7150-sunfish-touch-proto.dtsi" |
| #include "sm7150-sunfish-battery.dtsi" |
| #include "sm7150-sunfish-regulator.dtsi" |
| |
| &tlmm { |
| goog,ignored-gpios = <59 60 61 62>; |
| }; |
| |
| &soc { |
| bootloader_log { |
| compatible = "qcom,bldr_log"; |
| reg = <0xA47DF000 0x16800>, <0xA47F5800 0x16800>; |
| reg-names = "bl_log", "bl_old_log"; |
| memory-region = <&debug_info>; |
| }; |
| |
| ramoops { |
| compatible = "ramoops"; |
| memory-region = <&ramoops_mem>; |
| alt-memory-region = <&alt_ramoops_mem>; |
| record-size = <0x40000>; |
| console-size = <0x200000>; |
| pmsg-size = <0x100000>; |
| }; |
| |
| access_ramoops@0 { |
| compatible = "access_ramoops"; |
| label = "metadata"; |
| memory-region = <&ramoops_meta_mem>; |
| }; |
| |
| access_ramoops@1 { |
| compatible = "access_ramoops"; |
| label = "ramoops"; |
| memory-region = <&alt_ramoops_mem>; |
| }; |
| |
| keydebug { |
| compatible = "keydebug"; |
| key_down_delay = <7000>; |
| keys_down = <116>; |
| dbg_fn_delay = <2500>; |
| }; |
| |
| qcom,msm-imem@146aa000 { |
| kernel_rtb@cb0 { |
| compatible = "msm-imem-rtb_info"; |
| reg = <0xcb0 64>; |
| }; |
| pmic_info@cf0 { |
| compatible = "msm-imem-pmic_info"; |
| reg = <0xcf0 64>; |
| }; |
| rst_info@d30 { |
| compatible = "msm-imem-rst_info"; |
| reg = <0xd30 100>; |
| }; |
| bldr_info@d94 { |
| compatible = "msm-imem-bldr_info"; |
| reg = <0xd94 256>; |
| }; |
| kernel_info@e94 { |
| compatible = "msm-imem-kernel_info"; |
| reg = <0xe94 256>; |
| }; |
| gplatform_data@f94 { |
| compatible = "msm-imem-gplatform_data"; |
| reg = <0xf94 8>; |
| }; |
| }; |
| }; |
| |
| &qupv3_se8_2uart { |
| status = "ok"; |
| }; |
| |
| &qupv3_se3_4uart { |
| status = "ok"; |
| }; |
| |
| &pm6150a_amoled { |
| status = "ok"; |
| }; |
| |
| &ufsphy_mem { |
| compatible = "qcom,ufs-phy-qmp-v3"; |
| |
| vdda-phy-supply = <&pm6150_l4>; /* 0.88v */ |
| vdda-pll-supply = <&pm6150l_l3>; /* 1.2v */ |
| vdda-phy-max-microamp = <62900>; |
| vdda-pll-max-microamp = <18300>; |
| |
| status = "ok"; |
| }; |
| |
| &ufshc_mem { |
| vdd-hba-supply = <&ufs_phy_gdsc>; |
| vdd-hba-fixed-regulator; |
| vcc-supply = <&pm6150_l19>; |
| vcc-voltage-level = <2950000 2960000>; |
| vccq2-supply = <&pm6150_l12>; |
| /delete-property/ vccq2-voltage-level; |
| vccq2-voltage-level = <1800000 1950000>; |
| vcc-max-microamp = <600000>; |
| vccq2-max-microamp = <600000>; |
| spm-level = <3>; |
| |
| qcom,vddp-ref-clk-supply = <&pm6150l_l3>; |
| qcom,vddp-ref-clk-max-microamp = <100>; |
| |
| status = "ok"; |
| }; |
| |
| &qupv3_se2_i2c { |
| status = "ok"; |
| qcom,clk-freq-out = <400000>; |
| nq@28 { |
| compatible = "qcom,nq-nci"; |
| reg = <0x28>; |
| qcom,nq-irq = <&tlmm 37 0x00>; |
| qcom,nq-ven = <&tlmm 12 0x00>; |
| qcom,nq-firm = <&tlmm 36 0x00>; |
| qcom,nq-clkreq = <&tlmm 31 0x00>; |
| qcom,nq-esepwr = <&tlmm 94 0x00>; |
| interrupt-parent = <&tlmm>; |
| interrupts = <37 0>; |
| interrupt-names = "nfc_irq"; |
| pinctrl-names = "nfc_active", "nfc_suspend"; |
| pinctrl-0 = <&nfc_int_active &nfc_enable_active |
| &nfc_clk_req_active>; |
| pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend |
| &nfc_clk_req_suspend>; |
| }; |
| }; |
| |
| &sdhc_1 { |
| vdd-supply = <&pm6150_l19>; |
| qcom,vdd-voltage-level = <2950000 2950000>; |
| qcom,vdd-current-level = <0 570000>; |
| |
| vdd-io-supply = <&pm6150_l12>; |
| qcom,vdd-io-always-on; |
| qcom,vdd-io-lpm-sup; |
| qcom,vdd-io-voltage-level = <1800000 1800000>; |
| qcom,vdd-io-current-level = <0 325000>; |
| |
| pinctrl-names = "active", "sleep"; |
| pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; |
| pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; |
| |
| status = "ok"; |
| }; |
| |
| &sdhc_2 { |
| vdd-supply = <&pm6150l_l9>; |
| qcom,vdd-voltage-level = <2950000 2950000>; |
| qcom,vdd-current-level = <0 800000>; |
| |
| vdd-io-supply = <&pm6150l_l6>; |
| qcom,vdd-io-voltage-level = <1800000 2950000>; |
| qcom,vdd-io-current-level = <0 22000>; |
| |
| pinctrl-names = "active", "sleep"; |
| pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; |
| pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; |
| |
| cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>; |
| |
| status = "disabled"; |
| }; |
| |
| &dsi_sw43404_amoled_video { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <1023>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_sw43404_amoled_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <1023>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_sw43404_amoled_fhd_plus_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <1023>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_dual_sharp_wqhd_video { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <4095>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| qcom,platform-en-gpio = <&pm6150l_gpios 4 0>; |
| qcom,platform-bklight-en-gpio = <&pm6150l_gpios 5 0>; |
| }; |
| |
| &dsi_dual_sharp_wqhd_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <4095>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| qcom,platform-en-gpio = <&pm6150l_gpios 4 0>; |
| qcom,platform-bklight-en-gpio = <&pm6150l_gpios 5 0>; |
| }; |
| |
| &dsi_rm69298_truly_amoled_video { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <255>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_rm69298_truly_amoled_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <255>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_rm69299_visionox_amoled_video { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-bl-min-level = <1>; |
| qcom,mdss-dsi-bl-max-level = <255>; |
| qcom,platform-te-gpio = <&tlmm 10 0>; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_sim_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_sim_vid { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_dual_sim_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_dual_sim_vid { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_sim_dsc_375_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_dual_sim_dsc_375_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 9 0>; |
| }; |
| |
| &dsi_nt35695b_truly_fhd_video { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 11 0>; |
| qcom,platform-sec-reset-gpio = <&pm6150l_gpios 11 0>; |
| qcom,platform-en-gpio = <&pm6150l_gpios 4 0>; |
| qcom,platform-bklight-en-gpio = <&pm6150l_gpios 5 0>; |
| }; |
| |
| &dsi_nt35695b_truly_fhd_cmd { |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; |
| qcom,platform-reset-gpio = <&pm6150l_gpios 11 0>; |
| qcom,platform-sec-reset-gpio = <&pm6150l_gpios 11 0>; |
| qcom,platform-en-gpio = <&pm6150l_gpios 4 0>; |
| qcom,platform-bklight-en-gpio = <&pm6150l_gpios 5 0>; |
| qcom,platform-te-gpio = <&tlmm 11 0>; |
| }; |
| |
| &sde_dp { |
| qcom,dp-aux-switch = <&fsa4480>; |
| }; |
| |
| &pm6150l_gpios { |
| key_vol_up { |
| key_vol_up_default: key_vol_up_default { |
| pins = "gpio2"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| }; |
| |
| &soc { |
| gpio_keys { |
| compatible = "gpio-keys"; |
| label = "gpio-keys"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&key_vol_up_default>; |
| |
| vol_up { |
| label = "volume_up"; |
| gpios = <&pm6150l_gpios 2 GPIO_ACTIVE_LOW>; |
| linux,input-type = <1>; |
| linux,code = <KEY_VOLUMEUP>; |
| linux,can-disable; |
| debounce-interval = <15>; |
| gpio-key,wakeup; |
| }; |
| }; |
| |
| modemsmem { |
| compatible = "modemsmem"; |
| }; |
| }; |
| |
| &thermal_zones { |
| quiet-therm-step { |
| status = "disabled"; |
| }; |
| }; |
| |
| &cam_cci1 { |
| status = "disabled"; |
| }; |
| |
| // Force warm reboot on 'shutdown,thermal' & 'reboot-ab-update'. |
| &msm_poweroff { |
| qcom,force-warm-reboot-on-thermal-shutdown; |
| qcom,force-warm-reboot-on-reboot-ab-update; |
| }; |
