| Qualcomm SPMI Controller (PMIC Arbiter) |
| |
| Required properties: |
| - cell-index : the bus identifier. |
| - compatible : should be "qcom,spmi-pmic-arb". |
| - reg-names : should be "core", "intr", "cnfg" |
| - reg : offset and length of the PMIC Arbiter Core register map. |
| - reg : offset and length of the PMIC Arbiter Interrupt controller register map. |
| - reg : offset and length of the PMIC Arbiter Configuration register map. |
| - interrupts : the PMIC Arbiter interrupt. |
| - qcom,pmic-arb-ee : the execution environment (EE) identifier. |
| - qcom,pmic-arb-channel : the assigned channel number for channel registers. |
| |
| Optional properties: |
| - qcom,not-wakeup : boolean property which indicates that SPMI PMIC interrupts |
| should not be treated as wakeup sources |
| - reg-names : may have "chnls", "obsrvr" |
| - reg : offset and length of the PMIC Arbiter Core Channels register map. |
| - reg : offset and length of the PMIC Arbiter Core Observer Channels reg map. |
| - qcom,pmic-arb-max-peripherals : the max supported peripheral channels on device |
| - qcom,pmic-arb-max-periph-interrupts : the max supported peripheral channels |
| interrupts on device |
| |
| Example: |
| |
| qcom,spmi@fc4c0000 { |
| cell-index = <0>; |
| compatible = "qcom,spmi-pmic-arb"; |
| reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| reg = <0x200f000 0x1000>, |
| <0x2400000 0x400000>, |
| <0x2c00000 0x400000>, |
| <0x3800000 0x200000>, |
| <0x200a000 0x2100>; |
| interrupts = <0 190 0>; |
| qcom,pmic-arb-ee = <0>; |
| qcom,pmic-arb-channel = <0>; |
| }; |