Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt

Qualcomm QPNP power-on

The qpnp-power-on is a driver which supports the power-on(PON)
peripheral on Qualcomm PMICs. The supported functionality includes
power on/off reason, key press/release detection, PMIC reset configurations
and other PON specifc features. The PON module supports multiple physical
power-on (KPDPWR_N, CBLPWR) and reset (KPDPWR_N, RESIN, KPDPWR+RESIN) sources.
This peripheral is connected to the host processor via the SPMI interface.

Required properties:
- compatible:	Must be "qcom,qpnp-power-on"
- reg:		Specifies the SPMI address and size for this PON (power-on) peripheral
- interrupts:	Specifies the interrupt associated with PON.
- interrupt-names:	Specify the interrupt names associated with interrupts. Must be
			one of "kpdpwr", "kpdpwr-bark", "resin", "resin-bark", "cblpwr",
			"kpdpwr-resin-bark". Bark interrupts are associated with system
			reset configuration to allow default reset configuration to be
			activated. If system reset configuration is not supported then
			bark interrupts are nops. Additionally, the "pmic-wd-bark"
			interrupt can be added if the system needs to handle PMIC
			watch dog barks.

Optional properties:
- qcom,pon-dbc-delay		The debounce delay for the power-key interrupt
				specified in us. The value ranges from 2 seconds
				to 1/64 of a second. Possible values are -
				- 2, 1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64
				- Intermediate value is rounded down to the
				nearest valid value.
- qcom,pon_1 ...pon_n		These represent the child nodes which describe
				the properties (reset, key) for each of the pon
				reset source. All the child nodes are optional.
				If none of them is specified, the driver fails
				to register.
- qcom,system-reset		Specifies that this PON peripheral can be used
				to reset the system. This property can only be
				used by one device on the system. It is an error
				to include it more than once.
- qcom,s3-debounce		The debounce delay for stage3 reset trigger in
				secs. The values range from 0 to 128.
- qcom,s3-src			The source for stage 3 reset. It can be one of
				"kpdpwr", "resin", "kpdpwr-or-resin" or
				"kpdpwr-and-resin". The default value is
				"kpdpwr-and-resin".
- qcom,uvlo-panic		If this property is present, the device will set to panic during reboot if this reboot is due to under voltage lock out
- qcom,clear-warm-reset		Specifies that the WARM_RESET reason registers
				need to be cleared for this target. The property
				is used for the targets which have a hardware feature
				to catch resets which aren't triggered by the MSM.
				In such cases clearing WARM_REASON registers across
				MSM resets keeps the registers in good state.
- qcom,secondary-pon-reset	Boolean property which indicates that the PON
				peripheral is a secondary PON device which needs
				to be configured during reset in addition to the
				primary PON device that is configured for system
				reset through qcom,system-reset property.
				This should not be defined along with the
				qcom,system-reset property.
- qcom,store-hard-reset-reason	Boolean property which if set will store the hardware
				reset reason to SOFT_RB_SPARE register of the core PMIC
				PON peripheral.


All the below properties are in the sub-node section (properties of the child
node).

Sub-nodes (if defined) should belong to either a PON configuration or a
regulator configuration.

Regulator sub-node required properties:
- regulator-name		Regulator name for the PON regulator that
				is being configured.
- qcom,pon-spare-reg-addr	Register offset from the base address of the PON
				peripheral that needs to be configured for the
				regulator being controlled.
- qcom,pon-spare-reg-bit	Bit position in the specified register that
				needs to be configured for the regulator being
				controlled.

PON sub-node required properties:
- qcom,pon-type			The type of PON/RESET source. The driver
				currently supports KPDPWR(0), RESIN(1) and
				CBLPWR(2) pon/reset sources.

PON sub-node optional properties:
- qcom,pull-up			The initial state of the reset pin under
				consideration.
				0 = No pull-up
				1 = pull-up enabled
				This property is set to '0' if not specified.
- qcom,support-reset		Indicates if this PON source supports
				reset functionality.
				0 = Not supported
				1 = Supported
				This property is set to '0' if not specified.
- qcom,use-bark                        Specify if this pon type needs to handle bark irq
- qcom,s1-timer			The debounce timer for the BARK interrupt for
				that reset source. Value is specified in ms.
				Supported values are -
				- 0, 32, 56, 80, 128, 184, 272, 408, 608, 904
				  1352, 2048, 3072, 4480, 6720, 10256
				This property must be specified only if
				'support-reset' is set to 1.
- qcom,s2-timer			The debounce timer for the S2 reset specified
				in ms. On the expiry of this timer, the PMIC
				executes the reset sequence. Supported values -
				- 0, 10, 50, 100, 250, 500, 1000, 2000
				This property is required only if
				'support-reset' is set to 1.
- qcom,s2-type			The type of reset associated with this source.
				The supported resets are -
				SOFT(0), WARM(1), SHUTDOWN(4), HARD(7)
				This property is required only if
				'support-reset' is set to 1.
- linux,code			The input key-code associated with the reset source.
				The reset source in its default configuration can be
				used to support standard keys.

Example:
	qcom,power-on@800 {
		compatible = "qcom,qpnp-power-on";
		reg = <0x800 0x100>;
		interrupts = <0x0 0x8 0x0>,
			     <0x0 0x8 0x1>,
			     <0x0 0x8 0x4>,
			     <0x0 0x8 0x5>;
		interrupt-names = "kpdpwr", "resin",
				"resin-bark", "kpdpwr-resin-bark";
		qcom,pon-dbc-delay = <15625>;
		qcom,system-reset;
		qcom,s3-debounce = <32>;
		qcom,s3-src = "resin";
		qcom,clear-warm-reset;
		qcom,store-hard-reset-reason;

		qcom,pon_1 {
			qcom,pon-type = <0>;
			qcom,pull-up = <1>;
			linux,code = <116>;
		};

		qcom,pon_2 {
			qcom,pon-type = <1>;
			qcom,support-reset = <1>;
			qcom,pull-up = <1>;
			qcom,s1-timer = <0>;
			qcom,s2-timer = <2000>;
			qcom,s2-type = <1>;
			linux,code = <114>;
			qcom,use-bark;
		};

		qcom,pon_3 {
			qcom,pon-type = <3>;
			qcom,support-reset = <1>;
			qcom,s1-timer = <6720>;
			qcom,s2-timer = <2000>;
			qcom,s2-type = <7>;
			qcom,pull-up = <1>;
			qcom,use-bark;
		};
	};
	qcom,power-on@800 {
		compatible = "qcom,qpnp-power-on";
		reg = <0x800 0x100>;
		qcom,secondary-pon-reset;

		pon_perph_reg: qcom,pon_perph_reg {
			regulator-name = "pon_spare_reg";
			qcom,pon-spare-reg-addr = <0x8c>;
			qcom,pon-spare-reg-bit = <1>;
		};
	};