blob: 4687aa1a5dc6720b4dd4ab74de58d0dbd217f1f8 [file] [log] [blame]
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "dsi-panel-sim-video.dtsi"
#include "dsi-panel-sim-cmd.dtsi"
#include "dsi-panel-sim-dsc375-cmd.dtsi"
#include "dsi-panel-sim-dualmipi-video.dtsi"
#include "dsi-panel-sim-dualmipi-cmd.dtsi"
#include "dsi-panel-sim-dualmipi-dsc375-cmd.dtsi"
#include "dsi-panel-sharp-dsc-4k-video.dtsi"
#include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
#include "dsi-panel-nt35597-truly-dualmipi-wqxga-video.dtsi"
#include "dsi-panel-nt35597-truly-dualmipi-wqxga-cmd.dtsi"
#include "dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi"
#include "dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi"
#include "dsi-panel-nt35695b-truly-fhd-video.dtsi"
#include "dsi-panel-nt35695b-truly-fhd-cmd.dtsi"
#include "dsi-panel-sharp-1080p-cmd.dtsi"
#include "dsi-panel-sharp-dualmipi-1080p-120hz.dtsi"
#include "dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi"
#include "dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi"
#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
&soc {
dsi_panel_pwr_supply: dsi_panel_pwr_supply {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <62000>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <20>;
};
qcom,panel-supply-entry@1 {
reg = <1>;
qcom,supply-name = "lab";
qcom,supply-min-voltage = <4600000>;
qcom,supply-max-voltage = <6000000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
};
qcom,panel-supply-entry@2 {
reg = <2>;
qcom,supply-name = "ibb";
qcom,supply-min-voltage = <4600000>;
qcom,supply-max-voltage = <6000000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
qcom,supply-post-on-sleep = <20>;
};
};
dsi_panel_pwr_supply_no_labibb: dsi_panel_pwr_supply_no_labibb {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <62000>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <20>;
};
};
dsi_panel_pwr_supply_vdd_no_labibb: dsi_panel_pwr_supply_vdd_no_labibb {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <62000>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <20>;
};
qcom,panel-supply-entry@1 {
reg = <1>;
qcom,supply-name = "vdd";
qcom,supply-min-voltage = <3000000>;
qcom,supply-max-voltage = <3000000>;
qcom,supply-enable-load = <857000>;
qcom,supply-disable-load = <0>;
qcom,supply-post-on-sleep = <0>;
};
};
dsi_sharp_4k_dsc_video_display: qcom,dsi-display@0 {
label = "dsi_sharp_4k_dsc_video_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sharp_4k_dsc_video>;
};
dsi_sharp_4k_dsc_cmd_display: qcom,dsi-display@1 {
label = "dsi_sharp_4k_dsc_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sharp_4k_dsc_cmd>;
};
dsi_sharp_1080_cmd_display: qcom,dsi-display@2 {
label = "dsi_sharp_1080_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sharp_1080_cmd>;
};
dsi_dual_sharp_1080_120hz_cmd_display: qcom,dsi-display@3 {
label = "dsi_dual_sharp_1080_120hz_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_dual_sharp_1080_120hz_cmd>;
};
dsi_dual_nt35597_truly_video_display: qcom,dsi-display@4 {
label = "dsi_dual_nt35597_truly_video_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_dual_nt35597_truly_video>;
};
dsi_dual_nt35597_truly_cmd_display: qcom,dsi-display@5 {
label = "dsi_dual_nt35597_truly_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_dual_nt35597_truly_cmd>;
};
dsi_nt35597_truly_dsc_cmd_display: qcom,dsi-display@6 {
label = "dsi_nt35597_truly_dsc_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <1>;
qcom,dsi-phy-num = <1>;
qcom,dsi-select-clocks = "mux_byte_clk1", "mux_pixel_clk1";
qcom,dsi-panel = <&dsi_nt35597_truly_dsc_cmd>;
};
dsi_nt35597_truly_dsc_video_display: qcom,dsi-display@7 {
label = "dsi_nt35597_truly_dsc_video_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <1>;
qcom,dsi-phy-num = <1>;
qcom,dsi-select-clocks = "mux_byte_clk1", "mux_pixel_clk1";
qcom,dsi-panel = <&dsi_nt35597_truly_dsc_video>;
};
dsi_sim_vid_display: qcom,dsi-display@8 {
label = "dsi_sim_vid_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sim_vid>;
};
dsi_dual_sim_vid_display: qcom,dsi-display@9 {
label = "dsi_dual_sim_vid_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_dual_sim_vid>;
};
dsi_sim_cmd_display: qcom,dsi-display@10 {
label = "dsi_sim_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sim_cmd>;
};
dsi_dual_sim_cmd_display: qcom,dsi-display@11 {
label = "dsi_dual_sim_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_dual_sim_cmd>;
};
dsi_sim_dsc_375_cmd_display: qcom,dsi-display@12 {
label = "dsi_sim_dsc_375_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sim_dsc_375_cmd>;
};
dsi_dual_sim_dsc_375_cmd_display: qcom,dsi-display@13 {
label = "dsi_dual_sim_dsc_375_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0 1>;
qcom,dsi-phy-num = <0 1>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_dual_sim_dsc_375_cmd>;
};
dsi_sw43404_amoled_cmd_display: qcom,dsi-display@14 {
label = "dsi_sw43404_amoled_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_sw43404_amoled_cmd>;
};
dsi_nt35695b_truly_fhd_cmd_display: qcom,dsi-display@15 {
label = "dsi_nt35695b_truly_fhd_cmd_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_nt35695b_truly_fhd_cmd>;
};
dsi_nt35695b_truly_fhd_video_display: qcom,dsi-display@16 {
label = "dsi_nt35695b_truly_fhd_video_display";
qcom,display-type = "primary";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-panel = <&dsi_nt35695b_truly_fhd_video>;
};
sde_dsi: qcom,dsi-display {
compatible = "qcom,dsi-display";
qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
<&mdss_dsi0_pll PCLK_MUX_0_CLK>,
<&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
<&mdss_dsi1_pll PCLK_MUX_1_CLK>;
clock-names = "mux_byte_clk0", "mux_pixel_clk0",
"mux_byte_clk1", "mux_pixel_clk1";
pinctrl-names = "panel_active", "panel_suspend";
pinctrl-0 = <&sde_dsi_active &sde_te_active>;
pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
qcom,platform-te-gpio = <&tlmm 8 0>;
vddio-supply = <&pm8150c_l1>;
lab-supply = <&lcdb_ldo_vreg>;
ibb-supply = <&lcdb_ncp_vreg>;
qcom,dsi-display-list =
<&dsi_sharp_4k_dsc_video_display
&dsi_sharp_4k_dsc_cmd_display
&dsi_sharp_1080_cmd_display
&dsi_dual_sharp_1080_120hz_cmd_display
&dsi_dual_nt35597_truly_video_display
&dsi_dual_nt35597_truly_cmd_display
&dsi_nt35597_truly_dsc_cmd_display
&dsi_nt35597_truly_dsc_video_display
&dsi_sim_vid_display
&dsi_dual_sim_vid_display
&dsi_sim_cmd_display
&dsi_dual_sim_cmd_display
&dsi_sim_dsc_375_cmd_display
&dsi_dual_sim_dsc_375_cmd_display
&dsi_sw43404_amoled_cmd_display
&dsi_nt35695b_truly_fhd_cmd_display
&dsi_nt35695b_truly_fhd_video_display>;
};
sde_wb: qcom,wb-display@0 {
compatible = "qcom,wb-display";
cell-index = <0>;
label = "wb_display";
};
ext_disp: qcom,msm-ext-disp {
compatible = "qcom,msm-ext-disp";
ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {
compatible = "qcom,msm-ext-disp-audio-codec-rx";
};
};
};
&mdss_mdp {
connectors = <&sde_wb &sde_dsi>;
};
/* PHY TIMINGS REVISION P */
&dsi_dual_nt35597_truly_video {
qcom,mdss-dsi-t-clk-post = <0x17>;
qcom,mdss-dsi-t-clk-pre = <0x18>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
07 05 03 04 00 18 17];
qcom,display-topology = <2 0 2>,
<1 0 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_dual_nt35597_truly_cmd {
qcom,mdss-dsi-t-clk-post = <0x17>;
qcom,mdss-dsi-t-clk-pre = <0x18>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22 07
07 05 03 04 00 18 17];
qcom,display-topology = <2 0 2>,
<1 0 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_nt35597_truly_dsc_cmd {
qcom,mdss-dsi-t-clk-post = <0x15>;
qcom,mdss-dsi-t-clk-pre = <0x12>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05
05 03 03 04 00 12 15];
qcom,display-topology = <1 1 1>,
<2 2 1>, /* dsc merge */
<2 1 1>; /* 3d mux */
qcom,default-topology-index = <1>;
};
};
};
&dsi_nt35597_truly_dsc_video {
qcom,mdss-dsi-t-clk-post = <0x15>;
qcom,mdss-dsi-t-clk-pre = <0x12>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05
05 03 03 04 00 12 15];
qcom,display-topology = <1 1 1>,
<2 2 1>, /* dsc merge */
<2 1 1>; /* 3d mux */
qcom,default-topology-index = <1>;
};
};
};
&dsi_sharp_4k_dsc_video {
qcom,mdss-dsi-t-clk-post = <0x18>;
qcom,mdss-dsi-t-clk-pre = <0x19>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08
08 05 03 04 00 19 18];
qcom,display-topology = <2 2 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sharp_4k_dsc_cmd {
qcom,mdss-dsi-t-clk-post = <0x18>;
qcom,mdss-dsi-t-clk-pre = <0x19>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 08
08 05 03 04 00 19 18];
qcom,display-topology = <2 2 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_nt35695b_truly_fhd_video {
qcom,mdss-dsi-t-clk-post = <0x17>;
qcom,mdss-dsi-t-clk-pre = <0x19>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22
08 08 05 03 04 00 19 17];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_nt35695b_truly_fhd_cmd {
qcom,mdss-dsi-t-clk-post = <0x17>;
qcom,mdss-dsi-t-clk-pre = <0x19>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22
08 08 05 03 04 00 19 17];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_dual_sharp_1080_120hz_cmd {
qcom,mdss-dsi-t-clk-post = <0x0f>;
qcom,mdss-dsi-t-clk-pre = <0x36>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 24 09 09 26 24 09
09 06 03 04 00];
qcom,display-topology = <2 0 2>,
<1 0 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sharp_1080_cmd {
qcom,mdss-dsi-t-clk-post = <0x0c>;
qcom,mdss-dsi-t-clk-pre = <0x29>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 1A 06 06 22 20 07
07 04 03 04 00];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sim_vid {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [01 03 01 00 01 01 01
01 00 03 04 00 03 04];
qcom,display-topology = <1 0 1>,
<2 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_dual_sim_vid {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 13 03 03 05 06 03
03 02 03 04 00 10 06];
qcom,display-topology = <2 0 2>,
<1 0 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sim_cmd {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 03 01 00 01 01 02
01 00 03 04 00 03 04];
qcom,display-topology = <1 0 1>,
<2 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_dual_sim_cmd {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-display-timings {
timing@0{
qcom,mdss-dsi-panel-phy-timings = [00 13 03 03 05 06 03
03 02 03 04 00 10 06];
qcom,display-topology = <2 0 2>;
qcom,default-topology-index = <0>;
};
timing@1{
qcom,mdss-dsi-panel-phy-timings = [00 13 03 03 05 06 03
03 02 03 04 00 10 06];
qcom,display-topology = <2 0 2>,
<1 0 2>;
qcom,default-topology-index = <0>;
};
timing@2{
qcom,mdss-dsi-panel-phy-timings = [00 13 03 03 05 06 03
03 02 03 04 00 10 06];
qcom,display-topology = <2 0 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sim_dsc_375_cmd {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-display-timings {
timing@0 { /* 1080p */
qcom,mdss-dsi-panel-phy-timings = [00 12 03 04 07 07 04
04 03 03 04 00 13 07];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
timing@1 { /* qhd */
qcom,mdss-dsi-panel-phy-timings = [00 12 03 04 07 07 04
04 03 03 04 00 13 07];
qcom,display-topology = <1 1 1>,
<2 2 1>, /* dsc merge */
<2 1 1>; /* 3d mux */
qcom,default-topology-index = <0>;
};
};
};
&dsi_dual_sim_dsc_375_cmd {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-display-timings {
timing@0 { /* qhd */
qcom,mdss-dsi-panel-phy-timings = [00 13 03 03 05 06 03
03 02 03 04 00 10 06];
qcom,display-topology = <2 2 2>;
qcom,default-topology-index = <0>;
};
timing@1 { /* 4k */
qcom,mdss-dsi-panel-phy-timings = [00 13 03 03 05 06 03
03 02 03 04 00 10 06];
qcom,display-topology = <2 2 2>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sw43404_amoled_cmd {
qcom,mdss-dsi-t-clk-post = <0x16>;
qcom,mdss-dsi-t-clk-pre = <0x16>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 22 21 07
07 04 03 04 00 16 16];
qcom,display-topology = <2 2 1>;
qcom,default-topology-index = <0>;
};
};
};