arch/arm64/boot/dts/qcom/sa8195-vm.dtsi - kernel/msm.git - Git at Google

 /* Copyright (c) 2019, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
  * only version 2 as published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */

 #include "skeleton64.dtsi"
 #include <dt-bindings/clock/qcom,gcc-sdmshrike.h>
 #include <dt-bindings/clock/qcom,scc-sm8150.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 #include "quin-vm-common.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/msm/msm-bus-ids.h>

 / {
 	model = "Qualcomm Technologies, Inc. SA8195 Virtual Machine";
 	qcom,msm-name = "SA8195P";
 	qcom,msm-id = <405 0x20000>;

 	reserved_memory: reserved-memory {

 		pmem_shared: pmem_shared_region@a0000000 {
 			reg = <0x0 0xa0000000 0x0 0x20000000>;
 			label = "pmem_shared_mem";
 		};
 	};

 	aliases {
 		sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
 	};
 };

 &soc {
 	clock_virt: qcom,virtio-gcc {
 		compatible = "virtio,mmio";
 		reg = <0x1c200000 0x1000>;
 		interrupts = <0 48 0>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};

 	clock_virt_scc: qcom,virtio-scc {
 		compatible = "virtio,mmio";
 		reg = <0x1c300000 0x1000>;
 		interrupts = <0 49 0>;
 		#clock-cells = <1>;
 	};

 	regulator_virt: virtio_regulator@1c700000 {
 		compatible = "virtio,mmio";
 		reg = <0x1c700000 0x1000>;
 		interrupts = <0 42 0>;

 		usb30_prim_gdsc: usb30_prim_gdsc {
 			regulator-name = "usb30_prim_gdsc";
 		};

 		usb30_sec_gdsc: usb30_sec_gdsc {
 			regulator-name = "usb30_sec_gdsc";
 		};

 		pcie_0_gdsc: pcie_0_gdsc {
 			regulator-name = "pcie_0_gdsc";
 		};

 		L2A: pm8195_1_l2: regulator-pm8195-1-l2 {
 			regulator-name = "ldoa2";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <3300000>;
 		};

 		L9A: pm8195_1_l9: regulator-pm8195-1-l9 {
 			regulator-name = "ldoa9";
 			regulator-min-microvolt = <1150000>;
 			regulator-max-microvolt = <1250000>;
 			regulator-allow-set-load;
 		};

 		L10A: pm8195_1_l10: regulator-pm8195-1-l10 {
 			regulator-name = "ldoa10";
 			regulator-min-microvolt = <2700000>;
 			regulator-max-microvolt = <3544000>;
 		};

 		L12A: pm8195_1_l12: regulator-pm8195-1-l12 {
 			regulator-name = "ldoa12";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1890000>;
 		};

 		L7C: pm8195_2_l7: regulator-pm8195-2-l7 {
 			regulator-name = "ldoc7";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <2040000>;
 		};

 		L5E: pm8195_3_l5: regulator-pm8195-3-l5 {
 			regulator-name = "ldoe5";
 			regulator-min-microvolt = <800000>;
 			regulator-max-microvolt = <920000>;
 			regulator-allow-set-load;
 		};

 		L16E: pm8195_3_l16: regulator-pm8195-3-l16 {
 			regulator-name = "ldoe16";
 			regulator-min-microvolt = <2921000>;
 			regulator-max-microvolt = <3300000>;
 		};

 		S2A: pm8195_1_s2: regulator-pm8195-1-s2 {
 			regulator-name = "smpa2";
 			regulator-min-microvolt = <1179000>;
 			regulator-max-microvolt = <1379000>;
 		};

 		S5A: pm8195_1_s5: regulator-pm8195-1-s5 {
 			regulator-name = "smpa5";
 			regulator-min-microvolt = <900000>;
 			regulator-max-microvolt = <1000000>;
 		};

 		S5C: pm8195_2_s5: regulator-pm8195-2-s5 {
 			regulator-name = "smpc5";
 			regulator-min-microvolt = <1713000>;
 			regulator-max-microvolt = <2040000>;
 		};
 	};

 	apps_smmu: apps-smmu@0x15000000 {
 		compatible = "qcom,qsmmu-v500";
 		reg = <0x15000000 0x100000>,
 			<0x15182000 0x20>;
 		reg-names = "base", "tcu-base";
 		#iommu-cells = <2>;
 		qcom,skip-init;
 		qcom,use-3-lvl-tables;
 		qcom,disable-atos;
 		#global-interrupts = <1>;
 		#size-cells = <1>;
 		#address-cells = <1>;
 		ranges;
 		interrupts =	<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 777 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 778 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 779 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 794 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH>;

 		status = "disabled";
 	};

 	qcom,sps {
 		compatible = "qcom,msm-sps-4k";
 		qcom,pipe-attr-ee;
 		status = "disabled";
 	};


 	/* PWR_CTR2_VDD_1P8 supply */
 	vreg_conn_1p8: vreg_conn_1p8 {
 		compatible = "regulator-fixed";
 		regulator-name = "vreg_conn_1p8";
 		pinctrl-names = "default";
 		pinctrl-0 = <&conn_power_1p8_active>;
 		startup-delay-us = <4000>;
 		enable-active-high;
 		gpio = <&tlmm 173 0>;
 	};

 	/* PWR_CTR1_VDD_PA supply */
 	vreg_conn_pa: vreg_conn_pa {
 		compatible = "regulator-fixed";
 		regulator-name = "vreg_conn_pa";
 		pinctrl-names = "default";
 		pinctrl-0 = <&conn_power_pa_active>;
 		startup-delay-us = <4000>;
 		enable-active-high;
 		gpio = <&tlmm 174 0>;
 	};

 	/* Rome 3.3V supply */
 	vreg_wlan: vreg_wlan {
 		compatible = "qcom,stub-regulator";
 		regulator-name = "vreg_wlan";
 	};

 	VDD_CX_LEVEL:
 	S3E_LEVEL: pm8195_3_s3_level: regulator-pm8195-3-s3-level {
 		compatible = "qcom,stub-regulator";
 		regulator-name = "pm8195_3_s3_level";
 		regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
 		regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
 	};
 	qcom_seecom: qseecom@87a00000 {
 		compatible = "qcom,qseecom";
 		reg = <0x87a00000 0x2100000>;
 		reg-names = "secapp-region";
 		memory-region = <&qseecom_mem>;
 		qcom,hlos-num-ce-hw-instances = <1>;
 		qcom,hlos-ce-hw-instance = <0>;
 		qcom,qsee-ce-hw-instance = <0>;
 		qcom,disk-encrypt-pipe-pair = <2>;
 		qcom,no-clock-support;
 		qcom,qsee-reentrancy-support = <2>;
 	};

 	sdhc_2: sdhci@8804000 {
 		compatible = "qcom,sdhci-msm-v5";
 		reg = <0x8804000 0x1000>;
 		reg-names = "hc_mem";

 		interrupts = <0 204 0>, <0 222 0>;
 		interrupt-names = "hc_irq", "pwr_irq";

 		qcom,bus-width = <4>;
 		qcom,large-address-bus;

 		qcom,clk-rates = <400000 20000000 25000000
 					50000000 100000000 200000000>;
 		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
 				      "SDR104";

 		qcom,devfreq,freq-table = <50000000 200000000>;

 		qcom,msm-bus,name = "sdhc2";
 		qcom,msm-bus,num-cases = <8>;
 		qcom,msm-bus,num-paths = <2>;
 		qcom,msm-bus,vectors-KBps =
 			/* No vote */
 			<81 512 0 0>, <1 608 0 0>,
 			/* 400 KB/s*/
 			<81 512 1046 1600>,
 			<1 608 1600 1600>,
 			/* 20 MB/s */
 			<81 512 52286 80000>,
 			<1 608 80000 80000>,
 			/* 25 MB/s */
 			<81 512 65360 100000>,
 			<1 608 100000 100000>,
 			/* 50 MB/s */
 			<81 512 130718 200000>,
 			<1 608 100000 100000>,
 			/* 100 MB/s */
 			<81 512 261438 200000>,
 			<1 608 130000 130000>,
 			/* 200 MB/s */
 			<81 512 261438 400000>,
 			<1 608 300000 300000>,
 			/* Max. bandwidth */
 			<81 512 1338562 4096000>,
 			<1 608 1338562 4096000>;
 		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
 			100000000 200000000 4294967295>;

 		qcom,restore-after-cx-collapse;

 		/* PM QoS */
 		qcom,pm-qos-irq-type = "affine_irq";
 		qcom,pm-qos-irq-latency = <70 70>;
 		qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
 		qcom,pm-qos-legacy-latency-us = <70 70>, <70 70>;

 		clocks = <&clock_virt GCC_SDCC2_AHB_CLK>,
 			<&clock_virt GCC_SDCC2_APPS_CLK>;
 		clock-names = "iface_clk", "core_clk";

 		vdd-supply = <&pm8195_1_l10>;
 		qcom,vdd-voltage-level = <2950000 2960000>;
 		qcom,vdd-current-level = <200 800000>;

 		vdd-io-supply = <&pm8195_1_l2>;
 		qcom,vdd-io-voltage-level = <1808000 2960000>;
 		qcom,vdd-io-current-level = <200 22000>;

 		pinctrl-names = "active", "sleep";
 		pinctrl-0 = <&sdc2_clk_on
 			&sdc2_cmd_on &sdc2_data_on &storage_cd_default>;
 		pinctrl-1 = <&sdc2_clk_off
 			&sdc2_cmd_off &sdc2_data_off &storage_cd_default>;

 		broken-cd;
 		status = "disabled";
 	};

 	subsys_notif_virt: qcom,subsys_notif_virt@2D000000 {
 		compatible = "qcom,subsys-notif-virt";
 		reg = <0x2D000000 0x400>;
 		reg-names = "vdev_base";
 		adsp {
 			subsys-name = "adsp";
 			interrupts = <0 43 0>;
 			interrupt-names = "state-irq";
 			type = "virtual";
 			offset = <0>;
 		};
 		wlan {
 			subsys-name = "wlan";
 			type = "native";
 			offset = <512>;
 		};
 	};

 	bluetooth: bt_qca6174 {
 		compatible = "qca,qca6174";
 		pinctrl-names = "default";
 		pinctrl-0 = <&bt_en_active>;
 		/* BT_EN */
 		qca,bt-reset-gpio = <&tlmm 172 0>;
 		/* PWR_CTR1_VDD_PA */
 		qca,bt-vdd-pa-supply = <&vreg_conn_pa>;
 		/* PWR_CTR2_VDD_1P8 */
 		qca,bt-chip-pwd-supply = <&vreg_conn_1p8>;

 		qca,bt-vdd-vl-supply = <&pm8195_1_s5>;
 		qca,bt-vdd-vm-supply = <&pm8195_1_s2>;
 		qca,bt-vdd-vh-supply = <&pm8195_2_l7>;

 		qca,bt-vdd-vl-voltage-level = <1000000 1000000>;
 		qca,bt-vdd-vm-voltage-level = <1370000 1370000>;
 		qca,bt-vdd-vh-voltage-level = <1900000 1900000>;

 		qca,bt-vdd-vl-current-level = <0>;
 		qca,bt-vdd-vm-current-level = <0>;
 		qca,bt-vdd-vh-current-level = <450000>;
 		status = "ok";
 	};

 	cnss_pcie: qcom,cnss-qca-converged {
 		compatible = "qcom,cnss-qca-converged";

 		qcom,converged-dt;
 		qcom,wlan-rc-num = <0>;
 		qcom,bus-type=<0>;
 		qcom,notify-modem-status;
 		qcom,msm-bus,name = "msm-cnss";
 		qcom,msm-bus,num-cases = <6>;
 		qcom,msm-bus,num-paths = <1>;
 		qcom,msm-bus,vectors-KBps =
 		/* no vote */
 		<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 0 0>,
 		/* idle: 0-18 Mbps, ddr freq: 100 MHz */
 		<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 2250 400000>,
 		/* low: 18-60 Mbps, ddr freq: 200 MHz*/
 		<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 7500 800000>,
 		/* medium: 60-240 Mbps, ddr freq: 451.2 MHz */
 		<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 30000 1804800>,
 		/* high: 240 - 800 Mbps, ddr freq: 451.2 MHz */
 		<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 100000 1804800>,
 		/* very high: 800 - 1400 Mbps, ddr freq: 1555.2 MHz */
 		<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 175000 6220800>;

 		#address-cells=<1>;
 		#size-cells=<1>;
 		ranges = <0x10000000 0x10000000 0x10000000>,
 		      <0x20000000 0x20000000 0x10000>,
 		      <0xa0000000 0xa0000000 0x10000000>,
 		      <0xb0000000 0xb0000000 0x10000>;

 		vdd-wlan-ctrl1-supply = <&vreg_conn_pa>;
 		vdd-wlan-ctrl2-supply = <&vreg_conn_1p8>;
 		vdd-wlan-supply = <&vreg_wlan>;
 		vdd-wlan-aon-supply = <&pm8195_1_s5>;
 		vdd-wlan-rfa1-supply = <&pm8195_1_s2>;
 		vdd-wlan-rfa2-supply = <&pm8195_2_s5>;
 		vdd-wlan-rfa3-supply = <&pm8195_2_l7>;

 		wlan_vregs = "vdd-wlan-ctrl1", "vdd-wlan-ctrl2";
 		qcom,vdd-wlan-ctrl1-info = <0 0 0 0>;
 		qcom,vdd-wlan-ctrl2-info = <0 0 0 0>;
 		wlan-en-gpio = <&tlmm 169 0>;
 		pinctrl-names = "wlan_en_active", "wlan_en_sleep";
 		pinctrl-0 = <&cnss_wlan_en_active>;
 		pinctrl-1 = <&cnss_wlan_en_sleep>;

 		chip_cfg@0 {
 			reg = <0x10000000 0x10000000>,
 			    <0x20000000 0x10000>;
 			reg-names = "smmu_iova_base", "smmu_iova_ipa";

 			supported-ids = <0x003e>;
 			wlan_vregs = "vdd-wlan";
 			qcom,vdd-wlan-info = <0 0 0 10>;

 			qcom,smmu-s1-enable;
 			qcom,wlan-ramdump-dynamic = <0x200000>;
 		};

 		chip_cfg@1 {
 			reg = <0xa0000000 0x10000000>,
 			    <0xb0000000 0x10000>;
 			reg-names = "smmu_iova_base", "smmu_iova_ipa";

 			supported-ids = <0x1101>;
 			wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
 				   "vdd-wlan-rfa2", "vdd-wlan-rfa3";
 			qcom,vdd-wlan-aon-info = <1000000 1000000 0 0>;
 			qcom,vdd-wlan-rfa1-info = <1370000 1370000 0 0>;
 			qcom,vdd-wlan-rfa2-info = <2040000 2040000 0 0>;
 			qcom,vdd-wlan-rfa3-info = <1900000 1900000 450000 0>;
 			qcom,wlan-ramdump-dynamic = <0x400000>;
 			mhi,max-channels = <30>;
 			mhi,timeout = <10000>;

 			mhi_channels {
 				#address-cells = <1>;
 				#size-cells = <0>;
 				mhi_chan@0 {
 					reg = <0>;
 					label = "LOOPBACK";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <1>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@1 {
 					reg = <1>;
 					label = "LOOPBACK";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <2>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@4 {
 					reg = <4>;
 					label = "DIAG";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <1>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@5 {
 					reg = <5>;
 					label = "DIAG";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <2>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@20 {
 					reg = <20>;
 					label = "IPCR";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <1>;
 					mhi,data-type = <1>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 					mhi,auto-start;
 				};

 				mhi_chan@21 {
 					reg = <21>;
 					label = "IPCR";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <2>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 					mhi,auto-queue;
 					mhi,auto-start;
 				};
 			};

 			mhi_events {
 				mhi_event@0 {
 					mhi,num-elements = <32>;
 					mhi,intmod = <1>;
 					mhi,msi = <1>;
 					mhi,priority = <1>;
 					mhi,brstmode = <2>;
 					mhi,data-type = <1>;
 				};

 				mhi_event@1 {
 					mhi,num-elements = <256>;
 					mhi,intmod = <1>;
 					mhi,msi = <2>;
 					mhi,priority = <1>;
 					mhi,brstmode = <2>;
 				};
 			};
 		};

 		chip_cfg@2 {
 			reg = <0xa0000000 0x10000000>,
 			    <0xb0000000 0x10000>;
 			reg-names = "smmu_iova_base", "smmu_iova_ipa";

 			supported-ids = <0x1102>;
 			wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
 				   "vdd-wlan-rfa2", "vdd-wlan-rfa3";
 			qcom,vdd-wlan-aon-info = <1000000 1000000 0 0>;
 			qcom,vdd-wlan-rfa1-info = <1370000 1370000 0 0>;
 			qcom,vdd-wlan-rfa2-info = <2040000 2040000 0 0>;
 			qcom,vdd-wlan-rfa3-info = <1900000 1900000 0 0>;

 			qcom,wlan-ramdump-dynamic = <0x300000>;
 			mhi,max-channels = <30>;
 			mhi,timeout = <10000>;
 			mhi,ee = <0x3>, <0x4>;
 			mhi,ee-names = "SBL", "RDDM";
 			mhi,bhie-offset = <0x0324>;

 			mhi_channels {
 				#address-cells = <1>;
 				#size-cells = <0>;
 				mhi_chan@0 {
 					reg = <0>;
 					label = "LOOPBACK";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <1>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@1 {
 					reg = <1>;
 					label = "LOOPBACK";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <2>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@4 {
 					reg = <4>;
 					label = "DIAG";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <1>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@5 {
 					reg = <5>;
 					label = "DIAG";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <2>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 				};

 				mhi_chan@16 {
 					reg = <16>;
 					label = "IPCR";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <1>;
 					mhi,data-type = <1>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 					mhi,auto-start;
 				};

 				mhi_chan@17 {
 					reg = <17>;
 					label = "IPCR";
 					mhi,num-elements = <32>;
 					mhi,event-ring = <1>;
 					mhi,chan-dir = <2>;
 					mhi,data-type = <0>;
 					mhi,doorbell-mode = <2>;
 					mhi,ee = <0x14>;
 					mhi,auto-queue;
 					mhi,auto-start;
 				};
 			};

 			mhi_events {
 				mhi_event@0 {
 					mhi,num-elements = <32>;
 					mhi,intmod = <1>;
 					mhi,msi = <1>;
 					mhi,priority = <1>;
 					mhi,brstmode = <2>;
 					mhi,data-type = <1>;
 				};

 				mhi_event@1 {
 					mhi,num-elements = <256>;
 					mhi,intmod = <1>;
 					mhi,msi = <2>;
 					mhi,priority = <1>;
 					mhi,brstmode = <2>;
 				};
 			};
 		};
 	};
 };

 #include "sdmshrike-pinctrl.dtsi"
 #include "sm8150-slpi-pinctrl.dtsi"
 #include "sa8155-vm-qupv3.dtsi"
 #include "sa8195-vm-usb.dtsi"
 #include "sa8155-vm-audio.dtsi"
 #include "sa8195-vm-pcie.dtsi"
 #include "pm8195-vm.dtsi"

 &tlmm {
 	dirconn-list = <37 216 1>;
 };
	/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
	*
	* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License version 2 and
	* only version 2 as published by the Free Software Foundation.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*/

	#include "skeleton64.dtsi"
	#include <dt-bindings/clock/qcom,gcc-sdmshrike.h>
	#include <dt-bindings/clock/qcom,scc-sm8150.h>
	#include <dt-bindings/interrupt-controller/arm-gic.h>
	#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
	#include "quin-vm-common.dtsi"
	#include <dt-bindings/gpio/gpio.h>
	#include <dt-bindings/msm/msm-bus-ids.h>

	/ {
	model = "Qualcomm Technologies, Inc. SA8195 Virtual Machine";
	qcom,msm-name = "SA8195P";
	qcom,msm-id = <405 0x20000>;

	reserved_memory: reserved-memory {

	pmem_shared: pmem_shared_region@a0000000 {
	reg = <0x0 0xa0000000 0x0 0x20000000>;
	label = "pmem_shared_mem";
	};
	};

	aliases {
	sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
	};
	};

	&soc {
	clock_virt: qcom,virtio-gcc {
	compatible = "virtio,mmio";
	reg = <0x1c200000 0x1000>;
	interrupts = <0 48 0>;
	#clock-cells = <1>;
	#reset-cells = <1>;
	};

	clock_virt_scc: qcom,virtio-scc {
	compatible = "virtio,mmio";
	reg = <0x1c300000 0x1000>;
	interrupts = <0 49 0>;
	#clock-cells = <1>;
	};

	regulator_virt: virtio_regulator@1c700000 {
	compatible = "virtio,mmio";
	reg = <0x1c700000 0x1000>;
	interrupts = <0 42 0>;

	usb30_prim_gdsc: usb30_prim_gdsc {
	regulator-name = "usb30_prim_gdsc";
	};

	usb30_sec_gdsc: usb30_sec_gdsc {
	regulator-name = "usb30_sec_gdsc";
	};

	pcie_0_gdsc: pcie_0_gdsc {
	regulator-name = "pcie_0_gdsc";
	};

	L2A: pm8195_1_l2: regulator-pm8195-1-l2 {
	regulator-name = "ldoa2";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <3300000>;
	};

	L9A: pm8195_1_l9: regulator-pm8195-1-l9 {
	regulator-name = "ldoa9";
	regulator-min-microvolt = <1150000>;
	regulator-max-microvolt = <1250000>;
	regulator-allow-set-load;
	};

	L10A: pm8195_1_l10: regulator-pm8195-1-l10 {
	regulator-name = "ldoa10";
	regulator-min-microvolt = <2700000>;
	regulator-max-microvolt = <3544000>;
	};

	L12A: pm8195_1_l12: regulator-pm8195-1-l12 {
	regulator-name = "ldoa12";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1890000>;
	};

	L7C: pm8195_2_l7: regulator-pm8195-2-l7 {
	regulator-name = "ldoc7";
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <2040000>;
	};

	L5E: pm8195_3_l5: regulator-pm8195-3-l5 {
	regulator-name = "ldoe5";
	regulator-min-microvolt = <800000>;
	regulator-max-microvolt = <920000>;
	regulator-allow-set-load;
	};

	L16E: pm8195_3_l16: regulator-pm8195-3-l16 {
	regulator-name = "ldoe16";
	regulator-min-microvolt = <2921000>;
	regulator-max-microvolt = <3300000>;
	};

	S2A: pm8195_1_s2: regulator-pm8195-1-s2 {
	regulator-name = "smpa2";
	regulator-min-microvolt = <1179000>;
	regulator-max-microvolt = <1379000>;
	};

	S5A: pm8195_1_s5: regulator-pm8195-1-s5 {
	regulator-name = "smpa5";
	regulator-min-microvolt = <900000>;
	regulator-max-microvolt = <1000000>;
	};

	S5C: pm8195_2_s5: regulator-pm8195-2-s5 {
	regulator-name = "smpc5";
	regulator-min-microvolt = <1713000>;
	regulator-max-microvolt = <2040000>;
	};
	};

	apps_smmu: apps-smmu@0x15000000 {
	compatible = "qcom,qsmmu-v500";
	reg = <0x15000000 0x100000>,
	<0x15182000 0x20>;
	reg-names = "base", "tcu-base";
	#iommu-cells = <2>;
	qcom,skip-init;
	qcom,use-3-lvl-tables;
	qcom,disable-atos;
	#global-interrupts = <1>;
	#size-cells = <1>;
	#address-cells = <1>;
	ranges;
	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 777 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 778 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 779 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 794 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH>;

	status = "disabled";
	};

	qcom,sps {
	compatible = "qcom,msm-sps-4k";
	qcom,pipe-attr-ee;
	status = "disabled";
	};


	/* PWR_CTR2_VDD_1P8 supply */
	vreg_conn_1p8: vreg_conn_1p8 {
	compatible = "regulator-fixed";
	regulator-name = "vreg_conn_1p8";
	pinctrl-names = "default";
	pinctrl-0 = <&conn_power_1p8_active>;
	startup-delay-us = <4000>;
	enable-active-high;
	gpio = <&tlmm 173 0>;
	};

	/* PWR_CTR1_VDD_PA supply */
	vreg_conn_pa: vreg_conn_pa {
	compatible = "regulator-fixed";
	regulator-name = "vreg_conn_pa";
	pinctrl-names = "default";
	pinctrl-0 = <&conn_power_pa_active>;
	startup-delay-us = <4000>;
	enable-active-high;
	gpio = <&tlmm 174 0>;
	};

	/* Rome 3.3V supply */
	vreg_wlan: vreg_wlan {
	compatible = "qcom,stub-regulator";
	regulator-name = "vreg_wlan";
	};

	VDD_CX_LEVEL:
	S3E_LEVEL: pm8195_3_s3_level: regulator-pm8195-3-s3-level {
	compatible = "qcom,stub-regulator";
	regulator-name = "pm8195_3_s3_level";
	regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
	regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
	};
	qcom_seecom: qseecom@87a00000 {
	compatible = "qcom,qseecom";
	reg = <0x87a00000 0x2100000>;
	reg-names = "secapp-region";
	memory-region = <&qseecom_mem>;
	qcom,hlos-num-ce-hw-instances = <1>;
	qcom,hlos-ce-hw-instance = <0>;
	qcom,qsee-ce-hw-instance = <0>;
	qcom,disk-encrypt-pipe-pair = <2>;
	qcom,no-clock-support;
	qcom,qsee-reentrancy-support = <2>;
	};

	sdhc_2: sdhci@8804000 {
	compatible = "qcom,sdhci-msm-v5";
	reg = <0x8804000 0x1000>;
	reg-names = "hc_mem";

	interrupts = <0 204 0>, <0 222 0>;
	interrupt-names = "hc_irq", "pwr_irq";

	qcom,bus-width = <4>;
	qcom,large-address-bus;

	qcom,clk-rates = <400000 20000000 25000000
	50000000 100000000 200000000>;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
	"SDR104";

	qcom,devfreq,freq-table = <50000000 200000000>;

	qcom,msm-bus,name = "sdhc2";
	qcom,msm-bus,num-cases = <8>;
	qcom,msm-bus,num-paths = <2>;
	qcom,msm-bus,vectors-KBps =
	/* No vote */
	<81 512 0 0>, <1 608 0 0>,
	/* 400 KB/s*/
	<81 512 1046 1600>,
	<1 608 1600 1600>,
	/* 20 MB/s */
	<81 512 52286 80000>,
	<1 608 80000 80000>,
	/* 25 MB/s */
	<81 512 65360 100000>,
	<1 608 100000 100000>,
	/* 50 MB/s */
	<81 512 130718 200000>,
	<1 608 100000 100000>,
	/* 100 MB/s */
	<81 512 261438 200000>,
	<1 608 130000 130000>,
	/* 200 MB/s */
	<81 512 261438 400000>,
	<1 608 300000 300000>,
	/* Max. bandwidth */
	<81 512 1338562 4096000>,
	<1 608 1338562 4096000>;
	qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
	100000000 200000000 4294967295>;

	qcom,restore-after-cx-collapse;

	/* PM QoS */
	qcom,pm-qos-irq-type = "affine_irq";
	qcom,pm-qos-irq-latency = <70 70>;
	qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
	qcom,pm-qos-legacy-latency-us = <70 70>, <70 70>;

	clocks = <&clock_virt GCC_SDCC2_AHB_CLK>,
	<&clock_virt GCC_SDCC2_APPS_CLK>;
	clock-names = "iface_clk", "core_clk";

	vdd-supply = <&pm8195_1_l10>;
	qcom,vdd-voltage-level = <2950000 2960000>;
	qcom,vdd-current-level = <200 800000>;

	vdd-io-supply = <&pm8195_1_l2>;
	qcom,vdd-io-voltage-level = <1808000 2960000>;
	qcom,vdd-io-current-level = <200 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on
	&sdc2_cmd_on &sdc2_data_on &storage_cd_default>;
	pinctrl-1 = <&sdc2_clk_off
	&sdc2_cmd_off &sdc2_data_off &storage_cd_default>;

	broken-cd;
	status = "disabled";
	};

	subsys_notif_virt: qcom,subsys_notif_virt@2D000000 {
	compatible = "qcom,subsys-notif-virt";
	reg = <0x2D000000 0x400>;
	reg-names = "vdev_base";
	adsp {
	subsys-name = "adsp";
	interrupts = <0 43 0>;
	interrupt-names = "state-irq";
	type = "virtual";
	offset = <0>;
	};
	wlan {
	subsys-name = "wlan";
	type = "native";
	offset = <512>;
	};
	};

	bluetooth: bt_qca6174 {
	compatible = "qca,qca6174";
	pinctrl-names = "default";
	pinctrl-0 = <&bt_en_active>;
	/* BT_EN */
	qca,bt-reset-gpio = <&tlmm 172 0>;
	/* PWR_CTR1_VDD_PA */
	qca,bt-vdd-pa-supply = <&vreg_conn_pa>;
	/* PWR_CTR2_VDD_1P8 */
	qca,bt-chip-pwd-supply = <&vreg_conn_1p8>;

	qca,bt-vdd-vl-supply = <&pm8195_1_s5>;
	qca,bt-vdd-vm-supply = <&pm8195_1_s2>;
	qca,bt-vdd-vh-supply = <&pm8195_2_l7>;

	qca,bt-vdd-vl-voltage-level = <1000000 1000000>;
	qca,bt-vdd-vm-voltage-level = <1370000 1370000>;
	qca,bt-vdd-vh-voltage-level = <1900000 1900000>;

	qca,bt-vdd-vl-current-level = <0>;
	qca,bt-vdd-vm-current-level = <0>;
	qca,bt-vdd-vh-current-level = <450000>;
	status = "ok";
	};

	cnss_pcie: qcom,cnss-qca-converged {
	compatible = "qcom,cnss-qca-converged";

	qcom,converged-dt;
	qcom,wlan-rc-num = <0>;
	qcom,bus-type=<0>;
	qcom,notify-modem-status;
	qcom,msm-bus,name = "msm-cnss";
	qcom,msm-bus,num-cases = <6>;
	qcom,msm-bus,num-paths = <1>;
	qcom,msm-bus,vectors-KBps =
	/* no vote */
	<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 0 0>,
	/* idle: 0-18 Mbps, ddr freq: 100 MHz */
	<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 2250 400000>,
	/* low: 18-60 Mbps, ddr freq: 200 MHz*/
	<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 7500 800000>,
	/* medium: 60-240 Mbps, ddr freq: 451.2 MHz */
	<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 30000 1804800>,
	/* high: 240 - 800 Mbps, ddr freq: 451.2 MHz */
	<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 100000 1804800>,
	/* very high: 800 - 1400 Mbps, ddr freq: 1555.2 MHz */
	<MSM_BUS_MASTER_PCIE MSM_BUS_SLAVE_FIRST 175000 6220800>;

	#address-cells=<1>;
	#size-cells=<1>;
	ranges = <0x10000000 0x10000000 0x10000000>,
	<0x20000000 0x20000000 0x10000>,
	<0xa0000000 0xa0000000 0x10000000>,
	<0xb0000000 0xb0000000 0x10000>;

	vdd-wlan-ctrl1-supply = <&vreg_conn_pa>;
	vdd-wlan-ctrl2-supply = <&vreg_conn_1p8>;
	vdd-wlan-supply = <&vreg_wlan>;
	vdd-wlan-aon-supply = <&pm8195_1_s5>;
	vdd-wlan-rfa1-supply = <&pm8195_1_s2>;
	vdd-wlan-rfa2-supply = <&pm8195_2_s5>;
	vdd-wlan-rfa3-supply = <&pm8195_2_l7>;

	wlan_vregs = "vdd-wlan-ctrl1", "vdd-wlan-ctrl2";
	qcom,vdd-wlan-ctrl1-info = <0 0 0 0>;
	qcom,vdd-wlan-ctrl2-info = <0 0 0 0>;
	wlan-en-gpio = <&tlmm 169 0>;
	pinctrl-names = "wlan_en_active", "wlan_en_sleep";
	pinctrl-0 = <&cnss_wlan_en_active>;
	pinctrl-1 = <&cnss_wlan_en_sleep>;

	chip_cfg@0 {
	reg = <0x10000000 0x10000000>,
	<0x20000000 0x10000>;
	reg-names = "smmu_iova_base", "smmu_iova_ipa";

	supported-ids = <0x003e>;
	wlan_vregs = "vdd-wlan";
	qcom,vdd-wlan-info = <0 0 0 10>;

	qcom,smmu-s1-enable;
	qcom,wlan-ramdump-dynamic = <0x200000>;
	};

	chip_cfg@1 {
	reg = <0xa0000000 0x10000000>,
	<0xb0000000 0x10000>;
	reg-names = "smmu_iova_base", "smmu_iova_ipa";

	supported-ids = <0x1101>;
	wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
	"vdd-wlan-rfa2", "vdd-wlan-rfa3";
	qcom,vdd-wlan-aon-info = <1000000 1000000 0 0>;
	qcom,vdd-wlan-rfa1-info = <1370000 1370000 0 0>;
	qcom,vdd-wlan-rfa2-info = <2040000 2040000 0 0>;
	qcom,vdd-wlan-rfa3-info = <1900000 1900000 450000 0>;
	qcom,wlan-ramdump-dynamic = <0x400000>;
	mhi,max-channels = <30>;
	mhi,timeout = <10000>;

	mhi_channels {
	#address-cells = <1>;
	#size-cells = <0>;
	mhi_chan@0 {
	reg = <0>;
	label = "LOOPBACK";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <1>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@1 {
	reg = <1>;
	label = "LOOPBACK";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <2>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@4 {
	reg = <4>;
	label = "DIAG";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <1>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@5 {
	reg = <5>;
	label = "DIAG";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <2>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@20 {
	reg = <20>;
	label = "IPCR";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <1>;
	mhi,data-type = <1>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	mhi,auto-start;
	};

	mhi_chan@21 {
	reg = <21>;
	label = "IPCR";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <2>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	mhi,auto-queue;
	mhi,auto-start;
	};
	};

	mhi_events {
	mhi_event@0 {
	mhi,num-elements = <32>;
	mhi,intmod = <1>;
	mhi,msi = <1>;
	mhi,priority = <1>;
	mhi,brstmode = <2>;
	mhi,data-type = <1>;
	};

	mhi_event@1 {
	mhi,num-elements = <256>;
	mhi,intmod = <1>;
	mhi,msi = <2>;
	mhi,priority = <1>;
	mhi,brstmode = <2>;
	};
	};
	};

	chip_cfg@2 {
	reg = <0xa0000000 0x10000000>,
	<0xb0000000 0x10000>;
	reg-names = "smmu_iova_base", "smmu_iova_ipa";

	supported-ids = <0x1102>;
	wlan_vregs = "vdd-wlan-aon", "vdd-wlan-rfa1",
	"vdd-wlan-rfa2", "vdd-wlan-rfa3";
	qcom,vdd-wlan-aon-info = <1000000 1000000 0 0>;
	qcom,vdd-wlan-rfa1-info = <1370000 1370000 0 0>;
	qcom,vdd-wlan-rfa2-info = <2040000 2040000 0 0>;
	qcom,vdd-wlan-rfa3-info = <1900000 1900000 0 0>;

	qcom,wlan-ramdump-dynamic = <0x300000>;
	mhi,max-channels = <30>;
	mhi,timeout = <10000>;
	mhi,ee = <0x3>, <0x4>;
	mhi,ee-names = "SBL", "RDDM";
	mhi,bhie-offset = <0x0324>;

	mhi_channels {
	#address-cells = <1>;
	#size-cells = <0>;
	mhi_chan@0 {
	reg = <0>;
	label = "LOOPBACK";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <1>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@1 {
	reg = <1>;
	label = "LOOPBACK";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <2>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@4 {
	reg = <4>;
	label = "DIAG";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <1>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@5 {
	reg = <5>;
	label = "DIAG";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <2>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	};

	mhi_chan@16 {
	reg = <16>;
	label = "IPCR";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <1>;
	mhi,data-type = <1>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	mhi,auto-start;
	};

	mhi_chan@17 {
	reg = <17>;
	label = "IPCR";
	mhi,num-elements = <32>;
	mhi,event-ring = <1>;
	mhi,chan-dir = <2>;
	mhi,data-type = <0>;
	mhi,doorbell-mode = <2>;
	mhi,ee = <0x14>;
	mhi,auto-queue;
	mhi,auto-start;
	};
	};

	mhi_events {
	mhi_event@0 {
	mhi,num-elements = <32>;
	mhi,intmod = <1>;
	mhi,msi = <1>;
	mhi,priority = <1>;
	mhi,brstmode = <2>;
	mhi,data-type = <1>;
	};

	mhi_event@1 {
	mhi,num-elements = <256>;
	mhi,intmod = <1>;
	mhi,msi = <2>;
	mhi,priority = <1>;
	mhi,brstmode = <2>;
	};
	};
	};
	};
	};

	#include "sdmshrike-pinctrl.dtsi"
	#include "sm8150-slpi-pinctrl.dtsi"
	#include "sa8155-vm-qupv3.dtsi"
	#include "sa8195-vm-usb.dtsi"
	#include "sa8155-vm-audio.dtsi"
	#include "sa8195-vm-pcie.dtsi"
	#include "pm8195-vm.dtsi"

	&tlmm {
	dirconn-list = <37 216 1>;
	};