| /* |
| * Copyright (c) 2016, 2019, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| &soc { |
| /* GCC GDSCs */ |
| gdsc_usb30: qcom,gdsc@10f004 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_usb30"; |
| reg = <0x10f004 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_ufs: qcom,gdsc@175004 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_ufs"; |
| reg = <0x175004 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_hlos1_vote_lpass_adsp: qcom,gdsc@17d034 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_hlos1_vote_lpass_adsp"; |
| reg = <0x17d034 0x4>; |
| qcom,no-status-check-on-disable; |
| qcom,gds-timeout = <500>; |
| status = "disabled"; |
| }; |
| |
| gdsc_hlos1_vote_turing_adsp: qcom,gdsc@17d04c { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_hlos1_vote_turing_adsp"; |
| reg = <0x17d04c 0x4>; |
| qcom,no-status-check-on-disable; |
| qcom,gds-timeout = <500>; |
| status = "disabled"; |
| }; |
| |
| gdsc_hlos2_vote_turing_adsp: qcom,gdsc@17e04c { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_hlos2_vote_turing_adsp"; |
| reg = <0x17e04c 0x4>; |
| qcom,no-status-check-on-disable; |
| qcom,gds-timeout = <500>; |
| status = "disabled"; |
| }; |
| |
| /* MMSS GDSCs */ |
| bimc_smmu_hw_ctrl: syscon@c8ce024 { |
| compatible = "syscon"; |
| reg = <0xc8ce024 0x4>; |
| }; |
| |
| gdsc_bimc_smmu: qcom,gdsc@c8ce020 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_bimc_smmu"; |
| reg = <0xc8ce020 0x4>; |
| hw-ctrl-addr = <&bimc_smmu_hw_ctrl>; |
| qcom,no-status-check-on-disable; |
| qcom,gds-timeout = <500>; |
| status = "disabled"; |
| }; |
| |
| gdsc_venus: qcom,gdsc@c8c1024 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_venus"; |
| reg = <0xc8c1024 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_venus_core0: qcom,gdsc@c8c1040 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_venus_core0"; |
| reg = <0xc8c1040 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_camss_top: qcom,gdsc@c8c34a0 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_camss_top"; |
| reg = <0xc8c34a0 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_vfe0: qcom,gdsc@c8c3664 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_vfe0"; |
| reg = <0xc8c3664 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_vfe1: qcom,gdsc@c8c3674 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_vfe1"; |
| reg = <0xc8c3674 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_cpp: qcom,gdsc@c8c36d4 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_cpp"; |
| reg = <0xc8c36d4 0x4>; |
| status = "disabled"; |
| }; |
| |
| gdsc_mdss: qcom,gdsc@c8c2304 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_mdss"; |
| reg = <0xc8c2304 0x4>; |
| status = "disabled"; |
| }; |
| |
| /* GPU GDSCs */ |
| gpu_cx_hw_ctrl: syscon@5066008 { |
| compatible = "syscon"; |
| reg = <0x5066008 0x4>; |
| }; |
| |
| gdsc_gpu_cx: qcom,gdsc@5066004 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_gpu_cx"; |
| reg = <0x5066004 0x4>; |
| hw-ctrl-addr = <&gpu_cx_hw_ctrl>; |
| qcom,no-status-check-on-disable; |
| qcom,gds-timeout = <2000>; |
| status = "disabled"; |
| }; |
| |
| /* GPU GX GDSCs */ |
| gpu_gx_domain_addr: syscon@5065130 { |
| compatible = "syscon"; |
| reg = <0x5065130 0x4>; |
| }; |
| |
| gpu_gx_sw_reset: syscon@5066090 { |
| compatible = "syscon"; |
| reg = <0x5066090 0x4>; |
| }; |
| |
| gdsc_gpu_gx: qcom,gdsc@5066094 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_gpu_gx"; |
| reg = <0x5066094 0x4>; |
| domain-addr = <&gpu_gx_domain_addr>; |
| sw-reset = <&gpu_gx_sw_reset>; |
| qcom,retain-periph; |
| qcom,reset-aon-logic; |
| status = "disabled"; |
| }; |
| }; |