Documentation/devicetree/bindings/arm/msm/smem.txt

MSM Shared Memory

[Root level node]
Required properties:
-compatible : should be "qcom,smem"
-reg : the location and size of smem (optional)
	the irq register base address (required)
	the location and size of auxiliary smem areas (optional)
	the smem target info either from IMEM or register (optional)
-reg-names : "smem" - optional string to identify the shared memory region
	     "irq-reg-base" - string to identify the irq register region
	     "aux-mem1", "aux-mem2", "aux-mem3", ... - optional strings to
			identify any auxiliary shared memory regions
	     "smem_targ_info_imem" - optional string to identify
				the smem target info from IMEM memory
	     "smem_targ_info_reg" - optional string to identify
				the smem target info from registers
	     one of the optional register names smem_targ_info_imem,
				smem_targ_info_reg, or smem is required.

Optional properties:
-qcom,mpu-enabled : boolean value indicating that Memory Protection Unit based
	security is enabled on the "smem" shared memory region

[Second level nodes]

qcom,smd
Required properties:
-compatible : should be "qcom,smd"
-qcom,smd-edge : the smd edge
-qcom,smd-irq-offset : the offset into the irq register base memory for sending
	interrupts
-qcom,smd-irq-bitmask : the sending irq bitmask
-interrupts : the receiving interrupt line
-label : the name of the remote subsystem for this edge

Optional properties:
-qcom,irq-no-suspend: configure the incoming irq line as active during suspend
-qcom,not-loadable : indicates this processor cannot be loaded by PIL

qcom,smsm
Required properties:
-compatible : should be "qcom,smsm"
-qcom,smsm-edge : the smsm edge
-qcom,smsm-irq-offset : the offset into the irq register base memory for sending
	interrupts
-qcom,smsm-irq-bitmask : the sending irq bitmask
-interrupts : the receiving interrupt line


Example:

	qcom,smem@fa00000 {
		compatible = "qcom,smem";
		reg = <0xfa00000 0x200000>,
			<0xfa006000 0x1000>,
			<0xfc428000 0x4000>;
		reg-names = "smem", "irq-reg-base", "aux-mem1";

		qcom,smd-modem {
			compatible = "qcom,smd";
			qcom,smd-edge = <0>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x1000>;
			interrupts = <0 25 1>;
			label = "modem";
		};

		qcom,smsm-modem {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <0>;
			qcom,smsm-irq-offset = <0x8>;
			qcom,smsm-irq-bitmask = <0x2000>;
			interrupts = <0 26 1>;
		};

		qcom,smd-adsp {
			compatible = "qcom,smd";
			qcom,smd-edge = <1>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x100>;
			interrupts = <0 156 1>;
			label = "adsp";
		};

		qcom,smsm-adsp {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <1>;
			qcom,smsm-irq-offset = <0x8>;
			qcom,smsm-irq-bitmask = <0x200>;
			interrupts = <0 157 1>;
		};

		qcom,smd-wcnss {
			compatible = "qcom,smd";
			qcom,smd-edge = <6>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x20000>;
			interrupts = <0 142 1>;
			label = "wcnss";
		};

		qcom,smsm-wcnss {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <6>;
			qcom,smsm-irq-offset = <0x8>;
			qcom,smsm-irq-bitmask = <0x80000>;
			interrupts = <0 144 1>;
		};

		qcom,smd-rpm {
			compatible = "qcom,smd";
			qcom,smd-edge = <15>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x1>;
			interrupts = <0 168 1>;
			label = "rpm";
			qcom,irq-no-syspend;
			qcom,not-loadable;
		};
	};