arch/arm64/boot/dts/qcom/sm8150-slpi-pinctrl.dtsi

/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&soc {
	slpi_tlmm: slpi_pinctrl@02B40000 {
		compatible = "qcom,slpi-pinctrl";
		reg = <0x2B40000 0x20000>;
		qcom,num-pins = <14>;
		status = "disabled";

		qupv3_se20_i2c_pins: qupv3_se20_i2c_pins {
			qupv3_se20_i2c_active: qupv3_se20_i2c_active {
				mux {
					pins = "gpio0", "gpio1";
					function = "func1";
				};

				config {
					pins = "gpio0", "gpio1";
					drive-strength = <2>;
					bias-disable;
				};
			};

			qupv3_se20_i2c_sleep: qupv3_se20_i2c_sleep {
				mux {
					pins = "gpio0", "gpio1";
					function = "gpio";
				};

				config {
					pins = "gpio0", "gpio1";
					drive-strength = <2>;
					bias-pull-down;
				};
			};
		};

		qupv3_se21_i2c_pins: qupv3_se21_i2c_pins {
			qupv3_se21_i2c_active: qupv3_se21_i2c_active {
				mux {
					pins = "gpi2", "gpio3";
					function = "func1";
				};

				config {
					pins = "gpio2", "gpio3";
					drive-strength = <2>;
					bias-disable;
				};
			};

			qupv3_se21_i2c_sleep: qupv3_se21_i2c_sleep {
				mux {
					pins = "gpio2", "gpio3";
					function = "gpio";
				};

				config {
					pins = "gpio2", "gpio3";
					drive-strength = <2>;
					bias-pull-down;
				};
			};
		};

		qupv3_se22_i2c_pins: qupv3_se22_i2c_pins {
			qupv3_se22_i2c_active: qupv3_se22_i2c_active {
				mux {
					pins = "gpio6", "gpio7";
					function = "func1";
				};

				config {
					pins = "gpio6", "gpio7";
					drive-strength = <2>;
					bias-disable;
				};
			};

			qupv3_se22_i2c_sleep: qupv3_se22_i2c_sleep {
				mux {
					pins = "gpio6", "gpio7";
					function = "gpio";
				};

				config {
					pins = "gpio6", "gpio7";
					drive-strength = <2>;
					bias-pull-down;
				};
			};
		};

		qupv3_se23_i2c_pins: qupv3_se23_i2c_pins {
			qupv3_se23_i2c_active: qupv3_se23_i2c_active {
				mux {
					pins = "gpio8", "gpio9";
					function = "func3";
				};

				config {
					pins = "gpio8", "gpio9";
					drive-strength = <2>;
					bias-disable;
				};
			};

			qupv3_se23_i2c_sleep: qupv3_se23_i2c_sleep {
				mux {
					pins = "gpio8", "gpio9";
					function = "gpio";
				};

				config {
					pins = "gpio8", "gpio9";
					drive-strength = <2>;
					bias-pull-down;
				};
			};
		};

		/* SE21 pin mappings */
		qupv3_se21_spi_pins: qupv3_se21_spi_pins {
			qupv3_se21_spi_active: qupv3_se21_spi_active {
				mux {
					pins = "gpio2", "gpio3", "gpio4",
								"gpio5";
					function = "func1";
				};

				config {
					pins = "gpio2", "gpio3", "gpio4",
								"gpio5";
					drive-strength = <6>;
					bias-disable;
				};
			};

			qupv3_se21_spi_sleep: qupv3_se21_spi_sleep {
				mux {
					pins = "gpio2", "gpio3", "gpio4",
								"gpio5";
					function = "gpio";
				};

				config {
					pins = "gpio2", "gpio3", "gpio4",
								"gpio5";
					drive-strength = <2>;
					bias-pull-down;
				};
			};
		};

		/*SE22 pin mappings*/
		qupv3_se22_spi_pins: qupv3_se22_spi_pins {
			qupv3_se22_spi_active: qupv3_se22_spi_active {
				mux {
					pins = "gpio6", "gpio7", "gpio8",
								"gpio9";
					function = "func1";
				};

				config {
					pins = "gpio6", "gpio7", "gpio8",
								"gpio9";
					drive-strength = <6>;
					bias-disable;
				};
			};

			qupv3_se22_spi_sleep: qupv3_se22_spi_sleep {
				mux {
					pins = "gpio6", "gpio7", "gpio8",
								"gpio9";
					function = "gpio";
				};

				config {
					pins = "gpio6", "gpio7", "gpio8",
								"gpio9";
					drive-strength = <2>;
					bias-pull-down;
				};
			};
		};
	};
};