Merge branch android-msm-pixel-4.19 into android-msm-barbet-4.19
Bug: 184813985
Change-Id: I79f68acbcf1619834dec5754d718ab94cbadc54e
diff --git a/msm/vidc/msm_cvp_internal.c b/msm/vidc/msm_cvp_internal.c
index 48efca5..3432484 100644
--- a/msm/vidc/msm_cvp_internal.c
+++ b/msm/vidc/msm_cvp_internal.c
@@ -377,6 +377,7 @@
goto exit;
}
+ mutex_lock(&inst->cvpbufs.lock);
memset(&vbuf, 0, sizeof(struct vidc_register_buffer));
vbuf.index = buf->index;
vbuf.type = get_hal_buftype(__func__, buf->type, inst->sid);
@@ -388,9 +389,9 @@
(void *)inst->session, &vbuf);
if (rc) {
print_cvp_buffer(VIDC_ERR, "register failed", inst, cbuf);
+ mutex_unlock(&inst->cvpbufs.lock);
goto exit;
}
- mutex_lock(&inst->cvpbufs.lock);
list_add_tail(&cbuf->list, &inst->cvpbufs.list);
mutex_unlock(&inst->cvpbufs.lock);
return rc;
diff --git a/msm/vidc/msm_venc.c b/msm/vidc/msm_venc.c
index 09b751a..1d1c606 100644
--- a/msm/vidc/msm_venc.c
+++ b/msm/vidc/msm_venc.c
@@ -945,6 +945,15 @@
.step = 1,
},
{
+ .id = V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET,
+ .name = "Chroma QP Index Offset",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .minimum = -12,
+ .maximum = 0,
+ .default_value = 0,
+ .step = 1,
+ },
+ {
.id = V4L2_CID_MPEG_VIDEO_VBV_DELAY,
.name = "Set Vbv Delay",
.type = V4L2_CTRL_TYPE_INTEGER,
@@ -1104,26 +1113,6 @@
return flip;
}
-inline bool vidc_scalar_enabled(struct msm_vidc_inst *inst)
-{
- struct v4l2_format *f;
- u32 output_height, output_width, input_height, input_width;
- bool scalar_enable = false;
-
- f = &inst->fmts[OUTPUT_PORT].v4l2_fmt;
- output_height = f->fmt.pix_mp.height;
- output_width = f->fmt.pix_mp.width;
- f = &inst->fmts[INPUT_PORT].v4l2_fmt;
- input_height = f->fmt.pix_mp.height;
- input_width = f->fmt.pix_mp.width;
-
- if (output_height != input_height || output_width != input_width)
- scalar_enable = true;
-
- return scalar_enable;
-}
-
-
static int msm_venc_set_csc(struct msm_vidc_inst *inst,
u32 color_primaries, u32 custom_matrix);
@@ -1978,6 +1967,7 @@
case V4L2_CID_MPEG_VIDC_VENC_RC_TIMESTAMP_DISABLE:
case V4L2_CID_MPEG_VIDEO_VBV_DELAY:
case V4L2_CID_MPEG_VIDC_VENC_BITRATE_SAVINGS:
+ case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET:
case V4L2_CID_MPEG_VIDC_SUPERFRAME:
s_vpr_h(sid, "Control set: ID : 0x%x Val : %d\n",
ctrl->id, ctrl->val);
@@ -3369,6 +3359,69 @@
return rc;
}
+int msm_venc_set_chroma_qp_offset(struct msm_vidc_inst *inst)
+{
+ int rc = 0;
+ struct hfi_device *hdev;
+ struct v4l2_ctrl *chr;
+ struct v4l2_ctrl *ctrl_cs;
+ struct hfi_chroma_qp_offset chroma_qp;
+ struct v4l2_format *f;
+ u32 codec, width, height, mbpf;
+
+ if (!inst || !inst->core) {
+ d_vpr_e("%s: invalid params %pK\n", __func__, inst);
+ return -EINVAL;
+ }
+ hdev = inst->core->device;
+
+ chr = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET);
+ if (chr->val != -12)
+ return 0;
+
+ f = &inst->fmts[INPUT_PORT].v4l2_fmt;
+ width = f->fmt.pix_mp.width;
+ height = f->fmt.pix_mp.height;
+ mbpf = NUM_MBS_PER_FRAME(width, height);
+ ctrl_cs = get_ctrl(inst, V4L2_CID_MPEG_VIDC_VIDEO_COLOR_SPACE);
+ codec = get_v4l2_codec(inst);
+
+ /**
+ * Set chroma qp offset to HEVC & VBR_CFR rc
+ * 10 bit: only BT2020
+ * 8 bit: only mbpf >= num_mbs(7680, 3840)
+ */
+ if (codec != V4L2_PIX_FMT_HEVC ||
+ inst->rc_type != V4L2_MPEG_VIDEO_BITRATE_MODE_VBR)
+ return 0;
+
+ if ((inst->bit_depth == MSM_VIDC_BIT_DEPTH_10 &&
+ ctrl_cs->val != MSM_VIDC_BT2020) ||
+ (inst->bit_depth == MSM_VIDC_BIT_DEPTH_8 &&
+ mbpf < NUM_MBS_PER_FRAME(7680, 3840)))
+ return 0;
+
+ /**
+ * client sets one chroma offset only in range [-12, 0]
+ * firmware expects chroma cb offset and cr offset in
+ * range [0, 12], firmware subtracts 12 from driver set values.
+ */
+ chroma_qp.chroma_offset = (chr->val + 12) << 16 | (chr->val + 12);
+ s_vpr_h(inst->sid, "%s: %x\n", __func__, chroma_qp.chroma_offset);
+
+ /* TODO: Remove this check after firmware support added for 8-bit */
+ if (inst->bit_depth == MSM_VIDC_BIT_DEPTH_8)
+ return 0;
+
+ rc = call_hfi_op(hdev, session_set_property, inst->session,
+ HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET, &chroma_qp,
+ sizeof(chroma_qp));
+ if (rc)
+ s_vpr_e(inst->sid, "%s: set property failed\n", __func__);
+
+ return rc;
+}
+
int msm_venc_set_loop_filter_mode(struct msm_vidc_inst *inst)
{
int rc = 0;
@@ -4714,6 +4767,9 @@
rc = msm_venc_set_video_csc(inst);
if (rc)
goto exit;
+ rc = msm_venc_set_chroma_qp_offset(inst);
+ if (rc)
+ goto exit;
rc = msm_venc_set_blur_resolution(inst);
if (rc)
goto exit;
diff --git a/msm/vidc/msm_vidc.c b/msm/vidc/msm_vidc.c
index 808228c..cbb4685 100644
--- a/msm/vidc/msm_vidc.c
+++ b/msm/vidc/msm_vidc.c
@@ -427,10 +427,11 @@
}
/*
- * set perf mode for image session buffers so that
- * they will be processed quickly
+ * set perf mode for image and thumbnail session buffers
+ * so that they will be processed quickly
*/
- if (is_grid_session(inst) && b->type == INPUT_MPLANE)
+ if ((is_grid_session(inst) || is_thumbnail_session(inst))
+ && b->type == INPUT_MPLANE)
b->flags |= V4L2_BUF_FLAG_PERF_MODE;
rc = vb2_qbuf(&q->vb2_bufq, b);
diff --git a/msm/vidc/msm_vidc_buffer_calculations.c b/msm/vidc/msm_vidc_buffer_calculations.c
index b8f141f..a2d2aa3 100644
--- a/msm/vidc/msm_vidc_buffer_calculations.c
+++ b/msm/vidc/msm_vidc_buffer_calculations.c
@@ -325,7 +325,8 @@
u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes);
static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst,
- u32 width, u32 height, u32 num_ref, bool ten_bit);
+ u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale,
+ u32 rotation_val, u32 flip);
static inline u32 calculate_enc_persist_size(void);
@@ -476,6 +477,10 @@
struct v4l2_ctrl *layer_ctrl;
u32 codec;
+ codec = get_v4l2_codec(inst);
+ if (codec == V4L2_PIX_FMT_VP8)
+ num_ref = num_ref << 1;
+
bframe_ctrl = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES);
num_bframes = bframe_ctrl->val;
if (num_bframes > 0)
@@ -490,17 +495,16 @@
layer_ctrl = get_ctrl(inst,
V4L2_CID_MPEG_VIDC_VIDEO_HEVC_MAX_HIER_CODING_LAYER);
num_hp_layers = layer_ctrl->val;
- codec = get_v4l2_codec(inst);
- if (num_hp_layers > 0) {
+ if (num_hp_layers > 1) {
/* LTR and B - frame not supported with hybrid HP */
if (inst->hybrid_hp)
- num_ref = (num_hp_layers - 1);
+ num_ref = (num_hp_layers + 1) >> 1;
else if (codec == V4L2_PIX_FMT_HEVC)
num_ref = ((num_hp_layers + 1) / 2) + ltr_count;
- else if ((codec == V4L2_PIX_FMT_H264) && (num_hp_layers <= 4))
- num_ref = ((1 << (num_hp_layers - 1)) - 1) + ltr_count;
+ else if ((codec == V4L2_PIX_FMT_H264) && (num_hp_layers < 4))
+ num_ref = (num_hp_layers - 1) + ltr_count;
else
- num_ref = ((num_hp_layers + 1) / 2) + ltr_count;
+ num_ref = num_hp_layers + ltr_count;
}
return num_ref;
}
@@ -509,9 +513,10 @@
{
struct msm_vidc_enc_buff_size_calculators *enc_calculators;
u32 width, height, i, num_ref, num_vpp_pipes;
- bool is_tenbit = false;
+ u32 rotation_val = 0, flip = 0;
+ bool is_tenbit = false, is_downscale = false;
int num_bframes;
- struct v4l2_ctrl *bframe;
+ struct v4l2_ctrl *bframe, *rotation, *hflip, *vflip;
struct v4l2_format *f;
if (!inst || !inst->core || !inst->core->platform_data) {
@@ -538,18 +543,30 @@
return -EINVAL;
}
- f = &inst->fmts[OUTPUT_PORT].v4l2_fmt;
- width = f->fmt.pix_mp.width;
- height = f->fmt.pix_mp.height;
bframe = get_ctrl(inst, V4L2_CID_MPEG_VIDEO_B_FRAMES);
num_bframes = bframe->val;
if (num_bframes < 0) {
s_vpr_e(inst->sid, "%s: get num bframe failed\n", __func__);
return -EINVAL;
}
+ f = &inst->fmts[OUTPUT_PORT].v4l2_fmt;
+ rotation = get_ctrl(inst, V4L2_CID_ROTATE);
+ rotation_val = rotation->val;
+ if (rotation_val == 90 || rotation_val == 270) {
+ /* Internal buffer size calc are based on rotated wxh */
+ width = f->fmt.pix_mp.height;
+ height = f->fmt.pix_mp.width;
+ } else {
+ width = f->fmt.pix_mp.width;
+ height = f->fmt.pix_mp.height;
+ }
+ hflip = get_ctrl(inst, V4L2_CID_HFLIP);
+ vflip = get_ctrl(inst, V4L2_CID_VFLIP);
+ flip = hflip->val | vflip->val;
num_ref = msm_vidc_get_num_ref_frames(inst);
is_tenbit = (inst->bit_depth == MSM_VIDC_BIT_DEPTH_10);
+ is_downscale = vidc_scalar_enabled(inst);
for (i = 0; i < HAL_BUFFER_MAX; i++) {
struct hal_buffer_requirements *curr_req;
@@ -575,7 +592,8 @@
curr_req->buffer_size =
enc_calculators->calculate_scratch2_size(
inst, width, height, num_ref,
- is_tenbit);
+ is_tenbit, is_downscale, rotation_val,
+ flip);
valid_buffer_type = true;
} else if (curr_req->buffer_type ==
HAL_BUFFER_INTERNAL_PERSIST) {
@@ -930,15 +948,17 @@
div_factor = 2;
}
- if (is_secure_session(inst))
+ if (is_secure_session(inst) && num_mbs >= NUM_MBS_720P)
div_factor = div_factor << 1;
/* For targets that doesn't support 4k, consider max mb's for that
* target and allocate max input buffer size for the same
*/
- if (base_res_mbs > inst->capability.cap[CAP_MBS_PER_FRAME].max) {
+ if (inst->core->platform_data->vpu_ver == VPU_VERSION_AR50_LITE) {
base_res_mbs = inst->capability.cap[CAP_MBS_PER_FRAME].max;
div_factor = 1;
+ if (num_mbs < NUM_MBS_720P)
+ base_res_mbs = base_res_mbs * 2;
}
frame_size = base_res_mbs * MB_SIZE_IN_PIXEL * 3 / 2 / div_factor;
@@ -1430,7 +1450,9 @@
bitstream_size = aligned_width * aligned_height * 3;
bitbin_size = ALIGN(bitstream_size, VENUS_DMA_ALIGNMENT);
}
- if (num_vpp_pipes > 2)
+ if (aligned_width * aligned_height >= 7680 * 4320)
+ size_singlePipe = bitbin_size / 4;
+ else if (num_vpp_pipes > 2)
size_singlePipe = bitbin_size / 2;
else
size_singlePipe = bitbin_size;
@@ -1812,8 +1834,8 @@
tile_height_pels), metadata_height_multi);
}
-static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst,
- u32 width, u32 height, u32 num_ref, bool ten_bit)
+static inline u32 hfi_iris2_enc_dpb_buffer_size(u32 width, u32 height,
+ bool ten_bit)
{
u32 aligned_width, aligned_height, chroma_height, ref_buf_height;
u32 luma_size, chroma_size;
@@ -1838,7 +1860,6 @@
metadata_stride, meta_buf_height);
size = (aligned_height + chroma_height) * aligned_width +
meta_size_y + meta_size_c;
- size = (size * (num_ref+3)) + 4096;
} else {
ref_buf_height = (height + (HFI_VENUS_HEIGHT_ALIGNMENT - 1))
& (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1));
@@ -1871,7 +1892,29 @@
meta_size_c = hfi_ubwc_metadata_plane_buffer_size(
metadata_stride, meta_buf_height);
size = ref_buf_size + meta_size_y + meta_size_c;
- size = (size * (num_ref+3)) + 4096;
+ }
+ return size;
+}
+
+static inline u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst,
+ u32 width, u32 height, u32 num_ref, bool ten_bit, bool downscale,
+ u32 rotation_val, u32 flip)
+{
+ u32 size;
+
+ size = hfi_iris2_enc_dpb_buffer_size(width, height, ten_bit);
+ size = size * (num_ref + 1) + 4096;
+ if (downscale && (rotation_val || flip)) {
+ /* VPSS output is always 128 x 32 aligned for 8-bit
+ * and 192 x 16 aligned for 10-bit
+ */
+ if (rotation_val == 90 || rotation_val == 270)
+ size += hfi_iris2_enc_dpb_buffer_size(height, width,
+ ten_bit);
+ else
+ size += hfi_iris2_enc_dpb_buffer_size(width, height,
+ ten_bit);
+ size += 4096;
}
return size;
}
diff --git a/msm/vidc/msm_vidc_buffer_calculations.h b/msm/vidc/msm_vidc_buffer_calculations.h
index a94bc48..3525a44 100644
--- a/msm/vidc/msm_vidc_buffer_calculations.h
+++ b/msm/vidc/msm_vidc_buffer_calculations.h
@@ -26,7 +26,8 @@
u32 width, u32 height, u32 num_ref, bool ten_bit,
u32 num_vpp_pipes);
u32 (*calculate_scratch2_size)(struct msm_vidc_inst *inst,
- u32 width, u32 height, u32 num_ref, bool ten_bit);
+ u32 width, u32 height, u32 num_ref, bool ten_bit,
+ bool downscale, u32 rotation_val, u32 flip);
u32 (*calculate_persist_size)(void);
};
diff --git a/msm/vidc/msm_vidc_clocks.c b/msm/vidc/msm_vidc_clocks.c
index 81c9f95..f7797ea 100644
--- a/msm/vidc/msm_vidc_clocks.c
+++ b/msm/vidc/msm_vidc_clocks.c
@@ -1072,10 +1072,18 @@
int msm_dcvs_try_enable(struct msm_vidc_inst *inst)
{
+ bool disable_hfr_dcvs = false;
+
if (!inst || !inst->core) {
d_vpr_e("%s: Invalid args: %pK\n", __func__, inst);
return -EINVAL;
}
+ if (inst->core->platform_data->vpu_ver == VPU_VERSION_IRIS2_1) {
+ /* 720p@240 encode */
+ if (is_encode_session(inst) && msm_vidc_get_fps(inst) >= 240
+ && msm_vidc_get_mbs_per_frame(inst) >= 3600)
+ disable_hfr_dcvs = true;
+ }
inst->clk_data.dcvs_mode =
!(msm_vidc_clock_voting ||
@@ -1085,7 +1093,8 @@
inst->clk_data.low_latency_mode ||
inst->batch.enable ||
is_turbo_session(inst) ||
- inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ);
+ inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ ||
+ disable_hfr_dcvs);
s_vpr_hp(inst->sid, "DCVS %s: %pK\n",
inst->clk_data.dcvs_mode ? "enabled" : "disabled", inst);
@@ -1093,6 +1102,40 @@
return 0;
}
+void msm_dcvs_reset(struct msm_vidc_inst *inst)
+{
+ struct msm_vidc_format *fmt;
+ struct clock_data *dcvs;
+
+ if (!inst) {
+ d_vpr_e("%s: Invalid params\n", __func__);
+ return;
+ }
+
+ dcvs = &inst->clk_data;
+ if (inst->session_type == MSM_VIDC_ENCODER) {
+ fmt = &inst->fmts[INPUT_PORT];
+ } else if (inst->session_type == MSM_VIDC_DECODER) {
+ fmt = &inst->fmts[OUTPUT_PORT];
+ } else {
+ s_vpr_e(inst->sid, "%s: invalid session type %#x\n",
+ __func__, inst->session_type);
+ return;
+ }
+
+ dcvs->min_threshold = fmt->count_min;
+ dcvs->max_threshold =
+ min((fmt->count_min + DCVS_DEC_EXTRA_OUTPUT_BUFFERS),
+ fmt->count_actual);
+
+ dcvs->dcvs_window =
+ dcvs->max_threshold < dcvs->min_threshold ? 0 :
+ dcvs->max_threshold - dcvs->min_threshold;
+ dcvs->nom_threshold = dcvs->min_threshold +
+ (dcvs->dcvs_window ?
+ (dcvs->dcvs_window / 2) : 0);
+}
+
int msm_comm_init_clocks_and_bus_data(struct msm_vidc_inst *inst)
{
int rc = 0, j = 0;
@@ -1138,8 +1181,6 @@
struct allowed_clock_rates_table *allowed_clks_tbl = NULL;
u64 total_freq = 0, rate = 0, load;
int cycles;
- struct clock_data *dcvs;
- struct msm_vidc_format *fmt;
if (!inst || !inst->core || !inst->clk_data.entry) {
d_vpr_e("%s: Invalid args: Inst = %pK\n",
@@ -1149,35 +1190,14 @@
s_vpr_h(inst->sid, "Init DCVS Load\n");
core = inst->core;
- dcvs = &inst->clk_data;
load = msm_comm_get_inst_load_per_core(inst, LOAD_POWER);
cycles = inst->clk_data.entry->vpp_cycles;
allowed_clks_tbl = core->resources.allowed_clks_tbl;
- if (inst->session_type == MSM_VIDC_ENCODER) {
- cycles = inst->flags & VIDC_LOW_POWER ?
- inst->clk_data.entry->low_power_cycles :
- cycles;
+ if (inst->session_type == MSM_VIDC_ENCODER &&
+ inst->flags & VIDC_LOW_POWER)
+ cycles = inst->clk_data.entry->low_power_cycles;
- fmt = &inst->fmts[INPUT_PORT];
- } else if (inst->session_type == MSM_VIDC_DECODER) {
- fmt = &inst->fmts[OUTPUT_PORT];
- } else {
- s_vpr_e(inst->sid, "%s: invalid session type %#x\n",
- __func__, inst->session_type);
- return;
- }
-
- dcvs->min_threshold = fmt->count_min;
- dcvs->max_threshold =
- min((fmt->count_min + DCVS_DEC_EXTRA_OUTPUT_BUFFERS),
- fmt->count_actual);
-
- dcvs->dcvs_window =
- dcvs->max_threshold < dcvs->min_threshold ? 0 :
- dcvs->max_threshold - dcvs->min_threshold;
- dcvs->nom_threshold = dcvs->min_threshold +
- (dcvs->dcvs_window ?
- (dcvs->dcvs_window / 2) : 0);
+ msm_dcvs_reset(inst);
total_freq = cycles * load;
diff --git a/msm/vidc/msm_vidc_clocks.h b/msm/vidc/msm_vidc_clocks.h
index 5d649ab..7515a4b 100644
--- a/msm/vidc/msm_vidc_clocks.h
+++ b/msm/vidc/msm_vidc_clocks.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
- * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _MSM_VIDC_CLOCKS_H_
@@ -8,6 +8,7 @@
#include "msm_vidc_internal.h"
void msm_clock_data_reset(struct msm_vidc_inst *inst);
+void msm_dcvs_reset(struct msm_vidc_inst *inst);
int msm_vidc_set_clocks(struct msm_vidc_core *core, u32 sid);
int msm_comm_vote_bus(struct msm_vidc_inst *inst);
int msm_dcvs_try_enable(struct msm_vidc_inst *inst);
diff --git a/msm/vidc/msm_vidc_common.c b/msm/vidc/msm_vidc_common.c
index dd19a7e..79c0c4d 100644
--- a/msm/vidc/msm_vidc_common.c
+++ b/msm/vidc/msm_vidc_common.c
@@ -693,6 +693,25 @@
return HAL_VIDEO_DECODER_PRIMARY;
}
+bool vidc_scalar_enabled(struct msm_vidc_inst *inst)
+{
+ struct v4l2_format *f;
+ u32 output_height, output_width, input_height, input_width;
+ bool scalar_enable = false;
+
+ f = &inst->fmts[OUTPUT_PORT].v4l2_fmt;
+ output_height = f->fmt.pix_mp.height;
+ output_width = f->fmt.pix_mp.width;
+ f = &inst->fmts[INPUT_PORT].v4l2_fmt;
+ input_height = f->fmt.pix_mp.height;
+ input_width = f->fmt.pix_mp.width;
+
+ if (output_height != input_height || output_width != input_width)
+ scalar_enable = true;
+
+ return scalar_enable;
+}
+
bool is_single_session(struct msm_vidc_inst *inst, u32 ignore_flags)
{
bool single = true;
@@ -799,9 +818,9 @@
* ----------------|----------------------------|
*/
- if ((is_thumbnail_session(inst) ||
- !is_realtime_session(inst)) &&
- quirks == LOAD_ADMISSION_CONTROL) {
+ if (is_thumbnail_session(inst) ||
+ (!is_realtime_session(inst) &&
+ quirks == LOAD_ADMISSION_CONTROL)) {
load = 0;
} else {
load = msm_comm_get_mbs_per_sec(inst, quirks);
@@ -1644,7 +1663,6 @@
struct hfi_device *hdev;
u32 *ptr = NULL;
struct msm_vidc_format *fmt;
- struct v4l2_format *f;
int extra_buff_count = 0;
u32 codec;
@@ -1697,11 +1715,12 @@
inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED))
event_fields_changed = true;
- f = &inst->fmts[OUTPUT_PORT].v4l2_fmt;
+ fmt = &inst->fmts[OUTPUT_PORT];
event_fields_changed |=
- (f->fmt.pix_mp.height != event_notify->height);
+ (fmt->v4l2_fmt.fmt.pix_mp.height !=
+ event_notify->height);
event_fields_changed |=
- (f->fmt.pix_mp.width != event_notify->width);
+ (fmt->v4l2_fmt.fmt.pix_mp.width != event_notify->width);
if (event_fields_changed) {
event = V4L2_EVENT_SEQ_CHANGED_INSUFFICIENT;
@@ -1717,6 +1736,9 @@
"%s: Failed to decide work mode\n",
__func__);
}
+ /* Update driver buffer count */
+ fmt->count_min = event_notify->fw_min_cnt;
+ msm_dcvs_reset(inst);
s_vpr_h(inst->sid,
"seq: No parameter change continue session\n");
rc = call_hfi_op(hdev, session_continue,
@@ -1790,7 +1812,6 @@
ptr[MSM_VIDC_BIT_DEPTH] = event_notify->bit_depth;
ptr[MSM_VIDC_PIC_STRUCT] = event_notify->pic_struct;
ptr[MSM_VIDC_COLOR_SPACE] = event_notify->colour_space;
- ptr[MSM_VIDC_FW_MIN_COUNT] = event_notify->fw_min_cnt;
s_vpr_h(inst->sid, "seq: height = %u width = %u\n",
event_notify->height, event_notify->width);
@@ -1833,6 +1854,7 @@
HAL_BUFFER_OUTPUT, fmt->count_min,
fmt->count_min_host);
}
+ ptr[MSM_VIDC_FW_MIN_COUNT] = fmt->count_min_host;
rc = msm_vidc_check_session_supported(inst);
if (!rc) {
@@ -3409,11 +3431,11 @@
}
sz_i = iplane->plane_fmt[0].sizeimage;
sz_i_e = iplane->plane_fmt[1].sizeimage;
- cnt_i = inp_f->count_actual;
+ cnt_i = inp_f->count_min_host;
sz_o = oplane->plane_fmt[0].sizeimage;
sz_o_e = oplane->plane_fmt[1].sizeimage;
- cnt_o = out_f->count_actual;
+ cnt_o = out_f->count_min_host;
total = sz_i * cnt_i + sz_i_e * cnt_i + sz_o * cnt_o +
sz_o_e * cnt_o + dpb_cnt * dpb_size + sz_s * cnt_s +
@@ -5782,8 +5804,9 @@
mutex_lock(&core->lock);
list_for_each_entry(temp, &core->instances, list) {
- /* ignore invalid session */
- if (temp->state == MSM_VIDC_CORE_INVALID)
+ /* ignore invalid and completed session */
+ if (temp->state == MSM_VIDC_CORE_INVALID ||
+ temp->state >= MSM_VIDC_STOP_DONE)
continue;
/* ignore thumbnail session */
if (is_thumbnail_session(temp))
@@ -5849,14 +5872,14 @@
f = &fmt->v4l2_fmt;
for (i = 0; i < f->fmt.pix_mp.num_planes; i++)
inst_mem_size += f->fmt.pix_mp.plane_fmt[i].sizeimage *
- fmt->count_actual;
+ fmt->count_min_host;
/* output port buffers memory size */
fmt = &inst->fmts[OUTPUT_PORT];
f = &fmt->v4l2_fmt;
for (i = 0; i < f->fmt.pix_mp.num_planes; i++)
inst_mem_size += f->fmt.pix_mp.plane_fmt[i].sizeimage *
- fmt->count_actual;
+ fmt->count_min_host;
/* dpb buffers memory size */
if (msm_comm_get_stream_output_mode(inst) ==
@@ -6773,40 +6796,33 @@
unsigned long offset, size;
enum smem_cache_ops cache_op;
- skip = true;
+ offset = vb->planes[i].data_offset;
+ size = vb->planes[i].length - offset;
+ cache_op = SMEM_CACHE_INVALIDATE;
+ skip = false;
+
if (inst->session_type == MSM_VIDC_DECODER) {
if (vb->type == INPUT_MPLANE) {
if (!i) { /* bitstream */
- skip = false;
- offset = vb->planes[i].data_offset;
size = vb->planes[i].bytesused;
cache_op = SMEM_CACHE_CLEAN_INVALIDATE;
}
} else if (vb->type == OUTPUT_MPLANE) {
if (!i) { /* yuv */
- skip = false;
- offset = 0;
- size = vb->planes[i].length;
- cache_op = SMEM_CACHE_INVALIDATE;
+ /* all values are correct */
}
}
} else if (inst->session_type == MSM_VIDC_ENCODER) {
if (vb->type == INPUT_MPLANE) {
if (!i) { /* yuv */
- skip = false;
- offset = vb->planes[i].data_offset;
size = vb->planes[i].bytesused;
cache_op = SMEM_CACHE_CLEAN_INVALIDATE;
+ } else { /* extradata */
+ cache_op = SMEM_CACHE_CLEAN_INVALIDATE;
}
} else if (vb->type == OUTPUT_MPLANE) {
- if (!i) { /* bitstream */
- skip = false;
- offset = 0;
- size = vb->planes[i].length;
- if (inst->max_filled_len)
- size = inst->max_filled_len;
- cache_op = SMEM_CACHE_INVALIDATE;
- }
+ if (!i && inst->max_filled_len)
+ size = inst->max_filled_len;
}
}
@@ -6848,26 +6864,26 @@
unsigned long offset, size;
enum smem_cache_ops cache_op;
- skip = true;
+ offset = vb->planes[i].data_offset;
+ size = vb->planes[i].length - offset;
+ cache_op = SMEM_CACHE_INVALIDATE;
+ skip = false;
+
if (inst->session_type == MSM_VIDC_DECODER) {
if (vb->type == INPUT_MPLANE) {
- /* bitstream and extradata */
- /* we do not need cache operations */
+ if (!i) /* bitstream */
+ skip = true;
} else if (vb->type == OUTPUT_MPLANE) {
if (!i) { /* yuv */
- skip = false;
- offset = vb->planes[i].data_offset;
- size = vb->planes[i].bytesused;
- cache_op = SMEM_CACHE_INVALIDATE;
+ /* All values are correct */
}
}
} else if (inst->session_type == MSM_VIDC_ENCODER) {
if (vb->type == INPUT_MPLANE) {
/* yuv and extradata */
- /* we do not need cache operations */
+ skip = true;
} else if (vb->type == OUTPUT_MPLANE) {
if (!i) { /* bitstream */
- skip = false;
/*
* Include vp8e header bytes as well
* by making offset equal to zero
@@ -6875,7 +6891,6 @@
offset = 0;
size = vb->planes[i].bytesused +
vb->planes[i].data_offset;
- cache_op = SMEM_CACHE_INVALIDATE;
}
}
}
diff --git a/msm/vidc/msm_vidc_common.h b/msm/vidc/msm_vidc_common.h
index 1c64e3c..a7e1cc2 100644
--- a/msm/vidc/msm_vidc_common.h
+++ b/msm/vidc/msm_vidc_common.h
@@ -223,6 +223,7 @@
return true;
}
+bool vidc_scalar_enabled(struct msm_vidc_inst *inst);
bool is_single_session(struct msm_vidc_inst *inst, u32 ignore_flags);
int msm_comm_get_num_perf_sessions(struct msm_vidc_inst *inst);
bool is_batching_allowed(struct msm_vidc_inst *inst);
diff --git a/msm/vidc/msm_vidc_debug.c b/msm/vidc/msm_vidc_debug.c
index 62a9c1c..aa1de10 100644
--- a/msm/vidc/msm_vidc_debug.c
+++ b/msm/vidc/msm_vidc_debug.c
@@ -182,7 +182,7 @@
goto exit;
}
core->resources.msm_vidc_hw_rsp_timeout =
- ((msm_vidc_debug & 0xFF) > (VIDC_ERR | VIDC_HIGH)) ? 1500 : 1000;
+ ((msm_vidc_debug & 0xFF) > (VIDC_ERR | VIDC_HIGH)) ? 2500 : 1000;
rc = count;
d_vpr_h("debug timeout updated to - %d\n",
core->resources.msm_vidc_hw_rsp_timeout);
diff --git a/msm/vidc/msm_vidc_platform.c b/msm/vidc/msm_vidc_platform.c
index 0777e75..a704b9c 100644
--- a/msm/vidc/msm_vidc_platform.c
+++ b/msm/vidc/msm_vidc_platform.c
@@ -633,7 +633,7 @@
{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000},
/* All intra encoding usecase specific */
- {CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 30, 1, 30},
+ {CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 60, 1, 30},
/* Image specific */
{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512},
@@ -697,7 +697,7 @@
{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000},
/* All intra encoding usecase specific */
- {CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 30, 1, 30},
+ {CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 60, 1, 30},
/* Image specific */
{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512},
@@ -2146,7 +2146,7 @@
d_vpr_e("Failed to get ddr rank of device\n");
return num_ranks;
} else if (num_ranks == 1)
- data->sku_version = SKU_VERSION_1;
+ data->sku_version = SKU_VERSION_0;
d_vpr_h("DDR Rank of device: %u", num_ranks);
diff --git a/msm/vidc/msm_vidc_res_parse.c b/msm/vidc/msm_vidc_res_parse.c
index 5b0a615..1b9e994 100644
--- a/msm/vidc/msm_vidc_res_parse.c
+++ b/msm/vidc/msm_vidc_res_parse.c
@@ -4,6 +4,7 @@
*/
#include <asm/dma-iommu.h>
+#include <linux/dma-iommu.h>
#include <linux/iommu.h>
#include <linux/of.h>
#include <linux/slab.h>
@@ -1012,6 +1013,13 @@
cb->domain = iommu_get_domain_for_dev(cb->dev);
+ /*
+ * When memory is fragmented, below configuration increases the
+ * possibility to get a mapping for buffer in the configured CB.
+ */
+ if (!strcmp(cb->name, "venus_ns"))
+ iommu_dma_enable_best_fit_algo(cb->dev);
+
/*
* configure device segment size and segment boundary to ensure
* iommu mapping returns one mapping (which is required for partial
diff --git a/msm/vidc/vidc_hfi_helper.h b/msm/vidc/vidc_hfi_helper.h
index 02c3619..1448d4a 100644
--- a/msm/vidc/vidc_hfi_helper.h
+++ b/msm/vidc/vidc_hfi_helper.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
- * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
*/
#ifndef __H_VIDC_HFI_HELPER_H__
@@ -350,6 +350,8 @@
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x038)
#define HFI_PROPERTY_PARAM_VENC_LOSSLESS_ENCODING \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x039)
+#define HFI_PROPERTY_PARAM_HEVC_PPS_CB_CR_OFFSET \
+ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x040)
#define HFI_PROPERTY_CONFIG_VENC_COMMON_START \
(HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000)
@@ -518,6 +520,11 @@
u32 operating_rate;
};
+struct hfi_chroma_qp_offset {
+ u32 chroma_offset;
+ u32 reserved;
+};
+
#define HFI_INTRA_REFRESH_NONE (HFI_COMMON_BASE + 0x1)
#define HFI_INTRA_REFRESH_CYCLIC (HFI_COMMON_BASE + 0x2)
#define HFI_INTRA_REFRESH_RANDOM (HFI_COMMON_BASE + 0x5)