| &soc { |
| timer { |
| clock-frequency = <500000>; |
| }; |
| |
| timer@17c20000 { |
| clock-frequency = <500000>; |
| }; |
| |
| usb_emu_phy: usb_emu_phy@a720000 { |
| compatible = "qcom,usb-emu-phy"; |
| reg = <0x0a720000 0x9500>, |
| <0x0a6f8800 0x100>; |
| reg-names = "base", "qscratch_base"; |
| |
| qcom,emu-init-seq = <0xfff0 0x4 |
| 0xfff3 0x4 |
| 0x40 0x4 |
| 0xfff3 0x4 |
| 0xfff0 0x4 |
| 0x100000 0x20 |
| 0x0 0x20 |
| 0x1a0 0x20 |
| 0x100000 0x3c |
| 0x0 0x3c |
| 0x10060 0x3c |
| 0x0 0x4>; |
| }; |
| |
| cxo: bi_tcxo { |
| compatible = "fixed-factor-clock"; |
| clocks = <&xo_board>; |
| clock-mult = <1>; |
| clock-div = <2>; |
| #clock-cells = <0>; |
| }; |
| |
| cxo_a: bi_tcxo_ao { |
| compatible = "fixed-factor-clock"; |
| clocks = <&xo_board>; |
| clock-mult = <1>; |
| clock-div = <2>; |
| #clock-cells = <0>; |
| }; |
| }; |
| |
| &rpmhcc { |
| compatible = "qcom,dummycc"; |
| clock-output-names = "rpmh_clocks"; |
| }; |
| |
| &aopcc { |
| compatible = "qcom,dummycc"; |
| clock-output-names = "qdss_clocks"; |
| }; |
| |
| &usb0 { |
| dwc3@a600000 { |
| usb-phy = <&usb_emu_phy>, <&usb_nop_phy>; |
| maximum-speed = "high-speed"; |
| }; |
| }; |
| |
| &usb2_phy0 { |
| hsphy@88e3000 { |
| status = "disabled"; |
| }; |
| }; |
| |
| &qupv3_se8_2uart { |
| status = "disabled"; |
| }; |
| |
| /*RUMI UART console*/ |
| &qupv3_se2_2uart { |
| status = "ok"; |
| }; |
| |
| &wdog { |
| status = "disabled"; |
| }; |
| |
| &ufsphy_mem { |
| compatible = "qcom,ufs-phy-qrbtc-sdm845"; |
| |
| vdda-phy-supply = <&pm8150_l5>; |
| vdda-pll-supply = <&pm8150_l6>; |
| vdda-phy-max-microamp = <90200>; |
| vdda-pll-max-microamp = <19000>; |
| |
| status = "ok"; |
| }; |
| |
| &ufshc_mem { |
| limit-tx-hs-gear = <1>; |
| limit-rx-hs-gear = <1>; |
| |
| vdd-hba-supply = <&ufs_phy_gdsc>; |
| vdd-hba-fixed-regulator; |
| vcc-supply = <&pm8150a_l7>; |
| vccq2-supply = <&pm8150_s4>; |
| vcc-max-microamp = <800000>; |
| vccq2-max-microamp = <800000>; |
| |
| qcom,vddp-ref-clk-supply = <&pm8150_l6>; |
| qcom,vddp-ref-clk-max-microamp = <100>; |
| |
| qcom,disable-lpm; |
| rpm-level = <0>; |
| spm-level = <0>; |
| status = "ok"; |
| }; |
| |
| &sdhc_1 { |
| vdd-supply = <&pm8150a_l7>; |
| qcom,vdd-voltage-level = <2950000 2950000>; |
| qcom,vdd-current-level = <0 570000>; |
| |
| vdd-io-supply = <&pm8150_s4>; |
| qcom,vdd-io-always-on; |
| qcom,vdd-io-lpm-sup; |
| qcom,vdd-io-voltage-level = <1800000 1800000>; |
| qcom,vdd-io-current-level = <0 325000>; |
| |
| pinctrl-names = "active", "sleep"; |
| pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on |
| &sdc1_rclk_on>; |
| pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off |
| &sdc1_rclk_off>; |
| |
| qcom,clk-rates = <400000 20000000 25000000 50000000>; |
| qcom,bus-speed-mode = "DDR_1p8v"; |
| |
| /delete-property/qcom,devfreq,freq-table; |
| |
| status = "ok"; |
| }; |
| |
| &sdhc_2 { |
| vdd-supply = <&pm8150a_l9>; |
| qcom,vdd-voltage-level = <2950000 2950000>; |
| qcom,vdd-current-level = <0 800000>; |
| |
| vdd-io-supply = <&pm8150a_l6>; |
| qcom,vdd-io-voltage-level = <1800000 2950000>; |
| qcom,vdd-io-current-level = <0 22000>; |
| |
| pinctrl-names = "active", "sleep"; |
| pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; |
| pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; |
| |
| qcom,clk-rates = <400000 20000000 25000000 50000000>; |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50"; |
| |
| /delete-property/qcom,devfreq,freq-table; |
| |
| status = "ok"; |
| }; |
| |
| &qupv3_se9_i2c { |
| status = "disabled"; |
| }; |