commit 89f67ec8e4fb9de7da6bbd3a112e35255a23cb5f
author Brian Swetland <swetland@google.com> Thu Jan 29 17:23:08 2009 -0800
committer Brian Swetland <swetland@google.com> Thu Jan 29 17:23:08 2009 -0800
tree c3f0ef1f3d06cff15e31224e6bbc6b5791e739c5
parent a5e9095defab1ddee8baa9d09201140c46c9b3b8

[qsd8k] remove workaround for ES1 chips

Signed-off-by: Brian Swetland <swetland@google.com>

platform/qsd8k/arch_init.S

diff --git a/platform/qsd8k/arch_init.S b/platform/qsd8k/arch_init.S
index 37989b1..508330a 100644
--- a/platform/qsd8k/arch_init.S
+++ b/platform/qsd8k/arch_init.S
@@ -206,7 +206,6 @@
 
 .globl __cpu_early_init
 __cpu_early_init:
-        
         //; Zero out r0 for use throughout this code. All other GPRs 
         //; (r1-r3) are set throughout this code to help establish
         //; a consistent startup state for any code that follows.
@@ -428,7 +427,7 @@
         MOV   r3, #0x04
 
         //; keep d-cache disabled on Raptor Rev 1.0 silicon
-        orr   r3, r3, #0x4000 //;disable dcache
+        //; orr   r3, r3, #0x4000 //;disable dcache
         MCR   p15, 0, r3, c1, c0, 1      //; WCP15_ACTLR  r3
 
 //;End of error and control setting