| /* SPDX-License-Identifier: GPL-2.0 */ | |
| /* | |
| * Copyright (c) 2021 MediaTek Inc. | |
| */ | |
| #ifndef __LINUX_REGULATOR_MT6315_H | |
| #define __LINUX_REGULATOR_MT6315_H | |
| #define MT6315_RP 3 | |
| #define MT6315_PP 6 | |
| #define MT6315_SP 7 | |
| enum { | |
| MT6315_VBUCK1 = 0, | |
| MT6315_VBUCK2, | |
| MT6315_VBUCK3, | |
| MT6315_VBUCK4, | |
| MT6315_VBUCK_MAX, | |
| }; | |
| /* Register */ | |
| #define MT6315_TOP2_ELR7 0x139 | |
| #define MT6315_TOP_TMA_KEY 0x39F | |
| #define MT6315_TOP_TMA_KEY_H 0x3A0 | |
| #define MT6315_BUCK_TOP_CON0 0x1440 | |
| #define MT6315_BUCK_TOP_CON1 0x1443 | |
| #define MT6315_BUCK_TOP_ELR0 0x1449 | |
| #define MT6315_BUCK_TOP_ELR2 0x144B | |
| #define MT6315_BUCK_TOP_ELR4 0x144D | |
| #define MT6315_BUCK_TOP_ELR6 0x144F | |
| #define MT6315_VBUCK1_DBG0 0x1499 | |
| #define MT6315_VBUCK1_DBG4 0x149D | |
| #define MT6315_VBUCK2_DBG0 0x1519 | |
| #define MT6315_VBUCK2_DBG4 0x151D | |
| #define MT6315_VBUCK3_DBG0 0x1599 | |
| #define MT6315_VBUCK3_DBG4 0x159D | |
| #define MT6315_VBUCK4_DBG0 0x1619 | |
| #define MT6315_VBUCK4_DBG4 0x161D | |
| #define MT6315_BUCK_TOP_4PHASE_ANA_CON42 0x16B1 | |
| #define PROTECTION_KEY_H 0x9C | |
| #define PROTECTION_KEY 0xEA | |
| #endif /* __LINUX_REGULATOR_MT6315_H */ |