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/* Generic barrier definitions, based on MN10300 definitions.
* It should be possible to use these on really simple architectures,
* but it serves more as a starting point for new ports.
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
#ifndef __ASSEMBLY__
#define nop() asm volatile ("nop")
* Force strict CPU ordering.
* And yes, this is required on UP too when we're talking
* to devices.
* This implementation only contains a compiler barrier.
#define mb() asm volatile ("": : :"memory")
#define rmb() mb()
#define wmb() asm volatile ("": : :"memory")
#define smp_mb() mb()
#define smp_rmb() rmb()
#define smp_wmb() wmb()
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define set_mb(var, value) do { var = value; mb(); } while (0)
#define set_wmb(var, value) do { var = value; wmb(); } while (0)
#define read_barrier_depends() do {} while (0)
#define smp_read_barrier_depends() do {} while (0)
#endif /* !__ASSEMBLY__ */
#endif /* __ASM_GENERIC_BARRIER_H */