| /******************************************************************************* |
| * Copyright 2011 Broadcom Corporation. All rights reserved. |
| * Copyright 2013 Sony Mobile Communications. All rights reserved. |
| * |
| * @file drivers/video/broadcom/lcd/nt35310_brooks.h |
| * |
| * Unless you and Broadcom execute a separate written software license agreement |
| * governing use of this software, this software is licensed to you under the |
| * terms of the GNU General Public License version 2, available at |
| * http://www.gnu.org/copyleft/gpl.html (the "GPL"). |
| * |
| * Notwithstanding the above, under no circumstances may you combine this |
| * software in any way with any other Broadcom software provided under a license |
| * other than the GPL, without Broadcom's express prior written consent. |
| *******************************************************************************/ |
| |
| #ifndef __NT35310_BROOKS_H__ |
| #define __NT35310_BROOKS_H__ |
| |
| #include "display_drv.h" |
| #include "lcd.h" |
| |
| #define NT35310_BROOKS_UPDT_WIN_SEQ_LEN 13 /* (6 + 6 + 1) */ |
| |
| #define CORNER_TOP 1 |
| #define CORNER_BOTTOM -1 |
| #define CORNER_LEFT 1 |
| #define CORNER_RIGHT -1 |
| |
| /* |
| * Each scan line must end with 0xFF |
| * The first number in a line specifies how many black pixels should be drawn, |
| * even if it's 0. |
| */ |
| #define CORNER_DATA_SIZE 77 |
| static const uint8_t corner_data[CORNER_DATA_SIZE] = |
| { |
| 0x0D, 0x02, 0x37, 0x78, 0xAC, 0xD2, 0xED, 0xF8, 0xFF, 0x0B, 0x1C, |
| 0x87, 0xE2, 0xFF, 0x09, 0x13, 0x95, 0xF9, 0xFF, 0x08, 0x56, 0xEB, |
| 0xFF, 0x06, 0x04, 0x97, 0xFF, 0x05, 0x0A, 0xB3, 0xFF, 0x04, 0x04, |
| 0xB1, 0xFF, 0x04, 0x98, 0xFF, 0x03, 0x57, 0xFF, 0x02, 0x13, 0xEB, |
| 0xFF, 0x02, 0x97, 0xFF, 0x01, 0x1E, 0xFA, 0xFF, 0x01, 0x87, 0xFF, |
| 0x00, 0x02, 0xE3, 0xFF, 0x00, 0x37, 0xFF, 0x00, 0x79, 0xFF, 0x00, |
| 0xAC, 0xFF, 0x00, 0xD3, 0xFF, 0x00, 0xEC, 0xFF, 0x00, 0xF9, 0xFF |
| }; |
| |
| __initdata struct DSI_COUNTER nt35310_brooks_timing[] = { |
| /* LP Data Symbol Rate Calc - MUST BE FIRST RECORD */ |
| {"ESC2LP_RATIO", DSI_C_TIME_ESC2LPDT, 0, |
| 0, 0, 0, 0, 0, 0, 0, 0, 0x0000003F, 1, 1, 0}, |
| /* SPEC: min = 100[us] + 0[UI] */ |
| /* SET: min = 1000[us] + 0[UI] <= */ |
| {"HS_INIT", DSI_C_TIME_HS, 0, |
| 0, 100000, 0, 0, 0, 0, 0, 0, 0x00FFFFFF, 0, 0, 0}, |
| /* SPEC: min = 1[ms] + 0[UI] */ |
| /* SET: min = 1[ms] + 0[UI] */ |
| {"HS_WAKEUP", DSI_C_TIME_HS, 0, |
| 0, 1000000, 0, 0, 0, 0, 0, 0, 0x00FFFFFF, 0, 0, 0}, |
| /* SPEC: min = 1[ms] + 0[UI] */ |
| /* SET: min = 1[ms] + 0[UI] */ |
| {"LP_WAKEUP", DSI_C_TIME_ESC, 0, |
| 0, 1000000, 0, 0, 0, 0, 0, 0, 0x00FFFFFF, 1, 1, 0}, |
| /* SPEC: min = 0[ns] + 8[UI] */ |
| /* SET: min = 0[ns] + 12[UI] <= */ |
| {"HS_CLK_PRE", DSI_C_TIME_HS, 0, |
| 0, 10, 8, 0, 0, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 38[ns] + 0[UI] max= 95[ns] + 0[UI] */ |
| /* SET: min = 68[ns] + 0[UI] max= 95[ns] + 0[UI] <= */ |
| {"HS_CLK_PREPARE", DSI_C_TIME_HS, DSI_C_HAS_MAX, |
| 0, 75, 0, 0, 0, 95, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 262[ns] + 0[UI] */ |
| /* SET: min = 314[ns] + 0[UI] <= */ |
| {"HS_CLK_ZERO", DSI_C_TIME_HS, 0, |
| 0, 300, 0, 0, 0, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 60[ns] + 52[UI] */ |
| /* SET: min = 72[ns] + 52[UI] <= */ |
| {"HS_CLK_POST", DSI_C_TIME_HS, 0, |
| 0, 70, 128, 0, 0, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 60[ns] + 0[UI] */ |
| /* SET: min = 72[ns] + 0[UI] <= */ |
| {"HS_CLK_TRAIL", DSI_C_TIME_HS, 0, |
| 0, 300, 0, 0, 0, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 50[ns] + 0[UI] */ |
| /* SET: min = 60[ns] + 0[UI] <= */ |
| {"HS_LPX", DSI_C_TIME_HS, 0, |
| 0, 70, 0, 0, 0, 75, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 40[ns] + 4[UI] max= 85[ns] + 6[UI] */ |
| /* SET: min = 60[ns] + 4[UI] max= 85[ns] + 6[UI] <= */ |
| {"HS_PRE", DSI_C_TIME_HS, DSI_C_HAS_MAX, |
| 0, 30, 4, 0, 0, 85, 6, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 105[ns] + 6[UI] */ |
| /* SET: min = 125[ns] + 6[UI] <= */ |
| {"HS_ZERO", DSI_C_TIME_HS, 0, |
| 0, 280, 6, 0, 0, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = max(0[ns]+32[UI],60[ns]+16[UI]) n=4 */ |
| /* SET: min = max(0[ns]+32[UI],60[ns]+16[UI]) n=4 */ |
| {"HS_TRAIL", DSI_C_TIME_HS, DSI_C_MIN_MAX_OF_2, |
| 0, 60, 32, 100, 16, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* SPEC: min = 100[ns] + 0[UI] */ |
| /* SET: min = 120[ns] + 0[UI] <= */ |
| {"HS_EXIT", DSI_C_TIME_HS, 0, |
| 0, 300, 0, 0, 0, 0, 0, 0, 0x000001FF, 0, 0, 0}, |
| /* min = 50[ns] + 0[UI] */ |
| /* LP esc counters are speced in LP LPX units. |
| LP_LPX is calculated by chal_dsi_set_timing |
| and equals LP data clock */ |
| {"LPX", DSI_C_TIME_ESC, 0, |
| 1, 0, 0, 0, 0, 0, 0, 0, 0x000000FF, 1, 1, 0}, |
| /* min = 4*[Tlpx] max = 4[Tlpx], set to 4 */ |
| {"LP-TA-GO", DSI_C_TIME_ESC, 0, |
| 4, 0, 0, 0, 0, 0, 0, 0, 0x000000FF, 1, 1, 0}, |
| /* min = 1*[Tlpx] max = 2[Tlpx], set to 2 */ |
| {"LP-TA-SURE", DSI_C_TIME_ESC, 0, |
| 2, 0, 0, 0, 0, 0, 0, 0, 0x000000FF, 1, 1, 0}, |
| /* min = 5*[Tlpx] max = 5[Tlpx], set to 5 */ |
| {"LP-TA-GET", DSI_C_TIME_ESC, 0, |
| 5, 0, 0, 0, 0, 0, 0, 0, 0x000000FF, 1, 1, 0}, |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_Brooks_id[] = { |
| {DISPCTRL_WR_CMND, 0xDA}, |
| {DISPCTRL_WR_DATA, 0x26}, |
| {DISPCTRL_WR_CMND, 0xDB}, |
| {DISPCTRL_WR_DATA, 0x91}, |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_scrn_on[] = { |
| {DISPCTRL_WR_CMND, 0x29}, |
| {DISPCTRL_SLEEP_MS, 16}, /* 16ms*1 frames = 16 ms */ |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_scrn_off[] = { |
| {DISPCTRL_WR_CMND, 0x28}, |
| {DISPCTRL_SLEEP_MS, 16}, /* 16ms*1 frames = 16 ms */ |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_slp_in[] = { |
| {DISPCTRL_WR_CMND, 0x10}, |
| {DISPCTRL_SLEEP_MS, 64}, /* 16ms*4 frames = 64 ms */ |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_init_panel_cmd[] = { |
| {DISPCTRL_WR_CMND, 0x11}, |
| {DISPCTRL_SLEEP_MS, 96}, /* 16ms*6 frames = 96 ms */ |
| {DISPCTRL_WR_CMND, 0x35}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0x44}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xED}, /* Unlock CMD2 */ |
| {DISPCTRL_WR_DATA, 0x01}, |
| {DISPCTRL_WR_DATA, 0xFE}, |
| {DISPCTRL_WR_CMND, 0xBF}, /* CMD 2 Page 1 */ |
| {DISPCTRL_WR_DATA, 0xAA}, |
| {DISPCTRL_WR_CMND, 0xB4}, /* Normal: 2-pixel inv, Idle: Col inv */ |
| {DISPCTRL_WR_DATA, 0x0D}, |
| {DISPCTRL_WR_CMND, 0xEF}, /* Back CMD1 */ |
| {DISPCTRL_WR_DATA, 0xAA}, |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_cabc_init[] = { |
| {DISPCTRL_WR_CMND, 0x51}, /* Write Display Brightness */ |
| {DISPCTRL_WR_DATA, 0xFF}, |
| {DISPCTRL_WR_CMND, 0x53}, /* Write CTRL Display */ |
| {DISPCTRL_WR_DATA, 0x2C}, |
| {DISPCTRL_WR_CMND, 0xED}, /* Unlock CMD2 */ |
| {DISPCTRL_WR_DATA, 0x01}, |
| {DISPCTRL_WR_DATA, 0xFE}, |
| {DISPCTRL_WR_CMND, 0xDF}, /* MTP White function enable */ |
| {DISPCTRL_WR_DATA, 0x10}, |
| {DISPCTRL_WR_CMND, 0xBF}, /* CMD 2 Page 1 */ |
| {DISPCTRL_WR_DATA, 0xAA}, |
| {DISPCTRL_WR_CMND, 0xBA}, /* LEDPWM polarity active LOW */ |
| {DISPCTRL_WR_DATA, 0x24}, /* default */ |
| {DISPCTRL_WR_DATA, 0x00}, /* default */ |
| {DISPCTRL_WR_DATA, 0x00}, /* LEDPWM polarity bit */ |
| {DISPCTRL_WR_DATA, 0x00}, /* default */ |
| {DISPCTRL_WR_CMND, 0xC1}, /* PWM frequency 25.3K */ |
| {DISPCTRL_WR_DATA, 0x20}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x01}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xFF}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| /* Start of step 5 in spec */ |
| {DISPCTRL_WR_CMND, 0xC4}, /* Setting Threshold */ |
| {DISPCTRL_WR_DATA, 0x62}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x05}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x84}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xF0}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x18}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xA4}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x12}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x50}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x0C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x17}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x95}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xF3}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xE6}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE9}, /* Gamma Liner */ |
| {DISPCTRL_WR_DATA, 0xAA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE0}, /* R+ Gamma */ |
| {DISPCTRL_WR_DATA, 0x03}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x11}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x19}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x25}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x2B}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x31}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x3C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x4D}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x5A}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x65}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x6F}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x7A}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x88}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x8F}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x9C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xAA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xBB}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xF8}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE1}, /* R- Gamma */ |
| {DISPCTRL_WR_DATA, 0x04}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x10}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x18}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x24}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x33}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x3A}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x45}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x57}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x63}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x6F}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x7A}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x87}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x8C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x98}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x9F}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xAC}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xC7}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xFA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE2}, /* G+ Gamma */ |
| {DISPCTRL_WR_DATA, 0x03}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x1A}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x24}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x30}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x35}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x3C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x47}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x56}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x64}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x70}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x7C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x87}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x92}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x99}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xA8}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xB4}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xCE}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xF8}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE3}, /* G- Gamma */ |
| {DISPCTRL_WR_DATA, 0x04}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x1C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x25}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x30}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x3F}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x46}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x51}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x62}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x6E}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x7A}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x85}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x92}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x99}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xA3}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xAA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xB6}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xD0}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xFA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE4}, /* B+ Gamma */ |
| {DISPCTRL_WR_DATA, 0x03}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x22}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x2D}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x38}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x40}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x45}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x50}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x64}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x6D}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x79}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x83}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x8F}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x9C}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xA1}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xB1}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xBD}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xD9}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xF8}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE5}, /* B- Gamma */ |
| {DISPCTRL_WR_DATA, 0x04}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x23}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x2B}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x37}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x47}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x4E}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x59}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x64}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x76}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x82}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x8E}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x99}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xA0}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xAC}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xA2}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xBF}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xDA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xFA}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE6}, /* CABC Gamma Offset */ |
| {DISPCTRL_WR_DATA, 0x22}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x22}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x62}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x44}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x44}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x64}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x67}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x76}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x77}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x54}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x25}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x56}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x35}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x77}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xBB}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xCC}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE7}, /* CABC Gamma Offset */ |
| {DISPCTRL_WR_DATA, 0x22}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x13}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x61}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x44}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x34}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x65}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x56}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x66}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x79}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x54}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x25}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x46}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x46}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x77}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xBB}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xCC}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xE8}, /* CABC Gamma Offset */ |
| {DISPCTRL_WR_DATA, 0x22}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x22}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x62}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x43}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x44}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x55}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x56}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x87}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x76}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x55}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x26}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x56}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x45}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x87}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xBB}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0xCC}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_CMND, 0xEF}, /* Back CMD1 */ |
| {DISPCTRL_WR_DATA, 0xAA}, |
| /* End of step 5 in spec */ |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_cabc_on[] = { |
| {DISPCTRL_WR_CMND, 0x55}, /* Moving Mode */ |
| {DISPCTRL_WR_DATA, 0x03}, |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_cabc_off[] = { |
| {DISPCTRL_WR_CMND, 0x55}, /* CABC off */ |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_idle_mode_on[] = { |
| {DISPCTRL_WR_CMND, 0x12}, /* Partial Mode On */ |
| {DISPCTRL_WR_CMND, 0x30}, /* Partial mode area */ |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x00}, |
| {DISPCTRL_WR_DATA, 0x01}, |
| {DISPCTRL_WR_DATA, 0x3F}, |
| {DISPCTRL_WR_CMND, 0x39}, /* Idle Mode */ |
| {DISPCTRL_WR_CMND, 0xED}, /* Unlock CMD2 */ |
| {DISPCTRL_WR_DATA, 0x01}, |
| {DISPCTRL_WR_DATA, 0xFE}, |
| {DISPCTRL_WR_CMND, 0xB0}, /* Hi-Z */ |
| {DISPCTRL_WR_DATA, 0x03}, |
| {DISPCTRL_WR_CMND, 0xB2}, /* Idle mode 36 Hz */ |
| {DISPCTRL_WR_DATA, 0x8D}, |
| {DISPCTRL_WR_DATA, 0xEB}, |
| {DISPCTRL_WR_DATA, 0x8D}, |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| __initdata DISPCTRL_REC_T nt35310_brooks_idle_mode_off[] = { |
| {DISPCTRL_WR_CMND, 0x38}, /* Idle Mode Off */ |
| {DISPCTRL_WR_CMND, 0x13}, /* Partial mode area */ |
| {DISPCTRL_LIST_END, 0} |
| }; |
| |
| void nt35310_brooks_winset(char *msgData, DISPDRV_WIN_t *p_win) |
| { |
| int i = 0; |
| msgData[i++] = 5; /* Length of the sequence below */ |
| msgData[i++] = MIPI_DCS_SET_COLUMN_ADDRESS; |
| msgData[i++] = (p_win->l & 0xFF00) >> 8; |
| msgData[i++] = (p_win->l & 0x00FF); |
| msgData[i++] = (p_win->r & 0xFF00) >> 8; |
| msgData[i++] = (p_win->r & 0x00FF); |
| |
| msgData[i++] = 5; /* Length of the sequence below */ |
| msgData[i++] = MIPI_DCS_SET_PAGE_ADDRESS; |
| msgData[i++] = (p_win->t & 0xFF00) >> 8; |
| msgData[i++] = (p_win->t & 0x00FF); |
| msgData[i++] = (p_win->b & 0xFF00) >> 8; |
| msgData[i++] = (p_win->b & 0x00FF); |
| msgData[i++] = 0; |
| |
| if (i != NT35310_BROOKS_UPDT_WIN_SEQ_LEN) |
| pr_err("nt35310_winset msg len incorrect!\n"); |
| } |
| |
| void nt35310_brooks_convert_fb_to_special_mode(char *fb, uint32_t width, |
| uint32_t height, uint32_t bpp) { |
| uint32_t i, new_pix, gray; |
| uint32_t *curr_pix; |
| |
| konafb_debug("%s+\n", __func__); |
| if (!fb) { |
| pr_err("%s: no fb\n", __func__); |
| return; |
| } |
| if (bpp != 4) { |
| pr_err("%s: Only bpp = 4 suported (bpp = %d)\n", __func__, bpp); |
| return; |
| } |
| |
| curr_pix = (uint32_t*)fb; |
| for (i = 0; i < height * width; i++) { |
| // Using luminosity model: 0.21 R + 0.72 G + 0.07 B |
| // --> 54 R + 184 G + 18 B |
| gray = (18 * ((*curr_pix & 0x00FF0000) >> 16) + |
| 184 * ((*curr_pix & 0x0000FF00) >> 8) + |
| 54 * (*curr_pix & 0x000000FF)) >> 8; |
| if (gray > 192) |
| new_pix = 0xFFFFFFFF; |
| else if (gray > 128) |
| new_pix = 0xFFFFFF00; |
| else if (gray > 64) |
| new_pix = 0xFF00FF00; |
| else |
| new_pix = 0xFF000000; |
| *curr_pix = new_pix; |
| curr_pix++; |
| } |
| konafb_debug("%s-\n", __func__); |
| } |
| |
| void nt35310_brooks_convert_fb_from_special_mode(char *fb, uint32_t width, |
| uint32_t height, uint32_t bpp) { |
| uint32_t i, new_pix; |
| uint32_t *curr_pix; |
| |
| konafb_debug("%s+\n", __func__); |
| if (!fb) { |
| pr_err("%s: no fb\n", __func__); |
| return; |
| } |
| if (bpp != 4) { |
| pr_err("%s: Only bpp = 4 suported (bpp = %d)\n", __func__, bpp); |
| return; |
| } |
| |
| curr_pix = (uint32_t*)fb; |
| for (i = 0; i < height * width; i++) { |
| if (*curr_pix == 0xFFFFFFFF) |
| new_pix = 0xFFFFFFFF; /* gray 255 */ |
| else if (*curr_pix == 0xFFFFFF00) |
| new_pix = 0xFFA0A0A0; /* gray 160 */ |
| else if (*curr_pix == 0xFF00FF00) |
| new_pix = 0xFF606060; /* gray 96 */ |
| else |
| // Wrong curr_pix format should not happen. |
| // Set to 0 if that happens |
| new_pix = 0xFF000000; /* gray 0 */ |
| *curr_pix = new_pix; |
| curr_pix++; |
| } |
| konafb_debug("%s-\n", __func__); |
| } |
| |
| void nt35310_brooks_draw_one_corner(char *fb, uint32_t width, uint32_t height, |
| uint32_t bpp, int8_t dx, int8_t dy) |
| { |
| char *pixel_base = 0; |
| uint16_t i = 0; |
| uint16_t x = (dx == CORNER_LEFT) ? 0 : width - 1; |
| uint16_t y = (dy == CORNER_TOP) ? 0 : height - 1; |
| |
| do { |
| // last pixel in line |
| if (corner_data[i] == 0xFF) { |
| x = (dx == CORNER_LEFT) ? 0 : width - 1; |
| y += dy; |
| continue; |
| |
| // first pixel in line (= number of black pixels) |
| } else if ((i == 0) || (corner_data[i - 1] == 0xFF)) { |
| memset(fb + (y * width + x - |
| (dx == CORNER_RIGHT ? corner_data[i] - 1 : 0)) * |
| bpp / 8, 0, corner_data[i] * bpp / 8); |
| |
| x += corner_data[i] * dx; |
| |
| continue; |
| } |
| |
| pixel_base = fb + (y * width + x) * bpp / 8; |
| *(pixel_base + 0) = (*(pixel_base + 0) * corner_data[i]) >> 8; |
| *(pixel_base + 1) = (*(pixel_base + 1) * corner_data[i]) >> 8; |
| *(pixel_base + 2) = (*(pixel_base + 2) * corner_data[i]) >> 8; |
| |
| x += dx; |
| } while (++i < CORNER_DATA_SIZE - 1); |
| } |
| |
| void nt35310_brooks_draw_corners(char *fb, uint32_t width, uint32_t height, |
| uint32_t bpp) |
| { |
| nt35310_brooks_draw_one_corner(fb, width, height, bpp, |
| CORNER_LEFT, CORNER_TOP); |
| nt35310_brooks_draw_one_corner(fb, width, height, bpp, |
| CORNER_RIGHT, CORNER_TOP); |
| nt35310_brooks_draw_one_corner(fb, width, height, bpp, |
| CORNER_LEFT, CORNER_BOTTOM); |
| nt35310_brooks_draw_one_corner(fb, width, height, bpp, |
| CORNER_RIGHT, CORNER_BOTTOM); |
| } |
| |
| __initdata struct lcd_config nt35310_brooks_cfg = { |
| .name = "NT35310_Brooks", |
| .mode_supp = LCD_CMD_ONLY, |
| .phy_timing = &nt35310_brooks_timing[0], |
| .max_lanes = 1, |
| .max_hs_bps = 550000000, |
| .max_lp_bps = 5000000, |
| .phys_width = 29, |
| .phys_height = 29, |
| .init_cmd_seq = &nt35310_brooks_init_panel_cmd[0], |
| .init_vid_seq = NULL, |
| .slp_in_seq = &nt35310_brooks_slp_in[0], |
| .slp_out_seq = &nt35310_brooks_init_panel_cmd[0], /* same as init */ |
| .scrn_on_seq = &nt35310_brooks_scrn_on[0], |
| .scrn_off_seq = &nt35310_brooks_scrn_off[0], |
| .cabc_init_seq = &nt35310_brooks_cabc_init[0], |
| .cabc_on_seq = &nt35310_brooks_cabc_on[0], |
| .cabc_off_seq = &nt35310_brooks_cabc_off[0], |
| .cabc_enabled = true, |
| .id_seq = &nt35310_Brooks_id[0], |
| .verify_id = false, |
| .updt_win_fn = nt35310_brooks_winset, |
| .updt_win_seq_len = NT35310_BROOKS_UPDT_WIN_SEQ_LEN, |
| .vid_cmnds = false, |
| .vburst = false, |
| .cont_clk = false, |
| .hs = 0, |
| .hbp = 0, |
| .hfp = 0, |
| .vs = 0, |
| .vbp = 0, |
| .vfp = 0, |
| .special_mode_panel = true, |
| .special_mode_on = false, |
| .special_mode_on_cmd_seq = &nt35310_brooks_idle_mode_on[0], |
| .special_mode_off_cmd_seq = &nt35310_brooks_idle_mode_off[0], |
| .fb_to_special_mode = nt35310_brooks_convert_fb_to_special_mode, |
| .fb_from_special_mode = nt35310_brooks_convert_fb_from_special_mode, |
| .draw_corners = &nt35310_brooks_draw_corners, |
| .clear_ram_row_start = 1, |
| .clear_ram_row_end = 480, |
| .clear_panel_ram = true, |
| .no_te_in_sleep = true, |
| }; |
| |
| #endif |