Add DDR test address to the FSP switch arguments
Provide a DDR memory location pointer via an extra argument
to the SBL FSP switch routine. This memory location is used before
and after the switch to test the validity of DDR read/write
operations.
Change-Id: I79997749a903484138ad192469198c4484467ec4
Signed-off-by: tsrytkon <teemu.s.rytkonen@intel.com>
diff --git a/drivers/thermal/mnh-clk.c b/drivers/thermal/mnh-clk.c
index 747f419..2000674 100644
--- a/drivers/thermal/mnh-clk.c
+++ b/drivers/thermal/mnh-clk.c
@@ -190,6 +190,7 @@
const struct freq_reg_table *cpu_pllcfg;
const struct freq_reg_table *ipu_pllcfg;
spinlock_t reset_lock;
+ uint32_t fsp_cycle;
};
static struct mnh_freq_cooling_device *mnh_dev;
@@ -692,7 +693,6 @@
{
int ret = 0;
static int iteration;
-
if (!mnh_dev)
return -ENODEV;
@@ -721,8 +721,10 @@
/* debug register */
HW_OUTx(mnh_dev->regs, SCU, GPS, 3, 0);
- ret = invoke_mnh_fn_smc(MNH_PM_FSP_SET_AARCH64, index, 0, 0);
-
+ ret = invoke_mnh_fn_smc(MNH_PM_FSP_SET_AARCH64,
+ index,
+ virt_to_phys(&mnh_dev->fsp_cycle),
+ 0);
if (ret) {
dev_err(mnh_dev->dev, "Switch routine returned an error: %d %d\n",
ret, HW_INx(mnh_dev->regs, SCU, GPS, 3));
