/** @file | |
* | |
* Copyright (c) 2011-2013, ARM Limited. All rights reserved. | |
* | |
* This program and the accompanying materials | |
* are licensed and made available under the terms and conditions of the BSD License | |
* which accompanies this distribution. The full text of the license may be found at | |
* http://opensource.org/licenses/bsd-license.php | |
* | |
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
* | |
**/ | |
#include <Library/IoLib.h> | |
#include <Library/ArmPlatformLib.h> | |
#include <Library/DebugLib.h> | |
#include <Library/PcdLib.h> | |
#include <Ppi/ArmMpCoreInfo.h> | |
#include <ArmPlatform.h> | |
UINTN | |
ArmGetCpuCountPerCluster ( | |
VOID | |
); | |
ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = { | |
{ | |
// Cluster 0, Core 0 | |
0x0, 0x0, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 0, Core 1 | |
0x0, 0x1, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 0, Core 2 | |
0x0, 0x2, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 0, Core 3 | |
0x0, 0x3, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 1, Core 0 | |
0x1, 0x0, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 1, Core 1 | |
0x1, 0x1, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 1, Core 2 | |
0x1, 0x2, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
}, | |
{ | |
// Cluster 1, Core 3 | |
0x1, 0x3, | |
// MP Core MailBox Set/Get/Clear Addresses and Clear Value | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, | |
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, | |
(UINT64)0xFFFFFFFF | |
} | |
}; | |
/** | |
Return the current Boot Mode | |
This function returns the boot reason on the platform | |
@return Return the current Boot Mode of the platform | |
**/ | |
EFI_BOOT_MODE | |
ArmPlatformGetBootMode ( | |
VOID | |
) | |
{ | |
return BOOT_WITH_FULL_CONFIGURATION; | |
} | |
/** | |
Initialize controllers that must setup in the normal world | |
This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim | |
in the PEI phase. | |
**/ | |
RETURN_STATUS | |
ArmPlatformInitialize ( | |
IN UINTN MpId | |
) | |
{ | |
if (!ArmPlatformIsPrimaryCore (MpId)) { | |
return RETURN_SUCCESS; | |
} | |
// Disable memory remapping and return to normal mapping | |
MmioOr32 (SP810_CTRL_BASE, BIT8); | |
return RETURN_SUCCESS; | |
} | |
/** | |
Initialize the system (or sometimes called permanent) memory | |
This memory is generally represented by the DRAM. | |
**/ | |
VOID | |
ArmPlatformInitializeSystemMemory ( | |
VOID | |
) | |
{ | |
// Nothing to do here | |
} | |
EFI_STATUS | |
PrePeiCoreGetMpCoreInfo ( | |
OUT UINTN *CoreCount, | |
OUT ARM_CORE_INFO **ArmCoreTable | |
) | |
{ | |
UINT32 ProcType; | |
ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK; | |
if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) { | |
// Only support one cluster on all but ARMv8 FVP platform. FVP still uses CortexA9 ID. | |
*CoreCount = ArmGetCpuCountPerCluster (); | |
*ArmCoreTable = mVersatileExpressMpCoreInfoTable; | |
return EFI_SUCCESS; | |
} else { | |
return EFI_UNSUPPORTED; | |
} | |
} | |
// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore | |
EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; | |
ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; | |
EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { | |
{ | |
EFI_PEI_PPI_DESCRIPTOR_PPI, | |
&mArmMpCoreInfoPpiGuid, | |
&mMpCoreInfoPpi | |
} | |
}; | |
VOID | |
ArmPlatformGetPlatformPpiList ( | |
OUT UINTN *PpiListSize, | |
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList | |
) | |
{ | |
*PpiListSize = sizeof(gPlatformPpiTable); | |
*PpiList = gPlatformPpiTable; | |
} |