commit 3cdbd7528bd46584551de60f3c47e63963dda117
author Ard Biesheuvel <ard.biesheuvel@linaro.org> Mon Aug 08 11:58:59 2016 +0200
committer Ard Biesheuvel <ard.biesheuvel@linaro.org> Tue Aug 09 09:49:57 2016 +0200
tree d302c8ed8500100025d0f0f26ba070e24487e8d6
parent 9e730bd16418d76e400f87cf852b53f960d1d5b3

BaseTools CLANG35: add missing XIP flags for AARCH64

When building for AARCH64, code that may execute with the MMU off should
not perform unaligned accesses, which is why we set -mstrict-align for
BASE, SEC, PEI_CORE and PEIM modules when building with GCCx. However,
this setting is missing from CLANG35 so set it there as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

BaseTools/Conf/tools_def.template

diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 4f1dd4b..76ec62f 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -5422,6 +5422,7 @@
 *_CLANG35_AARCH64_RC_FLAGS       = DEF(GCC_AARCH64_RC_FLAGS)

 *_CLANG35_AARCH64_VFRPP_FLAGS    = DEF(GCC_VFRPP_FLAGS) DEF(CLANG35_AARCH64_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)

 *_CLANG35_AARCH64_ASLPP_FLAGS    = DEF(GCC_ASLPP_FLAGS) DEF(CLANG35_AARCH64_TARGET)

+*_CLANG35_AARCH64_CC_XIPFLAGS    = DEF(GCC_AARCH64_CC_XIPFLAGS)

 

   DEBUG_CLANG35_AARCH64_CC_FLAGS = DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -O0

 RELEASE_CLANG35_AARCH64_CC_FLAGS = DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -Oz