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/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __SOC_ROCKCHIP_RK3399_DRAM_H__
#define __SOC_ROCKCHIP_RK3399_DRAM_H__
#include <dram_regs.h>
#include <plat_private.h>
#include <stdint.h>
enum {
DDR3 = 3,
LPDDR2 = 5,
LPDDR3 = 6,
LPDDR4 = 7,
UNUSED = 0xff
};
struct rk3399_ddr_pctl_regs {
uint32_t denali_ctl[CTL_REG_NUM];
};
struct rk3399_ddr_publ_regs {
uint32_t denali_phy[PHY_REG_NUM];
};
struct rk3399_ddr_pi_regs {
uint32_t denali_pi[PI_REG_NUM];
};
union noc_ddrtiminga0 {
uint32_t d32;
struct {
unsigned acttoact : 6;
unsigned reserved0 : 2;
unsigned rdtomiss : 6;
unsigned reserved1 : 2;
unsigned wrtomiss : 6;
unsigned reserved2 : 2;
unsigned readlatency : 8;
} b;
};
union noc_ddrtimingb0 {
uint32_t d32;
struct {
unsigned rdtowr : 5;
unsigned reserved0 : 3;
unsigned wrtord : 5;
unsigned reserved1 : 3;
unsigned rrd : 4;
unsigned reserved2 : 4;
unsigned faw : 6;
unsigned reserved3 : 2;
} b;
};
union noc_ddrtimingc0 {
uint32_t d32;
struct {
unsigned burstpenalty : 4;
unsigned reserved0 : 4;
unsigned wrtomwr : 6;
unsigned reserved1 : 18;
} b;
};
union noc_devtodev0 {
uint32_t d32;
struct {
unsigned busrdtord : 3;
unsigned reserved0 : 1;
unsigned busrdtowr : 3;
unsigned reserved1 : 1;
unsigned buswrtord : 3;
unsigned reserved2 : 1;
unsigned buswrtowr : 3;
unsigned reserved3 : 17;
} b;
};
union noc_ddrmode {
uint32_t d32;
struct {
unsigned autoprecharge : 1;
unsigned bypassfiltering : 1;
unsigned fawbank : 1;
unsigned burstsize : 2;
unsigned mwrsize : 2;
unsigned reserved2 : 1;
unsigned forceorder : 8;
unsigned forceorderstate : 8;
unsigned reserved3 : 8;
} b;
};
struct rk3399_msch_timings {
union noc_ddrtiminga0 ddrtiminga0;
union noc_ddrtimingb0 ddrtimingb0;
union noc_ddrtimingc0 ddrtimingc0;
union noc_devtodev0 devtodev0;
union noc_ddrmode ddrmode;
uint32_t agingx0;
};
struct rk3399_sdram_channel {
unsigned char rank;
/* col = 0, means this channel is invalid */
unsigned char col;
/* 3:8bank, 2:4bank */
unsigned char bk;
/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
unsigned char bw;
/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
unsigned char dbw;
/* row_3_4 = 1: 6Gb or 12Gb die
* row_3_4 = 0: normal die, power of 2
*/
unsigned char row_3_4;
unsigned char cs0_row;
unsigned char cs1_row;
uint32_t ddrconfig;
struct rk3399_msch_timings noc_timings;
};
struct rk3399_sdram_params {
struct rk3399_sdram_channel ch[2];
uint32_t ddr_freq;
unsigned char dramtype;
unsigned char num_channels;
unsigned char stride;
unsigned char odt;
struct rk3399_ddr_pctl_regs pctl_regs;
struct rk3399_ddr_pi_regs pi_regs;
struct rk3399_ddr_publ_regs phy_regs;
uint32_t rx_cal_dqs[2][4];
};
extern __sramdata struct rk3399_sdram_params sdram_config;
void dram_init(void);
#endif