rockchip: fix the scu idle for rk3399
As rk3399 reported the d8/octane scores drop 10% with cpu idle.
The root cause is thc cpu cluster enter the slow mode.
We don't need switch the clock to 24MHz if cpu cluster enter the
retention mode. In order to improve performance, it just needs for
cluster enter powering off mode.
Also, we shouldn't do anything for hlvl if the system is off.
Change-Id: I2a02962a01343abd0cba47ed63192c1cdf88b119
diff --git a/plat/rockchip/common/plat_pm.c b/plat/rockchip/common/plat_pm.c
old mode 100644
new mode 100755
index 7372fcf..3c2c79a
--- a/plat/rockchip/common/plat_pm.c
+++ b/plat/rockchip/common/plat_pm.c
@@ -195,6 +195,9 @@
if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
plat_cci_disable();
+ if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
+ return;
+
if (!rockchip_ops || !rockchip_ops->hlvl_pwr_dm_suspend)
return;
@@ -263,6 +266,12 @@
if (!rockchip_ops)
goto comm_finish;
+ if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) {
+ if (rockchip_ops->sys_pwr_dm_resume)
+ rockchip_ops->sys_pwr_dm_resume();
+ goto comm_finish;
+ }
+
if (rockchip_ops->hlvl_pwr_dm_resume) {
for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
lvl_state = target_state->pwr_domain_state[lvl];
@@ -270,20 +279,16 @@
}
}
- if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE &&
- rockchip_ops->sys_pwr_dm_resume) {
- rockchip_ops->sys_pwr_dm_resume();
- } else if (rockchip_ops->cores_pwr_dm_resume) {
+ if (rockchip_ops->cores_pwr_dm_resume)
rockchip_ops->cores_pwr_dm_resume();
- }
-
-comm_finish:
/*
- * Program the gic per-cpu distributor
- * or re-distributor interface
- */
+ * Program the gic per-cpu distributor or re-distributor interface.
+ * For sys power domain operation, resuming of the gic needs to operate in
+ * rockchip_ops->sys_pwr_dm_resume, according to the sys power mode implements.
+ */
plat_rockchip_gic_cpuif_enable();
+comm_finish:
/* Perform the common cluster specific operations */
if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) {
/* Enable coherency if this cluster was off */
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c
old mode 100644
new mode 100755
index d2d1acd..50953d8
--- a/plat/rockchip/rk3399/drivers/pmu/pmu.c
+++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c
@@ -546,8 +546,7 @@
assert(cpu_id < PLATFORM_CORE_COUNT);
- if (lvl_state == PLAT_MAX_RET_STATE ||
- lvl_state == PLAT_MAX_OFF_STATE) {
+ if (lvl_state == PLAT_MAX_OFF_STATE) {
if (cpu_id < PLATFORM_CLUSTER0_CORE_COUNT) {
pll_id = ALPLL_ID;
clst_st_msk = CLST_L_CPUS_MSK;
@@ -591,8 +590,7 @@
assert(cpu_id < PLATFORM_CORE_COUNT);
- if (lvl_state == PLAT_MAX_RET_STATE ||
- lvl_state == PLAT_MAX_OFF_STATE) {
+ if (lvl_state == PLAT_MAX_OFF_STATE) {
if (cpu_id < PLATFORM_CLUSTER0_CORE_COUNT)
pll_id = ALPLL_ID;
else
