D05/ACPI: fix an error of sas0/sas1 interrupts map

the interrupt 74 was omited and 160 was added by mistake.
correct this error.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl
index 528f8a3..9ee9d83 100644
--- a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl
+++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl
@@ -103,24 +103,24 @@
       {

         64,65,66,67,68,

         69,70,71,72,73,

-        75,76,77,78,79,

-        80,81,82,83,84,

-        85,86,87,88,89,

-        90,91,92,93,94,

-        95,96,97,98,99,

-        100,101,102,103,104,

-        105,106,107,108,109,

-        110,111,112,113,114,

-        115,116,117,118,119,

-        120,121,122,123,124,

-        125,126,127,128,129,

-        130,131,132,133,134,

-        135,136,137,138,139,

-        140,141,142,143,144,

-        145,146,147,148,149,

-        150,151,152,153,154,

-        155,156,157,158,159,

-        160,

+        74,75,76,77,78,

+        79,80,81,82,83,

+        84,85,86,87,88,

+        89,90,91,92,93,

+        94,95,96,97,98,

+        99,100,101,102,103,

+        104,105,106,107,108,

+        109,110,111,112,113,

+        114,115,116,117,118,

+        119,120,121,122,123,

+        124,125,126,127,128,

+        129,130,131,132,133,

+        134,135,136,137,138,

+        139,140,141,142,143,

+        144,145,146,147,148,

+        149,150,151,152,153,

+        154,155,156,157,158,

+        159,

       }

 

       Interrupt (ResourceProducer, Edge, ActiveHigh, Exclusive, 0,,)

@@ -156,24 +156,24 @@
       {

         64,65,66,67,68,

         69,70,71,72,73,

-        75,76,77,78,79,

-        80,81,82,83,84,

-        85,86,87,88,89,

-        90,91,92,93,94,

-        95,96,97,98,99,

-        100,101,102,103,104,

-        105,106,107,108,109,

-        110,111,112,113,114,

-        115,116,117,118,119,

-        120,121,122,123,124,

-        125,126,127,128,129,

-        130,131,132,133,134,

-        135,136,137,138,139,

-        140,141,142,143,144,

-        145,146,147,148,149,

-        150,151,152,153,154,

-        155,156,157,158,159,

-        160,

+        74,75,76,77,78,

+        79,80,81,82,83,

+        84,85,86,87,88,

+        89,90,91,92,93,

+        94,95,96,97,98,

+        99,100,101,102,103,

+        104,105,106,107,108,

+        109,110,111,112,113,

+        114,115,116,117,118,

+        119,120,121,122,123,

+        124,125,126,127,128,

+        129,130,131,132,133,

+        134,135,136,137,138,

+        139,140,141,142,143,

+        144,145,146,147,148,

+        149,150,151,152,153,

+        154,155,156,157,158,

+        159,

       }

 

       Interrupt (ResourceProducer, Edge, ActiveHigh, Exclusive, 0, ,)

diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
index 0c24bce..93beb95 100644
--- a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
+++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
@@ -25,24 +25,24 @@
       {

         64,65,66,67,68,

         69,70,71,72,73,

-        75,76,77,78,79,

-        80,81,82,83,84,

-        85,86,87,88,89,

-        90,91,92,93,94,

-        95,96,97,98,99,

-        100,101,102,103,104,

-        105,106,107,108,109,

-        110,111,112,113,114,

-        115,116,117,118,119,

-        120,121,122,123,124,

-        125,126,127,128,129,

-        130,131,132,133,134,

-        135,136,137,138,139,

-        140,141,142,143,144,

-        145,146,147,148,149,

-        150,151,152,153,154,

-        155,156,157,158,159,

-        160,

+        74,75,76,77,78,

+        79,80,81,82,83,

+        84,85,86,87,88,

+        89,90,91,92,93,

+        94,95,96,97,98,

+        99,100,101,102,103,

+        104,105,106,107,108,

+        109,110,111,112,113,

+        114,115,116,117,118,

+        119,120,121,122,123,

+        124,125,126,127,128,

+        129,130,131,132,133,

+        134,135,136,137,138,

+        139,140,141,142,143,

+        144,145,146,147,148,

+        149,150,151,152,153,

+        154,155,156,157,158,

+        159,

       }

 

       Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, 0, "\\_SB.MBI2")

@@ -100,24 +100,24 @@
       {

         64,65,66,67,68,

         69,70,71,72,73,

-        75,76,77,78,79,

-        80,81,82,83,84,

-        85,86,87,88,89,

-        90,91,92,93,94,

-        95,96,97,98,99,

-        100,101,102,103,104,

-        105,106,107,108,109,

-        110,111,112,113,114,

-        115,116,117,118,119,

-        120,121,122,123,124,

-        125,126,127,128,129,

-        130,131,132,133,134,

-        135,136,137,138,139,

-        140,141,142,143,144,

-        145,146,147,148,149,

-        150,151,152,153,154,

-        155,156,157,158,159,

-        160,

+        74,75,76,77,78,

+        79,80,81,82,83,

+        84,85,86,87,88,

+        89,90,91,92,93,

+        94,95,96,97,98,

+        99,100,101,102,103,

+        104,105,106,107,108,

+        109,110,111,112,113,

+        114,115,116,117,118,

+        119,120,121,122,123,

+        124,125,126,127,128,

+        129,130,131,132,133,

+        134,135,136,137,138,

+        139,140,141,142,143,

+        144,145,146,147,148,

+        149,150,151,152,153,

+        154,155,156,157,158,

+        159,

       }

 

       Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, 0, "\\_SB.MBI3")