commit c58960c3cd1f9cf31dbf348b9e3ef1194cbd0316
author Heyi Guo <heyi.guo@linaro.org> Fri Aug 12 17:37:55 2016 +0800
committer Leif Lindholm <leif.lindholm@linaro.org> Thu Oct 27 12:54:59 2016 +0100
tree b07f863e3a82cd72704a211a0092b66fa0df13fd
parent f7fdf04a4575d3e880b413b413b2f8ccc0fcb89e

Hisilicon/Hi1610/PCIe: Remove lane reversal code

Lane reversal is the default setting of chip and it is unnecessary for
software to do that.
We made a mistake to do it in software, and this patch is to remove
the duplication.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: hensonwang <wanghuiqiang@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c

diff --git a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
index 5c14907..06ecf87 100755
--- a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
+++ b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
@@ -926,7 +926,6 @@
      (VOID)PciePcsInit(soctype, HostBridgeNum, PortIndex);

 

      (VOID)PcieModeSet(soctype, HostBridgeNum, PortIndex,PcieCfg->PortInfo.PortType);

-     (VOID)PcieLaneReversalSet(soctype, HostBridgeNum, PortIndex);

      (VOID)PcieSpdSet(soctype, HostBridgeNum, PortIndex, 3);

      (VOID)PciePortNumSet(soctype, HostBridgeNum, PortIndex, 0);

      /* setup root complex */