Platforms/ARM: add PcdUartDefaultReceiveFifoDepth
The upstream code uses a PCD to set the FIFO depth:
f423d76 2016-03-17 MdeModulePkg/SerialDxe: Set FIFO depth with PCD
Add a sensible default for the PCD before the code becomes more widely
used.
The PL011UartInitializePort function in the PL011 driver expects the
receive FIFO depth to be set to a sane value or zero to use the
appropriate default for the version of PL011 present on the device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc
index 3910389..aef4c21 100644
--- a/Platforms/ARM/Juno/ArmJuno.dsc
+++ b/Platforms/ARM/Juno/ArmJuno.dsc
@@ -121,6 +121,7 @@
## PL011 - Serial Terminal
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
gArmPlatformTokenSpaceGuid.PL011UartInteger|4
gArmPlatformTokenSpaceGuid.PL011UartFractional|0
diff --git a/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc b/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc
index 6fee399..9daf3c8 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc
+++ b/Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc
@@ -138,6 +138,7 @@
## PL011 - Serial Terminal
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1C090000
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
## PL031 RealTimeClock
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
index c0c80e2..265c5d7 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
+++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
@@ -142,6 +142,7 @@
## PL011 - Serial Terminal
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
## PL031 RealTimeClock
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
