blob: c17bb79f162cc6ef17f615b2d6edef5edc7c9350 [file] [log] [blame]
config ARM64
def_bool y
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
select ARCH_WANT_FRAME_POINTERS
select ARM_AMBA
select ARM_ARCH_TIMER
select ARM_GIC
select AUDIT_ARCH_COMPAT_GENERIC
select BUILDTIME_EXTABLE_SORT
select CLONE_BACKWARDS
select COMMON_CLK if !ARCH_MSM
select CPU_PM if (SUSPEND || CPU_IDLE)
select DCACHE_WORD_ACCESS
select EDAC_SUPPORT
select GENERIC_CLOCKEVENTS
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
select GENERIC_CPU_AUTOPROBE
select GENERIC_EARLY_IOREMAP
select GENERIC_IOMAP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_SCHED_CLOCK
select GENERIC_SMP_IDLE_THREAD
select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
select GENERIC_TIME_VSYSCALL
select HARDIRQS_SW_RESEND
select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_JUMP_LABEL
select HAVE_ARCH_KGDB
select HAVE_ARCH_MMAP_RND_BITS
select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
select HAVE_ARCH_SECCOMP_FILTER
select HAVE_ARCH_TRACEHOOK
select HAVE_C_RECORDMCOUNT
select HAVE_CC_STACKPROTECTOR
select HAVE_DEBUG_BUGVERBOSE
select HAVE_DEBUG_KMEMLEAK
select HAVE_DMA_API_DEBUG
select HAVE_DMA_ATTRS
select HAVE_DMA_CONTIGUOUS
select HAVE_DYNAMIC_FTRACE
select HAVE_EFFICIENT_UNALIGNED_ACCESS
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_GENERIC_DMA_COHERENT
select HAVE_MEMBLOCK
select HAVE_PATA_PLATFORM
select HAVE_PERF_EVENTS
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select NO_BOOTMEM
select OF
select OF_EARLY_FLATTREE
select OF_RESERVED_MEM
select PERF_USE_VMALLOC
select POWER_RESET
select POWER_SUPPLY
select RTC_LIB
select SPARSE_IRQ
select SYSCTL_EXCEPTION_TRACE
select MSM_JTAGV8 if CORESIGHT_ETMV4
help
ARM 64-bit (AArch64) Linux support.
config 64BIT
def_bool y
config ARCH_PHYS_ADDR_T_64BIT
def_bool y
config MMU
def_bool y
config NO_IOPORT_MAP
def_bool y
config ARCH_MMAP_RND_BITS_MIN
default 14 if ARM64_64K_PAGES
default 18
# max bits determined by the following formula:
# VA_BITS - PAGE_SHIFT - 3
# VA_BITS is always 39
config ARCH_MMAP_RND_BITS_MAX
default 20 if ARM64_64K_PAGES
default 24
config ARCH_MMAP_RND_COMPAT_BITS_MIN
default 11
config ARCH_MMAP_RND_COMPAT_BITS_MAX
default 16
config STACKTRACE_SUPPORT
def_bool y
config LOCKDEP_SUPPORT
def_bool y
config TRACE_IRQFLAGS_SUPPORT
def_bool y
config RWSEM_XCHGADD_ALGORITHM
def_bool y
config GENERIC_BUG
def_bool y
depends on BUG
config GENERIC_HWEIGHT
def_bool y
config GENERIC_CSUM
def_bool y
config GENERIC_CALIBRATE_DELAY
def_bool y
config ZONE_DMA
def_bool y
config ARCH_DMA_ADDR_T_64BIT
def_bool y
config NEED_DMA_MAP_STATE
def_bool y
config NEED_SG_DMA_LENGTH
def_bool y
config ARM64_DMA_USE_IOMMU
bool
select ARM_HAS_SG_CHAIN
select NEED_SG_DMA_LENGTH
if ARM64_DMA_USE_IOMMU
config ARM64_DMA_IOMMU_ALIGNMENT
int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
range 4 9
default 8
help
DMA mapping framework by default aligns all buffers to the smallest
PAGE_SIZE order which is greater than or equal to the requested buffer
size. This works well for buffers up to a few hundreds kilobytes, but
for larger buffers it just a waste of address space. Drivers which has
relatively small addressing window (like 64Mib) might run out of
virtual space with just a few allocations.
With this parameter you can specify the maximum PAGE_SIZE order for
DMA IOMMU buffers. Larger buffers will be aligned only to this
specified order. The order is expressed as a power of two multiplied
by the PAGE_SIZE.
endif
config SWIOTLB
def_bool y
config IOMMU_HELPER
def_bool SWIOTLB
config KERNEL_MODE_NEON
def_bool y
config ARCH_HAS_CPUFREQ
bool
help
Internal node to signify that the ARCH has CPUFREQ support
and that the relevant menu configurations are displayed for
it.
config FIX_EARLYCON_MEM
def_bool y
source "init/Kconfig"
source "kernel/Kconfig.freezer"
menu "Platform selection"
config ARCH_VEXPRESS
bool "ARMv8 software model (Versatile Express)"
select ARCH_REQUIRE_GPIOLIB
select COMMON_CLK_VERSATILE
select POWER_RESET_VEXPRESS
select VEXPRESS_CONFIG
help
This enables support for the ARMv8 software model (Versatile
Express).
config ARCH_MSM
bool "Qualcomm Platforms"
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select HAVE_CLK
select HAVE_CLK_PREPARE
select MSM_IRQ
select PINCTRL
select SOC_BUS
select PCI
select ARCH_HAS_CPUFREQ
select CPU_FREQ_MSM
select PM_OPP
select PM_DEVFREQ
select MSM_DEVFREQ_DEVBW
select MSM_BIMC_BWMON
select DEVFREQ_GOV_MSM_BW_HWMON
select DEVFREQ_SIMPLE_DEV
help
This enables support for the ARMv8 based Qualcomm chipsets.
config ARCH_MSM8916
bool "Enable Support for Qualcomm MSM8916"
depends on ARCH_MSM
select RCU_BOOST if DEBUG_KMEMLEAK
help
This enables support for the MSM8916 chipset. If you dont
know what do here, say N
config ARCH_MSM8994
bool "Enable Support for Qualcomm MSM8994"
depends on ARCH_MSM
help
This enables support for the MSM8994 chipset. If you dont
know what do here, say N
config ARCH_MSM8994_V1_TLBI_WA
bool "Enable MSM8994 v1 TLBI workaround"
depends on ARCH_MSM8994
help
This enables support for the MSM8994 v1 TLBI workaround. This
workaround is required for MSM8994 V1 revision where the
[39:38] bits of VA are tied to zero and due to which TLBI
operations with VA or ASID will not work.
config MSM8994_V1_PMUIRQ_WA
bool "Enable MSM8994 v1 PMU-CTI IRQ workaround"
depends on ARCH_MSM8994 && CORESIGHT_CTI
help
This enables support for the MSM8994 v1 PMU-CTI IRQ workaround.
This workaround is required for MSM8994 V1 revision where the
percpu PMU interrupt is incorrectly connected to the corresponding
CPUs in the other cluster.
config ARCH_MSM8992
bool "Enable Support for Qualcomm MSM8992"
depends on ARCH_MSM
help
Enable kernel support for the MSM8992 chipset. If you don't
know what this is, you can safely say 'N' here.
config ARCH_XGENE
bool "AppliedMicro X-Gene SOC Family"
help
This enables support for AppliedMicro X-Gene SOC Family
endmenu
menu "Bus support"
config ARM_AMBA
bool
config PCI
bool "PCI support"
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
VESA. If you have PCI, say Y, otherwise N.
config PCI_DOMAINS
bool
depends on PCI
config PCI_SYSCALL
def_bool PCI
source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
endmenu
menu "Kernel Features"
config ARM64_DCACHE_DISABLE
bool "Disable CPU Data Caches"
help
Disable CPU data cache usage by setting the SCTLR[C] bit during
kernel initialization. This will result in a considerable
performance impact, but may be useful in certain situations.
If you are not sure what to do, select 'N' here.
config ARM64_ICACHE_DISABLE
bool "Disable CPU Instruction Caches"
help
Disable CPU instruction cache usage by setting the SCTLR[I]
bit during kernel initialization. This will result in a
considerable performance impact, but may be useful in certain
situations.
If you are not sure what to do, select 'N' here.
config ARM64_64K_PAGES
bool "Enable 64KB pages support"
help
This feature enables 64KB pages support (4KB by default)
allowing only two levels of page tables and faster TLB
look-up. AArch32 emulation is not available when this feature
is enabled.
config CPU_BIG_ENDIAN
bool "Build big-endian kernel"
help
Say Y if you plan on running a kernel in big-endian mode.
config ARM64_ERRATUM_845719
bool "Cortex-A53: 845719: a load might read incorrect data"
depends on COMPAT
default y
help
This option adds an alternative code sequence to work around ARM
erratum 845719 on Cortex-A53 parts up to r0p4.
When running a compat (AArch32) userspace on an affected Cortex-A53
part, a load at EL0 from a virtual address that matches the bottom 32
bits of the virtual address used by a recent load at (AArch64) EL1
might return incorrect data.
The workaround is to write the contextidr_el1 register on exception
return to a 32-bit task.
Please note that this does not necessarily enable the workaround,
as it depends on the alternative framework, which will only patch
the kernel if an affected CPU is detected.
If unsure, say Y.
config ARM64_A57_ERRATA_832075
bool "ARMv8 A57 Errata 832075"
help
This Erratum explains the problem that a Cortex-A57 might deadlock
when WB exclusive load/store instructions are mixed with device loads.
An interrupt will break the deadlock.
This erratum requires a particular sequence of the code:
a) A pair of exclusive load and exclusive store instructions.
The exclusive store is to write-back memory location.
b) A branch instruction has a source register which is the same as
the destination register of the older exclusive store.
c) Following the branch instruction, there are six or more loads
to device memory locations
config SMP
bool "Symmetric Multi-Processing"
help
This enables support for systems with more than one CPU. If
you say N here, the kernel will run on single and
multiprocessor machines, but will use only one CPU of a
multiprocessor machine. If you say Y here, the kernel will run
on many, but not all, single processor machines. On a single
processor machine, the kernel will run faster if you say N
here.
If you don't know what to do here, say N.
config SCHED_MC
bool "Multi-core scheduler support"
depends on SMP
help
Multi-core scheduler support improves the CPU scheduler's decision
making when dealing with multi-core CPU chips at a cost of slightly
increased overhead in some places. If unsure say N here.
config SCHED_SMT
bool "SMT scheduler support"
depends on SMP
help
Improves the CPU scheduler's decision making when dealing with
MultiThreading at a cost of slightly increased overhead in some
places. If unsure say N here.
config ARCH_WANTS_CTXSW_LOGGING
bool "Enable logging in context switch"
depends on SMP
help
Logs critical context switch latencies. If unsure say N here.
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
# These have to remain sorted largest to smallest
default "8"
config HOTPLUG_CPU
bool "Support for hot-pluggable CPUs"
depends on SMP
help
Say Y here to experiment with turning CPUs off and on. CPUs
can be controlled through /sys/devices/system/cpu.
source kernel/Kconfig.preempt
config SWP_EMULATE
bool "Emulate SWP/SWPB instructions"
help
ARMv6 architecture deprecates use of the SWP/SWPB instructions. ARMv8
oblosetes the use of SWP/SWPB instructions. ARMv7 multiprocessing
extensions introduce the ability to disable these instructions,
triggering an undefined instruction exception when executed. Say Y
here to enable software emulation of these instructions for userspace
(not kernel) using LDREX/STREX. Also creates /proc/cpu/swp_emulation
for statistics.
In some older versions of glibc [<=2.8] SWP is used during futex
trylock() operations with the assumption that the code will not
be preempted. This invalid assumption may be more likely to fail
with SWP emulation enabled, leading to deadlock of the user
application.
NOTE: when accessing uncached shared regions, LDREX/STREX rely
on an external transaction monitoring block called a global
monitor to maintain update atomicity. If your system does not
implement a global monitor, this option can cause programs that
perform SWP operations to uncached memory to deadlock.
If unsure, say Y.
config HZ
int
default 100
config ARCH_HAS_HOLES_MEMORYMODEL
def_bool y if SPARSEMEM
config ARCH_SPARSEMEM_ENABLE
def_bool y
select SPARSEMEM_VMEMMAP_ENABLE
config ARCH_SPARSEMEM_DEFAULT
def_bool ARCH_SPARSEMEM_ENABLE
config ARCH_SELECT_MEMORY_MODEL
def_bool ARCH_SPARSEMEM_ENABLE
config HAVE_ARCH_PFN_VALID
def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
depends on PERF_EVENTS
default y
help
Enable hardware performance counter support for perf events. If
disabled, perf events will use software events only.
config PERF_EVENTS_USERMODE
bool "Enable usermode access for perf events"
depends on PERF_EVENTS
help
Enable user-mode access to performance counters for perf events.
If enabled, the access permissions allowing CPU performance
counters to be accessed from user-mode are set.
If you want user-mode programs to access perf events, say Y
config PERF_EVENTS_RESET_PMU_DEBUGFS
bool "Reset PMU via debugfs node"
depends on PERF_EVENTS
help
Enable the debugfs node that can be used to reset PMUs and all
state variables associated with PMUs. If enabled, PMU and internal
state variable are cleared.
If you want to reset PMU and PMU related internal Perf variables
via debugfs then say Y.
config SYS_SUPPORTS_HUGETLBFS
def_bool y
config ARCH_WANT_GENERAL_HUGETLB
def_bool y
config ARCH_WANT_HUGE_PMD_SHARE
def_bool y if !ARM64_64K_PAGES
config HAVE_ARCH_TRANSPARENT_HUGEPAGE
def_bool y
config ARCH_HAS_CACHE_LINE_SIZE
def_bool y
config ARMV7_COMPAT
bool "Kernel support for ARMv7 applications"
depends on COMPAT
select SWP_EMULATE
help
This option enables features that allow that ran on an ARMv7 or older
processor to continue functioning.
If you want to execute ARMv7 applications, say Y
config ARMV7_COMPAT_CPUINFO
bool "Report backwards compatible cpu features in /proc/cpuinfo"
depends on ARMV7_COMPAT
default y
help
This option makes /proc/cpuinfo list CPU features that an ARMv7 or
earlier kernel would report, but are not optional on an ARMv8 or later
processor.
If you want to execute ARMv7 applications, say Y
source "mm/Kconfig"
config SECCOMP
bool "Enable seccomp to safely compute untrusted bytecode"
---help---
This kernel feature is useful for number crunching applications
that may need to compute untrusted bytecode during their
execution. By using pipes or other transports made available to
the process as file descriptors supporting the read/write
syscalls, it's possible to isolate those applications in
their own address space using seccomp. Once seccomp is
enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
and the task is only allowed to execute a few safe syscalls
defined by each seccomp mode.
config XEN_DOM0
def_bool y
depends on XEN
config XEN
bool "Xen guest support on ARM64 (EXPERIMENTAL)"
depends on ARM64 && OF
select SWIOTLB_XEN
help
Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
config FORCE_MAX_ZONEORDER
int
default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
default "11"
endmenu
menu "Boot options"
config CMDLINE
string "Default kernel command string"
default ""
help
Provide a set of default command-line options at build time by
entering them here. As a minimum, you should specify the the
root device (e.g. root=/dev/nfs).
choice
prompt "Kernel command line type" if CMDLINE != ""
default CMDLINE_FROM_BOOTLOADER
config CMDLINE_FROM_BOOTLOADER
bool "Use bootloader kernel arguments if available"
help
Uses the command-line options passed by the boot loader. If
the boot loader doesn't provide any, the default kernel command
string provided in CMDLINE will be used.
config CMDLINE_EXTEND
bool "Extend bootloader kernel arguments"
help
The command-line arguments provided by the boot loader will be
appended to the default kernel command string.
config CMDLINE_FORCE
bool "Always use the default kernel command string"
help
Always use the default kernel command string, even if the boot
loader passes other arguments to the kernel.
This is useful if you cannot or don't want to change the
command-line options your boot loader passes to the kernel.
endchoice
config BUILD_ARM64_APPENDED_DTB_IMAGE
bool "Build a concatenated Image.gz/dtb by default"
depends on OF
help
Enabling this option will cause a concatenated Image.gz and list of
DTBs to be built by default (instead of a standalone Image.gz.)
The image will built in arch/arm64/boot/Image.gz-dtb
config BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES
string "Default dtb names"
depends on BUILD_ARM64_APPENDED_DTB_IMAGE
help
Space separated list of names of dtbs to append when
building a concatenated Image.gz-dtb.
config EFI
bool "UEFI runtime support"
depends on OF && !CPU_BIG_ENDIAN
select LIBFDT
select UCS2_STRING
select EFI_PARAMS_FROM_FDT
help
This option provides support for runtime services provided
by UEFI firmware (such as non-volatile variables, realtime
clock, and platform reset). A UEFI stub is also provided to
allow the kernel to be booted as an EFI application. This
is only useful on systems that have UEFI firmware.
endmenu
menu "Userspace binary formats"
source "fs/Kconfig.binfmt"
config COMPAT
bool "Kernel support for 32-bit EL0"
depends on !ARM64_64K_PAGES
select COMPAT_BINFMT_ELF
select HAVE_UID16
select OLD_SIGSUSPEND3
select COMPAT_OLD_SIGACTION
help
This option enables support for a 32-bit EL0 running under a 64-bit
kernel at EL1. AArch32-specific components such as system calls,
the user helper functions, VFP support and the ptrace interface are
handled appropriately by the kernel.
If you want to execute 32-bit userspace applications, say Y.
config SYSVIPC_COMPAT
def_bool y
depends on COMPAT && SYSVIPC
endmenu
menu "Power management options"
source "kernel/power/Kconfig"
config ARCH_SUSPEND_POSSIBLE
def_bool y
config ARM64_CPU_SUSPEND
def_bool PM_SLEEP
endmenu
menu "CPU Power Management"
if ARCH_HAS_CPUFREQ
source "drivers/cpufreq/Kconfig"
endif
source "drivers/cpuidle/Kconfig"
endmenu
source "net/Kconfig"
source "drivers/Kconfig"
source "drivers/firmware/Kconfig"
source "fs/Kconfig"
source "arch/arm64/kvm/Kconfig"
source "arch/arm64/Kconfig.debug"
source "security/Kconfig"
source "crypto/Kconfig"
if CRYPTO
source "arch/arm64/crypto/Kconfig"
endif
source "lib/Kconfig"
source "arch/arm64/mm/Kconfig"