commit eb21efafc629759705de263d5b3da18ceb9a23b2
author Jiang, Yunhong <yjiang5@intel.com> Tue Jan 17 16:26:15 2012 +0800
committer Jiang, Yunhong <yunhong.jiang@intel.com> Wed Jan 18 05:14:44 2012 +0800
tree 09147888fa36622b5c546832312137acec451cec
parent 930baf66aeb08c8c72fb5ab3194014d41bb18f94

Change the MP table to support >16 IRQ number

Now the MP table include 16 entry, increase to the number of IOAPIC
pin number. All goldfish devices should be covered by this.

Change-Id: I05c1176b5396d8a88c3aedf07b1e0d7c6578a914
Signed-off-by: Jiang, Yunhong <yjiang5@intel.com>

bochs/bios/rombios32.c

diff --git a/bochs/bios/rombios32.c b/bochs/bios/rombios32.c
index f861f81..f8de96d 100644
--- a/bochs/bios/rombios32.c
+++ b/bochs/bios/rombios32.c
@@ -1181,7 +1181,7 @@
     putle32(&q, 0xfec00000); /* I/O APIC addr */
 
     /* irqs */
-    for(i = 0; i < 16; i++) {
+    for(i = 0; i < 32; i++) {
 #ifdef BX_QEMU
         /* One entry per ioapic input. Input 2 is covered by 
            irq0->inti2 override (i == 0). irq 2 is unused */