| #ifndef RNNDB_NV50_TEXTURE_XML |
| #define RNNDB_NV50_TEXTURE_XML |
| |
| /* Autogenerated file, DO NOT EDIT manually! |
| |
| This file was generated by the rules-ng-ng headergen tool in this git repository: |
| http://0x04.net/cgit/index.cgi/rules-ng-ng |
| git clone git://0x04.net/rules-ng-ng |
| |
| The rules-ng-ng source files this header was generated from are: |
| - rnndb/nv50_texture.xml ( 8180 bytes, from 2012-07-31 11:07:50) |
| - ./rnndb/copyright.xml ( 6452 bytes, from 2011-07-10 21:35:25) |
| - ./rnndb/nvchipsets.xml ( 3736 bytes, from 2012-07-31 11:01:16) |
| - ./rnndb/nv50_defs.xml ( 5468 bytes, from 2011-07-10 21:35:25) |
| |
| Copyright (C) 2006-2012 by the following authors: |
| - Artur Huillet <arthur.huillet@free.fr> (ahuillet) |
| - Ben Skeggs (darktama, darktama_) |
| - B. R. <koala_br@users.sourceforge.net> (koala_br) |
| - Carlos Martin <carlosmn@users.sf.net> (carlosmn) |
| - Christoph Bumiller <e0425955@student.tuwien.ac.at> (calim, chrisbmr) |
| - Dawid Gajownik <gajownik@users.sf.net> (gajownik) |
| - Dmitry Baryshkov |
| - Dmitry Eremin-Solenikov <lumag@users.sf.net> (lumag) |
| - EdB <edb_@users.sf.net> (edb_) |
| - Erik Waling <erikwailing@users.sf.net> (erikwaling) |
| - Francisco Jerez <currojerez@riseup.net> (curro) |
| - imirkin <imirkin@users.sf.net> (imirkin) |
| - jb17bsome <jb17bsome@bellsouth.net> (jb17bsome) |
| - Jeremy Kolb <kjeremy@users.sf.net> (kjeremy) |
| - Laurent Carlier <lordheavym@gmail.com> (lordheavy) |
| - Luca Barbieri <luca@luca-barbieri.com> (lb, lb1) |
| - Maarten Maathuis <madman2003@gmail.com> (stillunknown) |
| - Marcin Kościelnicki <koriakin@0x04.net> (mwk, koriakin) |
| - Mark Carey <mark.carey@gmail.com> (careym) |
| - Matthieu Castet <matthieu.castet@parrot.com> (mat-c) |
| - nvidiaman <nvidiaman@users.sf.net> (nvidiaman) |
| - Patrice Mandin <patmandin@gmail.com> (pmandin, pmdata) |
| - Pekka Paalanen <pq@iki.fi> (pq, ppaalanen) |
| - Peter Popov <ironpeter@users.sf.net> (ironpeter) |
| - Richard Hughes <hughsient@users.sf.net> (hughsient) |
| - Rudi Cilibrasi <cilibrar@users.sf.net> (cilibrar) |
| - Serge Martin |
| - Simon Raffeiner |
| - Stephane Loeuillet <leroutier@users.sf.net> (leroutier) |
| - Stephane Marchesin <stephane.marchesin@gmail.com> (marcheu) |
| - sturmflut <sturmflut@users.sf.net> (sturmflut) |
| - Sylvain Munaut <tnt@246tNt.com> |
| - Victor Stinner <victor.stinner@haypocalc.com> (haypo) |
| - Wladmir van der Laan <laanwj@gmail.com> (miathan6) |
| - Younes Manton <younes.m@gmail.com> (ymanton) |
| |
| Permission is hereby granted, free of charge, to any person obtaining |
| a copy of this software and associated documentation files (the |
| "Software"), to deal in the Software without restriction, including |
| without limitation the rights to use, copy, modify, merge, publish, |
| distribute, sublicense, and/or sell copies of the Software, and to |
| permit persons to whom the Software is furnished to do so, subject to |
| the following conditions: |
| |
| The above copyright notice and this permission notice (including the |
| next paragraph) shall be included in all copies or substantial |
| portions of the Software. |
| |
| THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
| LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
| OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
| WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| |
| |
| #define NV50_TIC_MAP_ZERO 0x00000000 |
| #define NV50_TIC_MAP_C0 0x00000002 |
| #define NV50_TIC_MAP_C1 0x00000003 |
| #define NV50_TIC_MAP_C2 0x00000004 |
| #define NV50_TIC_MAP_C3 0x00000005 |
| #define NV50_TIC_MAP_ONE_INT 0x00000006 |
| #define NV50_TIC_MAP_ONE_FLOAT 0x00000007 |
| #define NV50_TIC_TYPE_SNORM 0x00000001 |
| #define NV50_TIC_TYPE_UNORM 0x00000002 |
| #define NV50_TIC_TYPE_SINT 0x00000003 |
| #define NV50_TIC_TYPE_UINT 0x00000004 |
| #define NV50_TIC_TYPE_SSCALED 0x00000005 |
| #define NV50_TIC_TYPE_USCALED 0x00000006 |
| #define NV50_TIC_TYPE_FLOAT 0x00000007 |
| #define NV50_TSC_WRAP_REPEAT 0x00000000 |
| #define NV50_TSC_WRAP_MIRROR_REPEAT 0x00000001 |
| #define NV50_TSC_WRAP_CLAMP_TO_EDGE 0x00000002 |
| #define NV50_TSC_WRAP_CLAMP_TO_BORDER 0x00000003 |
| #define NV50_TSC_WRAP_CLAMP 0x00000004 |
| #define NV50_TSC_WRAP_MIRROR_CLAMP_TO_EDGE 0x00000005 |
| #define NV50_TSC_WRAP_MIRROR_CLAMP_TO_BORDER 0x00000006 |
| #define NV50_TSC_WRAP_MIRROR_CLAMP 0x00000007 |
| #define NV50_TIC__SIZE 0x00000020 |
| #define NV50_TIC_0 0x00000000 |
| #define NV50_TIC_0_MAPA__MASK 0x38000000 |
| #define NV50_TIC_0_MAPA__SHIFT 27 |
| #define NV50_TIC_0_MAPB__MASK 0x07000000 |
| #define NV50_TIC_0_MAPB__SHIFT 24 |
| #define NV50_TIC_0_MAPG__MASK 0x00e00000 |
| #define NV50_TIC_0_MAPG__SHIFT 21 |
| #define NV50_TIC_0_MAPR__MASK 0x001c0000 |
| #define NV50_TIC_0_MAPR__SHIFT 18 |
| #define NV50_TIC_0_TYPE3__MASK 0x00038000 |
| #define NV50_TIC_0_TYPE3__SHIFT 15 |
| #define NV50_TIC_0_TYPE2__MASK 0x00007000 |
| #define NV50_TIC_0_TYPE2__SHIFT 12 |
| #define NV50_TIC_0_TYPE1__MASK 0x00000e00 |
| #define NV50_TIC_0_TYPE1__SHIFT 9 |
| #define NV50_TIC_0_TYPE0__MASK 0x000001c0 |
| #define NV50_TIC_0_TYPE0__SHIFT 6 |
| #define NV50_TIC_0_FMT__MASK 0x0000003f |
| #define NV50_TIC_0_FMT__SHIFT 0 |
| #define NV50_TIC_0_FMT_32_32_32_32 0x00000001 |
| #define NV50_TIC_0_FMT_16_16_16_16 0x00000003 |
| #define NV50_TIC_0_FMT_32_32 0x00000004 |
| #define NV50_TIC_0_FMT_32_8_X24 0x00000005 |
| #define NV50_TIC_0_FMT_8_8_8_8 0x00000008 |
| #define NV50_TIC_0_FMT_10_10_10_2 0x00000009 |
| #define NV50_TIC_0_FMT_16_16 0x0000000c |
| #define NV50_TIC_0_FMT_24_8 0x0000000d |
| #define NV50_TIC_0_FMT_8_24 0x0000000e |
| #define NV50_TIC_0_FMT_32 0x0000000f |
| #define NV50_TIC_0_FMT_BPTC_FLOAT 0x00000010 |
| #define NV50_TIC_0_FMT_BPTC_UFLOAT 0x00000011 |
| #define NV50_TIC_0_FMT_4_4_4_4 0x00000012 |
| #define NV50_TIC_0_FMT_1_5_5_5 0x00000013 |
| #define NV50_TIC_0_FMT_5_5_5_1 0x00000014 |
| #define NV50_TIC_0_FMT_5_6_5 0x00000015 |
| #define NV50_TIC_0_FMT_5_5_6 0x00000016 |
| #define NV50_TIC_0_FMT_BPTC 0x00000017 |
| #define NV50_TIC_0_FMT_8_8 0x00000018 |
| #define NV50_TIC_0_FMT_16 0x0000001b |
| #define NV50_TIC_0_FMT_8 0x0000001d |
| #define NV50_TIC_0_FMT_4_4 0x0000001e |
| #define NV50_TIC_0_FMT_BITMAP 0x0000001f |
| #define NV50_TIC_0_FMT_9_9_9_E5 0x00000020 |
| #define NV50_TIC_0_FMT_11_11_10 0x00000021 |
| #define NV50_TIC_0_FMT_U8_YA8_V8_YB8 0x00000022 |
| #define NV50_TIC_0_FMT_YA8_U8_YB8_V8 0x00000023 |
| #define NV50_TIC_0_FMT_DXT1 0x00000024 |
| #define NV50_TIC_0_FMT_DXT3 0x00000025 |
| #define NV50_TIC_0_FMT_DXT5 0x00000026 |
| #define NV50_TIC_0_FMT_RGTC1 0x00000027 |
| #define NV50_TIC_0_FMT_RGTC2 0x00000028 |
| #define NV50_TIC_0_FMT_S8_Z24 0x00000029 |
| #define NV50_TIC_0_FMT_Z24_X8 0x0000002a |
| #define NV50_TIC_0_FMT_Z24_S8 0x0000002b |
| #define NV50_TIC_0_FMT_Z24_C8_MS4_CS4 0x0000002c |
| #define NV50_TIC_0_FMT_Z24_C8_MS8_CS8 0x0000002d |
| #define NV50_TIC_0_FMT_Z24_C8_MS4_CS12 0x0000002e |
| #define NV50_TIC_0_FMT_Z32 0x0000002f |
| #define NV50_TIC_0_FMT_Z32_S8_X24 0x00000030 |
| #define NV50_TIC_0_FMT_Z24_X8_S8_C8_X16_MS4_CS4 0x00000031 |
| #define NV50_TIC_0_FMT_Z24_X8_S8_C8_X16_MS8_CS8 0x00000032 |
| #define NV50_TIC_0_FMT_Z32_X8_C8_X16_MS4_CS4 0x00000033 |
| #define NV50_TIC_0_FMT_Z32_X8_C8_X16_MS8_CS8 0x00000034 |
| #define NV50_TIC_0_FMT_Z32_S8_C8_X16_MS4_CS4 0x00000035 |
| #define NV50_TIC_0_FMT_Z32_S8_C8_X16_MS8_CS8 0x00000036 |
| #define NV50_TIC_0_FMT_Z24_X8_S8_C8_X16_MS4_CS12 0x00000037 |
| #define NV50_TIC_0_FMT_Z32_X8_C8_X16_MS4_CS12 0x00000038 |
| #define NV50_TIC_0_FMT_Z32_S8_C8_X16_MS4_CS12 0x00000039 |
| #define NV50_TIC_0_FMT_Z16 0x0000003a |
| |
| #define NV50_TIC_1 0x00000004 |
| #define NV50_TIC_1_OFFSET_LOW__MASK 0xffffffff |
| #define NV50_TIC_1_OFFSET_LOW__SHIFT 0 |
| |
| #define NV50_TIC_2 0x00000008 |
| #define NV50_TIC_2_OFFSET_HIGH__MASK 0x000000ff |
| #define NV50_TIC_2_OFFSET_HIGH__SHIFT 0 |
| #define NV50_TIC_2_COLORSPACE_SRGB 0x00000400 |
| #define NV50_TIC_2_TARGET__MASK 0x0003c000 |
| #define NV50_TIC_2_TARGET__SHIFT 14 |
| #define NV50_TIC_2_TARGET_1D 0x00000000 |
| #define NV50_TIC_2_TARGET_2D 0x00004000 |
| #define NV50_TIC_2_TARGET_3D 0x00008000 |
| #define NV50_TIC_2_TARGET_CUBE 0x0000c000 |
| #define NV50_TIC_2_TARGET_1D_ARRAY 0x00010000 |
| #define NV50_TIC_2_TARGET_2D_ARRAY 0x00014000 |
| #define NV50_TIC_2_TARGET_BUFFER 0x00018000 |
| #define NV50_TIC_2_TARGET_RECT 0x0001c000 |
| #define NV50_TIC_2_TARGET_CUBE_ARRAY 0x00020000 |
| #define NV50_TIC_2_LINEAR 0x00040000 |
| #define NV50_TIC_2_TILE_MODE_X__MASK 0x00380000 |
| #define NV50_TIC_2_TILE_MODE_X__SHIFT 19 |
| #define NV50_TIC_2_TILE_MODE_Y__MASK 0x01c00000 |
| #define NV50_TIC_2_TILE_MODE_Y__SHIFT 22 |
| #define NV50_TIC_2_TILE_MODE_Z__MASK 0x0e000000 |
| #define NV50_TIC_2_TILE_MODE_Z__SHIFT 25 |
| #define NV50_TIC_2_2D_UNK0258__MASK 0x30000000 |
| #define NV50_TIC_2_2D_UNK0258__SHIFT 28 |
| #define NV50_TIC_2_NO_BORDER 0x40000000 |
| #define NV50_TIC_2_NORMALIZED_COORDS 0x80000000 |
| |
| #define NV50_TIC_3 0x0000000c |
| #define NV50_TIC_3_PITCH__MASK 0xffffffff |
| #define NV50_TIC_3_PITCH__SHIFT 0 |
| |
| #define NV50_TIC_4 0x00000010 |
| #define NV50_TIC_4_WIDTH__MASK 0xffffffff |
| #define NV50_TIC_4_WIDTH__SHIFT 0 |
| |
| #define NV50_TIC_5 0x00000014 |
| #define NV50_TIC_5_LAST_LEVEL__MASK 0xf0000000 |
| #define NV50_TIC_5_LAST_LEVEL__SHIFT 28 |
| #define NV50_TIC_5_DEPTH__MASK 0x0fff0000 |
| #define NV50_TIC_5_DEPTH__SHIFT 16 |
| #define NV50_TIC_5_HEIGHT__MASK 0x0000ffff |
| #define NV50_TIC_5_HEIGHT__SHIFT 0 |
| |
| #define NV50_TIC_7 0x0000001c |
| #define NV50_TIC_7_BASE_LEVEL__MASK 0x0000000f |
| #define NV50_TIC_7_BASE_LEVEL__SHIFT 0 |
| #define NV50_TIC_7_MAX_LEVEL__MASK 0x000000f0 |
| #define NV50_TIC_7_MAX_LEVEL__SHIFT 4 |
| #define NV50_TIC_7_MS_MODE__MASK 0x0000f000 |
| #define NV50_TIC_7_MS_MODE__SHIFT 12 |
| #define NV50_TIC_7_MS_MODE_MS1 0x00000000 |
| #define NV50_TIC_7_MS_MODE_MS2 0x00001000 |
| #define NV50_TIC_7_MS_MODE_MS4 0x00002000 |
| #define NV50_TIC_7_MS_MODE_MS8 0x00003000 |
| #define NVA3_TIC_7_MS_MODE_MS8_ALT 0x00004000 |
| #define NVA3_TIC_7_MS_MODE_MS2_ALT 0x00005000 |
| #define NVC0_TIC_7_MS_MODE_UNK6 0x00006000 |
| #define NV50_TIC_7_MS_MODE_MS4_CS4 0x00008000 |
| #define NV50_TIC_7_MS_MODE_MS4_CS12 0x00009000 |
| #define NV50_TIC_7_MS_MODE_MS8_CS8 0x0000a000 |
| #define NVC0_TIC_7_MS_MODE_MS8_CS24 0x0000b000 |
| |
| #define NV50_TSC__SIZE 0x00000020 |
| #define NV50_TSC_0 0x00000000 |
| #define NV50_TSC_0_WRAPS__MASK 0x00000007 |
| #define NV50_TSC_0_WRAPS__SHIFT 0 |
| #define NV50_TSC_0_WRAPT__MASK 0x00000038 |
| #define NV50_TSC_0_WRAPT__SHIFT 3 |
| #define NV50_TSC_0_WRAPR__MASK 0x000001c0 |
| #define NV50_TSC_0_WRAPR__SHIFT 6 |
| #define NV50_TSC_0_SHADOW_COMPARE_ENABLE 0x00000200 |
| #define NV50_TSC_0_SHADOW_COMPARE_FUNC__MASK 0x00001c00 |
| #define NV50_TSC_0_SHADOW_COMPARE_FUNC__SHIFT 10 |
| #define NV50_TSC_0_SRGB_CONVERSION_ALLOWED 0x00002000 |
| #define NV50_TSC_0_BOX_S__MASK 0x0001c000 |
| #define NV50_TSC_0_BOX_S__SHIFT 14 |
| #define NV50_TSC_0_BOX_T__MASK 0x000e0000 |
| #define NV50_TSC_0_BOX_T__SHIFT 17 |
| #define NV50_TSC_0_ANISOTROPY_MASK__MASK 0x00700000 |
| #define NV50_TSC_0_ANISOTROPY_MASK__SHIFT 20 |
| |
| #define NV50_TSC_1 0x00000004 |
| #define NV50_TSC_1_UNKN_ANISO_15 0x10000000 |
| #define NV50_TSC_1_UNKN_ANISO_35 0x18000000 |
| #define NV50_TSC_1_MAGF__MASK 0x00000003 |
| #define NV50_TSC_1_MAGF__SHIFT 0 |
| #define NV50_TSC_1_MAGF_NEAREST 0x00000001 |
| #define NV50_TSC_1_MAGF_LINEAR 0x00000002 |
| #define NV50_TSC_1_MINF__MASK 0x00000030 |
| #define NV50_TSC_1_MINF__SHIFT 4 |
| #define NV50_TSC_1_MINF_NEAREST 0x00000010 |
| #define NV50_TSC_1_MINF_LINEAR 0x00000020 |
| #define NV50_TSC_1_MIPF__MASK 0x000000c0 |
| #define NV50_TSC_1_MIPF__SHIFT 6 |
| #define NV50_TSC_1_MIPF_NONE 0x00000040 |
| #define NV50_TSC_1_MIPF_NEAREST 0x00000080 |
| #define NV50_TSC_1_MIPF_LINEAR 0x000000c0 |
| #define NVE4_TSC_1_CUBE_SEAMLESS 0x00000200 |
| #define NV50_TSC_1_LOD_BIAS__MASK 0x01fff000 |
| #define NV50_TSC_1_LOD_BIAS__SHIFT 12 |
| #define NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS 0x02000000 |
| |
| #define NV50_TSC_2 0x00000008 |
| #define NV50_TSC_2_MIN_LOD__MASK 0x00000fff |
| #define NV50_TSC_2_MIN_LOD__SHIFT 0 |
| #define NV50_TSC_2_MAX_LOD__MASK 0x00fff000 |
| #define NV50_TSC_2_MAX_LOD__SHIFT 12 |
| |
| #define NV50_TSC_4 0x00000010 |
| #define NV50_TSC_4_BORDER_COLOR_RED__MASK 0xffffffff |
| #define NV50_TSC_4_BORDER_COLOR_RED__SHIFT 0 |
| |
| #define NV50_TSC_5 0x00000014 |
| #define NV50_TSC_5_BORDER_COLOR_GREEN__MASK 0xffffffff |
| #define NV50_TSC_5_BORDER_COLOR_GREEN__SHIFT 0 |
| |
| #define NV50_TSC_6 0x00000018 |
| #define NV50_TSC_6_BORDER_COLOR_BLUE__MASK 0xffffffff |
| #define NV50_TSC_6_BORDER_COLOR_BLUE__SHIFT 0 |
| |
| #define NV50_TSC_7 0x0000001c |
| #define NV50_TSC_7_BORDER_COLOR_ALPHA__MASK 0xffffffff |
| #define NV50_TSC_7_BORDER_COLOR_ALPHA__SHIFT 0 |
| |
| |
| #endif /* RNNDB_NV50_TEXTURE_XML */ |
