| <?xml version="1.0" encoding="UTF-8"?> |
| <!DOCTYPE pkgmetadata SYSTEM "http://www.gentoo.org/dtd/metadata.dtd"> |
| <pkgmetadata> |
| <maintainer type="project"> |
| <email>sci-electronics@gentoo.org</email> |
| <name>Gentoo Electronics Project</name> |
| </maintainer> |
| <longdescription> |
| This program is a simple implementation of a Verilog simulator. VBS tries to |
| implement all of the Verilog behavioral constructs that are synthesizable, but |
| still allow complex test vectors for simulation. |
| </longdescription> |
| </pkgmetadata> |
