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| <title>SAM4S DACC</title> |
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| <body id="abstract"> |
| <div id="container"> |
| <div id="content"> |
| <a id="DACC"></a> |
| <h1>SAM4S DACC</h1> |
| <a id="DACC__User_Interface"></a> |
| <h2>Digital-to-Analog Converter Controller (DACC) User Interface</h2> |
| <!--As per 6461E programmer datasheet.--> |
| <h3>Registers</h3> |
| <table class="registers"> |
| <caption>Register Mapping</caption> |
| <thead> |
| <tr> |
| <th class="address">Address</th> |
| <th class="description">Register</th> |
| <th class="name">Name</th> |
| <th class="access">Access</th> |
| <th class="reset">Reset</th> |
| </tr> |
| </thead> |
| <tbody> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C000">0x4003C000</td> |
| <td class="description">Control Register</td> |
| <td class="name"> |
| <a href="#DACC_CR" title="Control Register" class="one_click_away">DACC_CR</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">-</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C004">0x4003C004</td> |
| <td class="description">Mode Register</td> |
| <td class="name"> |
| <a href="#DACC_MR" title="Mode Register" class="one_click_away">DACC_MR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C010">0x4003C010</td> |
| <td class="description">Channel Enable Register</td> |
| <td class="name"> |
| <a href="#DACC_CHER" title="Channel Enable Register" class="one_click_away">DACC_CHER</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">-</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C014">0x4003C014</td> |
| <td class="description">Channel Disable Register</td> |
| <td class="name"> |
| <a href="#DACC_CHDR" title="Channel Disable Register" class="one_click_away">DACC_CHDR</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">-</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C018">0x4003C018</td> |
| <td class="description">Channel Status Register</td> |
| <td class="name"> |
| <a href="#DACC_CHSR" title="Channel Status Register" class="one_click_away">DACC_CHSR</a> |
| </td> |
| <td class="access">read-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C020">0x4003C020</td> |
| <td class="description">Conversion Data Register</td> |
| <td class="name"> |
| <a href="#DACC_CDR" title="Conversion Data Register" class="one_click_away">DACC_CDR</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C024">0x4003C024</td> |
| <td class="description">Interrupt Enable Register</td> |
| <td class="name"> |
| <a href="#DACC_IER" title="Interrupt Enable Register" class="one_click_away">DACC_IER</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">-</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C028">0x4003C028</td> |
| <td class="description">Interrupt Disable Register</td> |
| <td class="name"> |
| <a href="#DACC_IDR" title="Interrupt Disable Register" class="one_click_away">DACC_IDR</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">-</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C02C">0x4003C02C</td> |
| <td class="description">Interrupt Mask Register</td> |
| <td class="name"> |
| <a href="#DACC_IMR" title="Interrupt Mask Register" class="one_click_away">DACC_IMR</a> |
| </td> |
| <td class="access">read-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C030">0x4003C030</td> |
| <td class="description">Interrupt Status Register</td> |
| <td class="name"> |
| <a href="#DACC_ISR" title="Interrupt Status Register" class="one_click_away">DACC_ISR</a> |
| </td> |
| <td class="access">read-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C094">0x4003C094</td> |
| <td class="description">Analog Current Register</td> |
| <td class="name"> |
| <a href="#DACC_ACR" title="Analog Current Register" class="one_click_away">DACC_ACR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C0E4">0x4003C0E4</td> |
| <td class="description">Write Protect Mode register</td> |
| <td class="name"> |
| <a href="#DACC_WPMR" title="Write Protect Mode register" class="one_click_away">DACC_WPMR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C0E8">0x4003C0E8</td> |
| <td class="description">Write Protect Status register</td> |
| <td class="name"> |
| <a href="#DACC_WPSR" title="Write Protect Status register" class="one_click_away">DACC_WPSR</a> |
| </td> |
| <td class="access">read-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C108">0x4003C108</td> |
| <td class="description">Transmit Pointer Register</td> |
| <td class="name"> |
| <a href="#DACC_TPR" title="Transmit Pointer Register" class="one_click_away">DACC_TPR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C10C">0x4003C10C</td> |
| <td class="description">Transmit Counter Register</td> |
| <td class="name"> |
| <a href="#DACC_TCR" title="Transmit Counter Register" class="one_click_away">DACC_TCR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C118">0x4003C118</td> |
| <td class="description">Transmit Next Pointer Register</td> |
| <td class="name"> |
| <a href="#DACC_TNPR" title="Transmit Next Pointer Register" class="one_click_away">DACC_TNPR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C11C">0x4003C11C</td> |
| <td class="description">Transmit Next Counter Register</td> |
| <td class="name"> |
| <a href="#DACC_TNCR" title="Transmit Next Counter Register" class="one_click_away">DACC_TNCR</a> |
| </td> |
| <td class="access">read-write</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="even"> |
| <td class="address" id="address_0x4003C120">0x4003C120</td> |
| <td class="description">Transfer Control Register</td> |
| <td class="name"> |
| <a href="#DACC_PTCR" title="Transfer Control Register" class="one_click_away">DACC_PTCR</a> |
| </td> |
| <td class="access">write-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| <tr class="odd"> |
| <td class="address" id="address_0x4003C124">0x4003C124</td> |
| <td class="description">Transfer Status Register</td> |
| <td class="name"> |
| <a href="#DACC_PTSR" title="Transfer Status Register" class="one_click_away">DACC_PTSR</a> |
| </td> |
| <td class="access">read-only</td> |
| <td class="address">0x00000000</td> |
| </tr> |
| </tbody> |
| </table> |
| <h3>Register Fields</h3> |
| <h4 id="DACC_CR">DACC Control Register</h4> |
| <p><strong>Name</strong>: DACC_CR</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C000</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_CR__SWRST" title="Software Reset">SWRST</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_CR__SWRST"><strong>SWRST</strong>: Software Reset<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Resets the DACC simulating a hardware reset.</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_MR">DACC Mode Register</h4> |
| <p><strong>Name</strong>: DACC_MR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C004</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="6"> |
| <a href="#DACC_MR__STARTUP" title="Startup Time Selection">STARTUP</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_MR__MAXS" title="Max Speed Mode">MAXS</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_MR__TAG" title="Tag Selection Mode">TAG</a> |
| </td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="2"> |
| <a href="#DACC_MR__USER_SEL" title="User Channel Selection">USER_SEL</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_MR__REFRESH" title="Refresh Period">REFRESH</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_MR__FASTWKUP" title="Fast Wake up Mode">FASTWKUP</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_MR__SLEEP" title="Sleep Mode">SLEEP</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_MR__WORD" title="Word Transfer">WORD</a> |
| </td> |
| <td colspan="3"> |
| <a href="#DACC_MR__TRGSEL" title="Trigger Selection">TRGSEL</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_MR__TRGEN" title="Trigger Enable">TRGEN</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_MR__TRGEN"><strong>TRGEN</strong>: Trigger Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">DIS</td><td class="description">External trigger mode disabled. DACC in free running mode.</td></tr><tr class="even"><td class="value">1</td><td class="name">EN</td><td class="description">External trigger mode enabled.</td></tr></tbody></table></li> |
| <li id="DACC_MR__TRGSEL"><strong>TRGSEL</strong>: Trigger Selection<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0x0</td><td class="name">-</td><td class="description">External trigger</td></tr><tr class="even"><td class="value">0x1</td><td class="name">-</td><td class="description">TIO Output of the Timer Counter Channel 0</td></tr><tr class="odd"><td class="value">0x2</td><td class="name">-</td><td class="description">TIO Output of the Timer Counter Channel 1</td></tr><tr class="even"><td class="value">0x3</td><td class="name">-</td><td class="description">TIO Output of the Timer Counter Channel 2</td></tr><tr class="odd"><td class="value">0x4</td><td class="name">-</td><td class="description">PWM Event Line 0</td></tr><tr class="even"><td class="value">0x5</td><td class="name">-</td><td class="description">PWM Event Line 1</td></tr></tbody></table></li> |
| <li id="DACC_MR__WORD"><strong>WORD</strong>: Word Transfer<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">HALF</td><td class="description">Half-Word transfer</td></tr><tr class="even"><td class="value">1</td><td class="name">WORD</td><td class="description">Word Transfer</td></tr></tbody></table></li> |
| <li id="DACC_MR__SLEEP"><strong>SLEEP</strong>: Sleep Mode</li> |
| <p>-</p> |
| <li id="DACC_MR__FASTWKUP"><strong>FASTWKUP</strong>: Fast Wake up Mode<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0x0</td><td class="name">-</td><td class="description">Normal Sleep Mode</td></tr><tr class="even"><td class="value">0x1</td><td class="name">-</td><td class="description">Fast Wake up Sleep Mode</td></tr></tbody></table></li> |
| <li id="DACC_MR__REFRESH"><strong>REFRESH</strong>: Refresh Period</li> |
| <p>-</p> |
| <li id="DACC_MR__USER_SEL"><strong>USER_SEL</strong>: User Channel Selection<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">CHANNEL0</td><td class="description">Channel 0</td></tr><tr class="even"><td class="value">1</td><td class="name">CHANNEL1</td><td class="description">Channel 1</td></tr></tbody></table></li> |
| <li id="DACC_MR__TAG"><strong>TAG</strong>: Tag Selection Mode<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">DIS</td><td class="description">Tag selection mode disabled. Using USER_SEL to select the channel for the conversion.</td></tr><tr class="even"><td class="value">1</td><td class="name">EN</td><td class="description">Tag selection mode enabled</td></tr></tbody></table></li> |
| <li id="DACC_MR__MAXS"><strong>MAXS</strong>: Max Speed Mode<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Normal Mode</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Max Speed Mode enabled</td></tr></tbody></table></li> |
| <li id="DACC_MR__STARTUP"><strong>STARTUP</strong>: Startup Time Selection<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0x0</td><td class="name">0</td><td class="description">0 periods of DACClock</td></tr><tr class="even"><td class="value">0x1</td><td class="name">8</td><td class="description">8 periods of DACClock</td></tr><tr class="odd"><td class="value">0x2</td><td class="name">16</td><td class="description">16 periods of DACClock</td></tr><tr class="even"><td class="value">0x3</td><td class="name">24</td><td class="description">24 periods of DACClock</td></tr><tr class="odd"><td class="value">0x4</td><td class="name">64</td><td class="description">64 periods of DACClock</td></tr><tr class="even"><td class="value">0x5</td><td class="name">80</td><td class="description">80 periods of DACClock</td></tr><tr class="odd"><td class="value">0x6</td><td class="name">96</td><td class="description">96 periods of DACClock</td></tr><tr class="even"><td class="value">0x7</td><td class="name">112</td><td class="description">112 periods of DACClock</td></tr><tr class="odd"><td class="value">0x8</td><td class="name">512</td><td class="description">512 periods of DACClock</td></tr><tr class="even"><td class="value">0x9</td><td class="name">576</td><td class="description">576 periods of DACClock</td></tr><tr class="odd"><td class="value">0xA</td><td class="name">640</td><td class="description">640 periods of DACClock</td></tr><tr class="even"><td class="value">0xB</td><td class="name">704</td><td class="description">704 periods of DACClock</td></tr><tr class="odd"><td class="value">0xC</td><td class="name">768</td><td class="description">768 periods of DACClock</td></tr><tr class="even"><td class="value">0xD</td><td class="name">832</td><td class="description">832 periods of DACClock</td></tr><tr class="odd"><td class="value">0xE</td><td class="name">896</td><td class="description">896 periods of DACClock</td></tr><tr class="even"><td class="value">0xF</td><td class="name">960</td><td class="description">960 periods of DACClock</td></tr><tr class="odd"><td class="value">0x10</td><td class="name">1024</td><td class="description">1024 periods of DACClock</td></tr><tr class="even"><td class="value">0x11</td><td class="name">1088</td><td class="description">1088 periods of DACClock</td></tr><tr class="odd"><td class="value">0x12</td><td class="name">1152</td><td class="description">1152 periods of DACClock</td></tr><tr class="even"><td class="value">0x13</td><td class="name">1216</td><td class="description">1216 periods of DACClock</td></tr><tr class="odd"><td class="value">0x14</td><td class="name">1280</td><td class="description">1280 periods of DACClock</td></tr><tr class="even"><td class="value">0x15</td><td class="name">1344</td><td class="description">1344 periods of DACClock</td></tr><tr class="odd"><td class="value">0x16</td><td class="name">1408</td><td class="description">1408 periods of DACClock</td></tr><tr class="even"><td class="value">0x17</td><td class="name">1472</td><td class="description">1472 periods of DACClock</td></tr><tr class="odd"><td class="value">0x18</td><td class="name">1536</td><td class="description">1536 periods of DACClock</td></tr><tr class="even"><td class="value">0x19</td><td class="name">1600</td><td class="description">1600 periods of DACClock</td></tr><tr class="odd"><td class="value">0x1A</td><td class="name">1664</td><td class="description">1664 periods of DACClock</td></tr><tr class="even"><td class="value">0x1B</td><td class="name">1728</td><td class="description">1728 periods of DACClock</td></tr><tr class="odd"><td class="value">0x1C</td><td class="name">1792</td><td class="description">1792 periods of DACClock</td></tr><tr class="even"><td class="value">0x1D</td><td class="name">1856</td><td class="description">1856 periods of DACClock</td></tr><tr class="odd"><td class="value">0x1E</td><td class="name">1920</td><td class="description">1920 periods of DACClock</td></tr><tr class="even"><td class="value">0x1F</td><td class="name">1984</td><td class="description">1984 periods of DACClock</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_CHER">DACC Channel Enable Register</h4> |
| <p><strong>Name</strong>: DACC_CHER</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C010</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_CHER__CH1" title="Channel 1 Enable">CH1</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_CHER__CH0" title="Channel 0 Enable">CH0</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_CHER__CH0"><strong>CH0</strong>: Channel 0 Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding channel.</td></tr></tbody></table></li> |
| <li id="DACC_CHER__CH1"><strong>CH1</strong>: Channel 1 Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding channel.</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_CHDR">DACC Channel Disable Register</h4> |
| <p><strong>Name</strong>: DACC_CHDR</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C014</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_CHDR__CH1" title="Channel 1 Disable">CH1</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_CHDR__CH0" title="Channel 0 Disable">CH0</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_CHDR__CH0"><strong>CH0</strong>: Channel 0 Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding channel.</td></tr></tbody></table></li> |
| <li id="DACC_CHDR__CH1"><strong>CH1</strong>: Channel 1 Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding channel.</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_CHSR">DACC Channel Status Register</h4> |
| <p><strong>Name</strong>: DACC_CHSR</p> |
| <p><strong>Access</strong>: read-only</p> |
| <p><strong>Address</strong>: 0x4003C018</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_CHSR__CH1" title="Channel 1 Status">CH1</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_CHSR__CH0" title="Channel 0 Status">CH0</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_CHSR__CH0"><strong>CH0</strong>: Channel 0 Status<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Corresponding channel is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Corresponding channel is enabled.</td></tr></tbody></table></li> |
| <li id="DACC_CHSR__CH1"><strong>CH1</strong>: Channel 1 Status<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Corresponding channel is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Corresponding channel is enabled.</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_CDR">DACC Conversion Data Register</h4> |
| <p><strong>Name</strong>: DACC_CDR</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C020</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_CDR__DATA" title="Data to Convert">DATA</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_CDR__DATA" title="Data to Convert">DATA</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_CDR__DATA" title="Data to Convert">DATA</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_CDR__DATA" title="Data to Convert">DATA</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_CDR__DATA"><strong>DATA</strong>: Data to Convert</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_IER">DACC Interrupt Enable Register</h4> |
| <p><strong>Name</strong>: DACC_IER</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C024</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_IER__TXBUFE" title="Transmit Buffer Empty Interrupt Enable">TXBUFE</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IER__ENDTX" title="End of Transmit Buffer Interrupt Enable">ENDTX</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IER__EOC" title="End of Conversion Interrupt Enable">EOC</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IER__TXRDY" title="Transmit Ready Interrupt Enable">TXRDY</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_IER__TXRDY"><strong>TXRDY</strong>: Transmit Ready Interrupt Enable</li> |
| <p>-</p> |
| <li id="DACC_IER__EOC"><strong>EOC</strong>: End of Conversion Interrupt Enable</li> |
| <p>-</p> |
| <li id="DACC_IER__ENDTX"><strong>ENDTX</strong>: End of Transmit Buffer Interrupt Enable</li> |
| <p>-</p> |
| <li id="DACC_IER__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty Interrupt Enable</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_IDR">DACC Interrupt Disable Register</h4> |
| <p><strong>Name</strong>: DACC_IDR</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C028</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_IDR__TXBUFE" title="Transmit Buffer Empty Interrupt Disable">TXBUFE</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IDR__ENDTX" title="End of Transmit Buffer Interrupt Disable">ENDTX</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IDR__EOC" title="End of Conversion Interrupt Disable">EOC</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IDR__TXRDY" title="Transmit Ready Interrupt Disable.">TXRDY</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_IDR__TXRDY"><strong>TXRDY</strong>: Transmit Ready Interrupt Disable.</li> |
| <p>-</p> |
| <li id="DACC_IDR__EOC"><strong>EOC</strong>: End of Conversion Interrupt Disable</li> |
| <p>-</p> |
| <li id="DACC_IDR__ENDTX"><strong>ENDTX</strong>: End of Transmit Buffer Interrupt Disable</li> |
| <p>-</p> |
| <li id="DACC_IDR__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty Interrupt Disable</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_IMR">DACC Interrupt Mask Register</h4> |
| <p><strong>Name</strong>: DACC_IMR</p> |
| <p><strong>Access</strong>: read-only</p> |
| <p><strong>Address</strong>: 0x4003C02C</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_IMR__TXBUFE" title="Transmit Buffer Empty Interrupt Mask">TXBUFE</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IMR__ENDTX" title="End of Transmit Buffer Interrupt Mask">ENDTX</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IMR__EOC" title="End of Conversion Interrupt Mask">EOC</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_IMR__TXRDY" title="Transmit Ready Interrupt Mask">TXRDY</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_IMR__TXRDY"><strong>TXRDY</strong>: Transmit Ready Interrupt Mask</li> |
| <p>-</p> |
| <li id="DACC_IMR__EOC"><strong>EOC</strong>: End of Conversion Interrupt Mask</li> |
| <p>-</p> |
| <li id="DACC_IMR__ENDTX"><strong>ENDTX</strong>: End of Transmit Buffer Interrupt Mask</li> |
| <p>-</p> |
| <li id="DACC_IMR__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty Interrupt Mask</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_ISR">DACC Interrupt Status Register</h4> |
| <p><strong>Name</strong>: DACC_ISR</p> |
| <p><strong>Access</strong>: read-only</p> |
| <p><strong>Address</strong>: 0x4003C030</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_ISR__TXBUFE" title="Transmit Buffer Empty">TXBUFE</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_ISR__ENDTX" title="End of DMA Interrupt Flag">ENDTX</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_ISR__EOC" title="End of Conversion Interrupt Flag">EOC</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_ISR__TXRDY" title="Transmit Ready Interrupt Flag">TXRDY</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_ISR__TXRDY"><strong>TXRDY</strong>: Transmit Ready Interrupt Flag<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">DACC is not ready to accept new conversion requests.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">DACC is ready to accept new conversion requests.</td></tr></tbody></table></li> |
| <li id="DACC_ISR__EOC"><strong>EOC</strong>: End of Conversion Interrupt Flag<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">no conversion has been performed since the last DACC_ISR read.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">at least one conversion has been performed since the last DACC_ISR read.</td></tr></tbody></table></li> |
| <li id="DACC_ISR__ENDTX"><strong>ENDTX</strong>: End of DMA Interrupt Flag<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">the Transmit Counter Register has not reached 0 since the last write in DACC_TCR or DACC_TNCR.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">the Transmit Counter Register has reached 0 since the last write in DACC _TCR or DACC_TNCR</td></tr></tbody></table></li> |
| <li id="DACC_ISR__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">the Transmit Counter Register has not reached 0 since the last write in DACC_TCR or DACC_TNCR.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">the Transmit Counter Register has reached 0 since the last write in DACC _TCR or DACC_TNCR.</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_ACR">DACC Analog Current Register</h4> |
| <p><strong>Name</strong>: DACC_ACR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C094</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="2"> |
| <a href="#DACC_ACR__IBCTLDACCORE" title="Bias Current Control for DAC Core">IBCTLDACCORE</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="2"> |
| <a href="#DACC_ACR__IBCTLCH1" title="Analog Output Current Control">IBCTLCH1</a> |
| </td> |
| <td colspan="2"> |
| <a href="#DACC_ACR__IBCTLCH0" title="Analog Output Current Control">IBCTLCH0</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_ACR__IBCTLCH0"><strong>IBCTLCH0</strong>: Analog Output Current Control</li> |
| <p>-</p> |
| <li id="DACC_ACR__IBCTLCH1"><strong>IBCTLCH1</strong>: Analog Output Current Control</li> |
| <p>-</p> |
| <li id="DACC_ACR__IBCTLDACCORE"><strong>IBCTLDACCORE</strong>: Bias Current Control for DAC Core</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_WPMR">DACC Write Protect Mode register</h4> |
| <p><strong>Name</strong>: DACC_WPMR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C0E4</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_WPMR__WPKEY" title="Write Protect KEY">WPKEY</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_WPMR__WPKEY" title="Write Protect KEY">WPKEY</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_WPMR__WPKEY" title="Write Protect KEY">WPKEY</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_WPMR__WPEN" title="Write Protect Enable">WPEN</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_WPMR__WPEN"><strong>WPEN</strong>: Write Protect Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Disables the Write Protect if WPKEY corresponds to 0x444143 ("DAC" in ASCII).</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the Write Protect if WPKEY corresponds to 0x444143 ("DAC" in ASCII).</td></tr></tbody></table></li> |
| <li id="DACC_WPMR__WPKEY"><strong>WPKEY</strong>: Write Protect KEY</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_WPSR">DACC Write Protect Status register</h4> |
| <p><strong>Name</strong>: DACC_WPSR</p> |
| <p><strong>Access</strong>: read-only</p> |
| <p><strong>Address</strong>: 0x4003C0E8</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_WPSR__WPROTADDR" title="Write protection error address">WPROTADDR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_WPSR__WPROTERR" title="Write protection error">WPROTERR</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_WPSR__WPROTERR"><strong>WPROTERR</strong>: Write protection error</li> |
| <p>-</p> |
| <li id="DACC_WPSR__WPROTADDR"><strong>WPROTADDR</strong>: Write protection error address</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_TPR">DACC Transmit Pointer Register</h4> |
| <p><strong>Name</strong>: DACC_TPR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C108</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_TPR__TXPTR"><strong>TXPTR</strong>: Transmit Counter Register</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_TCR">DACC Transmit Counter Register</h4> |
| <p><strong>Name</strong>: DACC_TCR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C10C</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TCR__TXCTR" title="Transmit Counter Register">TXCTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TCR__TXCTR" title="Transmit Counter Register">TXCTR</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_TCR__TXCTR"><strong>TXCTR</strong>: Transmit Counter Register</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_TNPR">DACC Transmit Next Pointer Register</h4> |
| <p><strong>Name</strong>: DACC_TNPR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C118</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_TNPR__TXNPTR"><strong>TXNPTR</strong>: Transmit Next Pointer</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_TNCR">DACC Transmit Next Counter Register</h4> |
| <p><strong>Name</strong>: DACC_TNCR</p> |
| <p><strong>Access</strong>: read-write</p> |
| <p><strong>Address</strong>: 0x4003C11C</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TNCR__TXNCTR" title="Transmit Counter Next">TXNCTR</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td colspan="8"> |
| <a href="#DACC_TNCR__TXNCTR" title="Transmit Counter Next">TXNCTR</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_TNCR__TXNCTR"><strong>TXNCTR</strong>: Transmit Counter Next</li> |
| <p>-</p> |
| </ul> |
| <h4 id="DACC_PTCR">DACC Transfer Control Register</h4> |
| <p><strong>Name</strong>: DACC_PTCR</p> |
| <p><strong>Access</strong>: write-only</p> |
| <p><strong>Address</strong>: 0x4003C120</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_PTCR__TXTDIS" title="Transmitter Transfer Disable">TXTDIS</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_PTCR__TXTEN" title="Transmitter Transfer Enable">TXTEN</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_PTCR__RXTDIS" title="Receiver Transfer Disable">RXTDIS</a> |
| </td> |
| <td colspan="1"> |
| <a href="#DACC_PTCR__RXTEN" title="Receiver Transfer Enable">RXTEN</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_PTCR__RXTEN"><strong>RXTEN</strong>: Receiver Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables PDC receiver channel requests if RXTDIS is not set.</td></tr></tbody></table></li> |
| <li id="DACC_PTCR__RXTDIS"><strong>RXTDIS</strong>: Receiver Transfer Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the PDC receiver channel requests.</td></tr></tbody></table></li> |
| <li id="DACC_PTCR__TXTEN"><strong>TXTEN</strong>: Transmitter Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the PDC transmitter channel requests.</td></tr></tbody></table></li> |
| <li id="DACC_PTCR__TXTDIS"><strong>TXTDIS</strong>: Transmitter Transfer Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the PDC transmitter channel requests.</td></tr></tbody></table></li> |
| </ul> |
| <h4 id="DACC_PTSR">DACC Transfer Status Register</h4> |
| <p><strong>Name</strong>: DACC_PTSR</p> |
| <p><strong>Access</strong>: read-only</p> |
| <p><strong>Address</strong>: 0x4003C124</p> |
| <table class="fields"> |
| <tbody> |
| <tr class="offsets"> |
| <td>31</td> |
| <td>30</td> |
| <td>29</td> |
| <td>28</td> |
| <td>27</td> |
| <td>26</td> |
| <td>25</td> |
| <td>24</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>23</td> |
| <td>22</td> |
| <td>21</td> |
| <td>20</td> |
| <td>19</td> |
| <td>18</td> |
| <td>17</td> |
| <td>16</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| </tr> |
| <tr class="offsets"> |
| <td>15</td> |
| <td>14</td> |
| <td>13</td> |
| <td>12</td> |
| <td>11</td> |
| <td>10</td> |
| <td>9</td> |
| <td>8</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_PTSR__TXTEN" title="Transmitter Transfer Enable">TXTEN</a> |
| </td> |
| </tr> |
| <tr class="offsets"> |
| <td>7</td> |
| <td>6</td> |
| <td>5</td> |
| <td>4</td> |
| <td>3</td> |
| <td>2</td> |
| <td>1</td> |
| <td>0</td> |
| </tr> |
| <tr class="fields"> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td>-</td> |
| <td colspan="1"> |
| <a href="#DACC_PTSR__RXTEN" title="Receiver Transfer Enable">RXTEN</a> |
| </td> |
| </tr> |
| </tbody> |
| </table> |
| <ul class="values"> |
| <li id="DACC_PTSR__RXTEN"><strong>RXTEN</strong>: Receiver Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">PDC Receiver channel requests are disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">PDC Receiver channel requests are enabled.</td></tr></tbody></table></li> |
| <li id="DACC_PTSR__TXTEN"><strong>TXTEN</strong>: Transmitter Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">PDC Transmitter channel requests are disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">PDC Transmitter channel requests are enabled.</td></tr></tbody></table></li> |
| </ul> |
| </div> |
| </div> |
| </body> |
| </html> |
