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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
<title>SAM3U TWI1</title>
<link rel="stylesheet" type="text/css" href="css/html.css" media="all" />
</head>
<body id="abstract">
<div id="container">
<div id="content">
<a id="TWI1"></a>
<h1>SAM3U TWI1</h1>
<a id="TWI1__User_Interface"></a>
<h2>Two-wire Interface (TWI1) User Interface</h2>
<!--As per 6212L programmer datasheet.-->
<h3>Registers</h3>
<table class="registers">
<caption>Register Mapping</caption>
<thead>
<tr>
<th class="address">Address</th>
<th class="description">Register</th>
<th class="name">Name</th>
<th class="access">Access</th>
<th class="reset">Reset</th>
</tr>
</thead>
<tbody>
<tr class="odd">
<td class="address" id="address_0x40088000">0x40088000</td>
<td class="description">Control Register</td>
<td class="name">
<a href="#TWI1_CR" title="Control Register" class="one_click_away">TWI1_CR</a>
</td>
<td class="access">write-only</td>
<td class="address">-</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088004">0x40088004</td>
<td class="description">Master Mode Register</td>
<td class="name">
<a href="#TWI1_MMR" title="Master Mode Register" class="one_click_away">TWI1_MMR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088008">0x40088008</td>
<td class="description">Slave Mode Register</td>
<td class="name">
<a href="#TWI1_SMR" title="Slave Mode Register" class="one_click_away">TWI1_SMR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x4008800C">0x4008800C</td>
<td class="description">Internal Address Register</td>
<td class="name">
<a href="#TWI1_IADR" title="Internal Address Register" class="one_click_away">TWI1_IADR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088010">0x40088010</td>
<td class="description">Clock Waveform Generator Register</td>
<td class="name">
<a href="#TWI1_CWGR" title="Clock Waveform Generator Register" class="one_click_away">TWI1_CWGR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088020">0x40088020</td>
<td class="description">Status Register</td>
<td class="name">
<a href="#TWI1_SR" title="Status Register" class="one_click_away">TWI1_SR</a>
</td>
<td class="access">read-only</td>
<td class="address">0x0000F009</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088024">0x40088024</td>
<td class="description">Interrupt Enable Register</td>
<td class="name">
<a href="#TWI1_IER" title="Interrupt Enable Register" class="one_click_away">TWI1_IER</a>
</td>
<td class="access">write-only</td>
<td class="address">-</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088028">0x40088028</td>
<td class="description">Interrupt Disable Register</td>
<td class="name">
<a href="#TWI1_IDR" title="Interrupt Disable Register" class="one_click_away">TWI1_IDR</a>
</td>
<td class="access">write-only</td>
<td class="address">-</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x4008802C">0x4008802C</td>
<td class="description">Interrupt Mask Register</td>
<td class="name">
<a href="#TWI1_IMR" title="Interrupt Mask Register" class="one_click_away">TWI1_IMR</a>
</td>
<td class="access">read-only</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088030">0x40088030</td>
<td class="description">Receive Holding Register</td>
<td class="name">
<a href="#TWI1_RHR" title="Receive Holding Register" class="one_click_away">TWI1_RHR</a>
</td>
<td class="access">read-only</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088034">0x40088034</td>
<td class="description">Transmit Holding Register</td>
<td class="name">
<a href="#TWI1_THR" title="Transmit Holding Register" class="one_click_away">TWI1_THR</a>
</td>
<td class="access">write-only</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088100">0x40088100</td>
<td class="description">Receive Pointer Register</td>
<td class="name">
<a href="#TWI1_RPR" title="Receive Pointer Register" class="one_click_away">TWI1_RPR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088104">0x40088104</td>
<td class="description">Receive Counter Register</td>
<td class="name">
<a href="#TWI1_RCR" title="Receive Counter Register" class="one_click_away">TWI1_RCR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088108">0x40088108</td>
<td class="description">Transmit Pointer Register</td>
<td class="name">
<a href="#TWI1_TPR" title="Transmit Pointer Register" class="one_click_away">TWI1_TPR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x4008810C">0x4008810C</td>
<td class="description">Transmit Counter Register</td>
<td class="name">
<a href="#TWI1_TCR" title="Transmit Counter Register" class="one_click_away">TWI1_TCR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088110">0x40088110</td>
<td class="description">Receive Next Pointer Register</td>
<td class="name">
<a href="#TWI1_RNPR" title="Receive Next Pointer Register" class="one_click_away">TWI1_RNPR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088114">0x40088114</td>
<td class="description">Receive Next Counter Register</td>
<td class="name">
<a href="#TWI1_RNCR" title="Receive Next Counter Register" class="one_click_away">TWI1_RNCR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088118">0x40088118</td>
<td class="description">Transmit Next Pointer Register</td>
<td class="name">
<a href="#TWI1_TNPR" title="Transmit Next Pointer Register" class="one_click_away">TWI1_TNPR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x4008811C">0x4008811C</td>
<td class="description">Transmit Next Counter Register</td>
<td class="name">
<a href="#TWI1_TNCR" title="Transmit Next Counter Register" class="one_click_away">TWI1_TNCR</a>
</td>
<td class="access">read-write</td>
<td class="address">0x00000000</td>
</tr>
<tr class="even">
<td class="address" id="address_0x40088120">0x40088120</td>
<td class="description">Transfer Control Register</td>
<td class="name">
<a href="#TWI1_PTCR" title="Transfer Control Register" class="one_click_away">TWI1_PTCR</a>
</td>
<td class="access">write-only</td>
<td class="address">0x00000000</td>
</tr>
<tr class="odd">
<td class="address" id="address_0x40088124">0x40088124</td>
<td class="description">Transfer Status Register</td>
<td class="name">
<a href="#TWI1_PTSR" title="Transfer Status Register" class="one_click_away">TWI1_PTSR</a>
</td>
<td class="access">read-only</td>
<td class="address">0x00000000</td>
</tr>
</tbody>
</table>
<h3>Register Fields</h3>
<h4 id="TWI1_CR">TWI1 Control Register</h4>
<p><strong>Name</strong>: TWI1_CR</p>
<p><strong>Access</strong>: write-only</p>
<p><strong>Address</strong>: 0x40088000</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="1">
<a href="#TWI1_CR__SWRST" title="Software Reset">SWRST</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__QUICK" title="SMBUS Quick Command">QUICK</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__SVDIS" title="TWI Slave Mode Disabled">SVDIS</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__SVEN" title="TWI Slave Mode Enabled">SVEN</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__MSDIS" title="TWI Master Mode Disabled">MSDIS</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__MSEN" title="TWI Master Mode Enabled">MSEN</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__STOP" title="Send a STOP Condition">STOP</a>
</td>
<td colspan="1">
<a href="#TWI1_CR__START" title="Send a START Condition">START</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_CR__START"><strong>START</strong>: Send a START Condition<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">A frame beginning with a START bit is transmitted according to the features defined in the mode register.</td></tr></tbody></table></li>
<li id="TWI1_CR__STOP"><strong>STOP</strong>: Send a STOP Condition<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">STOP Condition is sent just after completing the current byte transmission in master read mode.</td></tr></tbody></table></li>
<li id="TWI1_CR__MSEN"><strong>MSEN</strong>: TWI Master Mode Enabled<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">If MSDIS = 0, the master mode is enabled.</td></tr></tbody></table></li>
<li id="TWI1_CR__MSDIS"><strong>MSDIS</strong>: TWI Master Mode Disabled<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The master mode is disabled, all pending data is transmitted. The shifter and holding characters (if it contains data) are transmitted in case of write operation. In read operation, the character being transferred must be completely received before disabling.</td></tr></tbody></table></li>
<li id="TWI1_CR__SVEN"><strong>SVEN</strong>: TWI Slave Mode Enabled<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">If SVDIS = 0, the slave mode is enabled.</td></tr></tbody></table></li>
<li id="TWI1_CR__SVDIS"><strong>SVDIS</strong>: TWI Slave Mode Disabled<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The slave mode is disabled. The shifter and holding characters (if it contains data) are transmitted in case of read oper-ation. In write operation, the character being transferred must be completely received before disabling.</td></tr></tbody></table></li>
<li id="TWI1_CR__QUICK"><strong>QUICK</strong>: SMBUS Quick Command<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">If Master mode is enabled, a SMBUS Quick Command is sent.</td></tr></tbody></table></li>
<li id="TWI1_CR__SWRST"><strong>SWRST</strong>: Software Reset<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Equivalent to a system reset.</td></tr></tbody></table></li>
</ul>
<h4 id="TWI1_MMR">TWI1 Master Mode Register</h4>
<p><strong>Name</strong>: TWI1_MMR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088004</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td colspan="7">
<a href="#TWI1_MMR__DADR" title="Device Address">DADR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_MMR__MREAD" title="Master Read Direction">MREAD</a>
</td>
<td>-</td>
<td>-</td>
<td colspan="2">
<a href="#TWI1_MMR__IADRSZ" title="Internal Device Address Size">IADRSZ</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_MMR__IADRSZ"><strong>IADRSZ</strong>: Internal Device Address Size<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0x0</td><td class="name">NONE</td><td class="description">No internal device address</td></tr><tr class="even"><td class="value">0x1</td><td class="name">1_BYTE</td><td class="description">One-byte internal device address</td></tr><tr class="odd"><td class="value">0x2</td><td class="name">2_BYTE</td><td class="description">Two-byte internal device address</td></tr><tr class="even"><td class="value">0x3</td><td class="name">3_BYTE</td><td class="description">Three-byte internal device address</td></tr></tbody></table></li>
<li id="TWI1_MMR__MREAD"><strong>MREAD</strong>: Master Read Direction<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Master write direction.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Master read direction.</td></tr></tbody></table></li>
<li id="TWI1_MMR__DADR"><strong>DADR</strong>: Device Address</li>
<p>-</p>
</ul>
<h4 id="TWI1_SMR">TWI1 Slave Mode Register</h4>
<p><strong>Name</strong>: TWI1_SMR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088008</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td colspan="7">
<a href="#TWI1_SMR__SADR" title="Slave Address">SADR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_SMR__SADR"><strong>SADR</strong>: Slave Address</li>
<p>-</p>
</ul>
<h4 id="TWI1_IADR">TWI1 Internal Address Register</h4>
<p><strong>Name</strong>: TWI1_IADR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x4008800C</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_IADR__IADR" title="Internal Address">IADR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_IADR__IADR" title="Internal Address">IADR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_IADR__IADR" title="Internal Address">IADR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_IADR__IADR"><strong>IADR</strong>: Internal Address</li>
<p>-</p>
</ul>
<h4 id="TWI1_CWGR">TWI1 Clock Waveform Generator Register</h4>
<p><strong>Name</strong>: TWI1_CWGR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088010</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td colspan="3">
<a href="#TWI1_CWGR__CKDIV" title="Clock Divider">CKDIV</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_CWGR__CHDIV" title="Clock High Divider">CHDIV</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_CWGR__CLDIV" title="Clock Low Divider">CLDIV</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_CWGR__CLDIV"><strong>CLDIV</strong>: Clock Low Divider</li>
<p>-</p>
<li id="TWI1_CWGR__CHDIV"><strong>CHDIV</strong>: Clock High Divider</li>
<p>-</p>
<li id="TWI1_CWGR__CKDIV"><strong>CKDIV</strong>: Clock Divider</li>
<p>-</p>
</ul>
<h4 id="TWI1_SR">TWI1 Status Register</h4>
<p><strong>Name</strong>: TWI1_SR</p>
<p><strong>Access</strong>: read-only</p>
<p><strong>Address</strong>: 0x40088020</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="1">
<a href="#TWI1_SR__TXBUFE" title="TX Buffer Empty">TXBUFE</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__RXBUFF" title="RX Buffer Full">RXBUFF</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__ENDTX" title="End of TX buffer">ENDTX</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__ENDRX" title="End of RX buffer">ENDRX</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__EOSACC" title="End Of Slave Access (clear on read)">EOSACC</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__SCLWS" title="Clock Wait State (automatically set / reset)">SCLWS</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__ARBLST" title="Arbitration Lost (clear on read)">ARBLST</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__NACK" title="Not Acknowledged (clear on read)">NACK</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td colspan="1">
<a href="#TWI1_SR__OVRE" title="Overrun Error (clear on read)">OVRE</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__GACC" title="General Call Access (clear on read)">GACC</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__SVACC" title="Slave Access (automatically set / reset)">SVACC</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__SVREAD" title="Slave Read (automatically set / reset)">SVREAD</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__TXRDY" title="Transmit Holding Register Ready (automatically set / reset)">TXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__RXRDY" title="Receive Holding Register Ready (automatically set / reset)">RXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_SR__TXCOMP" title="Transmission Completed (automatically set / reset)">TXCOMP</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_SR__TXCOMP"><strong>TXCOMP</strong>: Transmission Completed (automatically set / reset)</li>
<p>-</p>
<li id="TWI1_SR__RXRDY"><strong>RXRDY</strong>: Receive Holding Register Ready (automatically set / reset)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No character has been received since the last TWI_RHR read operation.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">A byte has been received in the TWI_RHR since the last read.</td></tr></tbody></table></li>
<li id="TWI1_SR__TXRDY"><strong>TXRDY</strong>: Transmit Holding Register Ready (automatically set / reset)</li>
<p>-</p>
<li id="TWI1_SR__SVREAD"><strong>SVREAD</strong>: Slave Read (automatically set / reset)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Indicates that a write access is performed by a Master.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Indicates that a read access is performed by a Master.</td></tr></tbody></table></li>
<li id="TWI1_SR__SVACC"><strong>SVACC</strong>: Slave Access (automatically set / reset)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">TWI is not addressed. SVACC is automatically cleared after a NACK or a STOP condition is detected.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Indicates that the address decoding sequence has matched (A Master has sent SADR). SVACC remains high until a NACK or a STOP condition is detected.</td></tr></tbody></table></li>
<li id="TWI1_SR__GACC"><strong>GACC</strong>: General Call Access (clear on read)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No General Call has been detected.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">A General Call has been detected. After the detection of General Call, if need be, the programmer may acknowledge this access and decode the following bytes and respond according to the value of the bytes.</td></tr></tbody></table></li>
<li id="TWI1_SR__OVRE"><strong>OVRE</strong>: Overrun Error (clear on read)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">TWI_RHR has not been loaded while RXRDY was set</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">TWI_RHR has been loaded while RXRDY was set. Reset by read in TWI_SR when TXCOMP is set.</td></tr></tbody></table></li>
<li id="TWI1_SR__NACK"><strong>NACK</strong>: Not Acknowledged (clear on read)</li>
<p>-</p>
<li id="TWI1_SR__ARBLST"><strong>ARBLST</strong>: Arbitration Lost (clear on read)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">Arbitration won.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Arbitration lost. Another master of the TWI bus has won the multi-master arbitration. TXCOMP is set at the same time.</td></tr></tbody></table></li>
<li id="TWI1_SR__SCLWS"><strong>SCLWS</strong>: Clock Wait State (automatically set / reset)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The clock is not stretched.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The clock is stretched. TWI_THR / TWI_RHR buffer is not filled / emptied before the emission / reception of a new character.</td></tr></tbody></table></li>
<li id="TWI1_SR__EOSACC"><strong>EOSACC</strong>: End Of Slave Access (clear on read)<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">A slave access is being performing.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The Slave Access is finished. End Of Slave Access is automatically set as soon as SVACC is reset.</td></tr></tbody></table></li>
<li id="TWI1_SR__ENDRX"><strong>ENDRX</strong>: End of RX buffer<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The Receive Counter Register has not reached 0 since the last write in TWI_RCR or TWI_RNCR.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The Receive Counter Register has reached 0 since the last write in TWI_RCR or TWI_RNCR.</td></tr></tbody></table></li>
<li id="TWI1_SR__ENDTX"><strong>ENDTX</strong>: End of TX buffer<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The Transmit Counter Register has not reached 0 since the last write in TWI_TCR or TWI_TNCR.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The Transmit Counter Register has reached 0 since the last write in TWI_TCR or TWI_TNCR.</td></tr></tbody></table></li>
<li id="TWI1_SR__RXBUFF"><strong>RXBUFF</strong>: RX Buffer Full<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">TWI_RCR or TWI_RNCR have a value other than 0.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Both TWI_RCR and TWI_RNCR have a value of 0.</td></tr></tbody></table></li>
<li id="TWI1_SR__TXBUFE"><strong>TXBUFE</strong>: TX Buffer Empty<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">TWI_TCR or TWI_TNCR have a value other than 0.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Both TWI_TCR and TWI_TNCR have a value of 0.</td></tr></tbody></table></li>
</ul>
<h4 id="TWI1_IER">TWI1 Interrupt Enable Register</h4>
<p><strong>Name</strong>: TWI1_IER</p>
<p><strong>Access</strong>: write-only</p>
<p><strong>Address</strong>: 0x40088024</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="1">
<a href="#TWI1_IER__TXBUFE" title="Transmit Buffer Empty Interrupt Enable">TXBUFE</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__RXBUFF" title="Receive Buffer Full Interrupt Enable">RXBUFF</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__ENDTX" title="End of Transmit Buffer Interrupt Enable">ENDTX</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__ENDRX" title="End of Receive Buffer Interrupt Enable">ENDRX</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__EOSACC" title="End Of Slave Access Interrupt Enable">EOSACC</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__SCL_WS" title="Clock Wait State Interrupt Enable">SCL_WS</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__ARBLST" title="Arbitration Lost Interrupt Enable">ARBLST</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__NACK" title="Not Acknowledge Interrupt Enable">NACK</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td colspan="1">
<a href="#TWI1_IER__OVRE" title="Overrun Error Interrupt Enable">OVRE</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__GACC" title="General Call Access Interrupt Enable">GACC</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__SVACC" title="Slave Access Interrupt Enable">SVACC</a>
</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_IER__TXRDY" title="Transmit Holding Register Ready Interrupt Enable">TXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__RXRDY" title="Receive Holding Register Ready Interrupt Enable">RXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_IER__TXCOMP" title="Transmission Completed Interrupt Enable">TXCOMP</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_IER__TXCOMP"><strong>TXCOMP</strong>: Transmission Completed Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__RXRDY"><strong>RXRDY</strong>: Receive Holding Register Ready Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__TXRDY"><strong>TXRDY</strong>: Transmit Holding Register Ready Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__SVACC"><strong>SVACC</strong>: Slave Access Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__GACC"><strong>GACC</strong>: General Call Access Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__OVRE"><strong>OVRE</strong>: Overrun Error Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__NACK"><strong>NACK</strong>: Not Acknowledge Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__ARBLST"><strong>ARBLST</strong>: Arbitration Lost Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__SCL_WS"><strong>SCL_WS</strong>: Clock Wait State Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__EOSACC"><strong>EOSACC</strong>: End Of Slave Access Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__ENDRX"><strong>ENDRX</strong>: End of Receive Buffer Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__ENDTX"><strong>ENDTX</strong>: End of Transmit Buffer Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__RXBUFF"><strong>RXBUFF</strong>: Receive Buffer Full Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IER__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty Interrupt Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the corresponding interrupt.</td></tr></tbody></table></li>
</ul>
<h4 id="TWI1_IDR">TWI1 Interrupt Disable Register</h4>
<p><strong>Name</strong>: TWI1_IDR</p>
<p><strong>Access</strong>: write-only</p>
<p><strong>Address</strong>: 0x40088028</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="1">
<a href="#TWI1_IDR__TXBUFE" title="Transmit Buffer Empty Interrupt Disable">TXBUFE</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__RXBUFF" title="Receive Buffer Full Interrupt Disable">RXBUFF</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__ENDTX" title="End of Transmit Buffer Interrupt Disable">ENDTX</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__ENDRX" title="End of Receive Buffer Interrupt Disable">ENDRX</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__EOSACC" title="End Of Slave Access Interrupt Disable">EOSACC</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__SCL_WS" title="Clock Wait State Interrupt Disable">SCL_WS</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__ARBLST" title="Arbitration Lost Interrupt Disable">ARBLST</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__NACK" title="Not Acknowledge Interrupt Disable">NACK</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td colspan="1">
<a href="#TWI1_IDR__OVRE" title="Overrun Error Interrupt Disable">OVRE</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__GACC" title="General Call Access Interrupt Disable">GACC</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__SVACC" title="Slave Access Interrupt Disable">SVACC</a>
</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_IDR__TXRDY" title="Transmit Holding Register Ready Interrupt Disable">TXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__RXRDY" title="Receive Holding Register Ready Interrupt Disable">RXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_IDR__TXCOMP" title="Transmission Completed Interrupt Disable">TXCOMP</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_IDR__TXCOMP"><strong>TXCOMP</strong>: Transmission Completed Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__RXRDY"><strong>RXRDY</strong>: Receive Holding Register Ready Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__TXRDY"><strong>TXRDY</strong>: Transmit Holding Register Ready Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__SVACC"><strong>SVACC</strong>: Slave Access Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__GACC"><strong>GACC</strong>: General Call Access Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__OVRE"><strong>OVRE</strong>: Overrun Error Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__NACK"><strong>NACK</strong>: Not Acknowledge Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__ARBLST"><strong>ARBLST</strong>: Arbitration Lost Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__SCL_WS"><strong>SCL_WS</strong>: Clock Wait State Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__EOSACC"><strong>EOSACC</strong>: End Of Slave Access Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__ENDRX"><strong>ENDRX</strong>: End of Receive Buffer Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__ENDTX"><strong>ENDTX</strong>: End of Transmit Buffer Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__RXBUFF"><strong>RXBUFF</strong>: Receive Buffer Full Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
<li id="TWI1_IDR__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty Interrupt Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the corresponding interrupt.</td></tr></tbody></table></li>
</ul>
<h4 id="TWI1_IMR">TWI1 Interrupt Mask Register</h4>
<p><strong>Name</strong>: TWI1_IMR</p>
<p><strong>Access</strong>: read-only</p>
<p><strong>Address</strong>: 0x4008802C</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="1">
<a href="#TWI1_IMR__TXBUFE" title="Transmit Buffer Empty Interrupt Mask">TXBUFE</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__RXBUFF" title="Receive Buffer Full Interrupt Mask">RXBUFF</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__ENDTX" title="End of Transmit Buffer Interrupt Mask">ENDTX</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__ENDRX" title="End of Receive Buffer Interrupt Mask">ENDRX</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__EOSACC" title="End Of Slave Access Interrupt Mask">EOSACC</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__SCL_WS" title="Clock Wait State Interrupt Mask">SCL_WS</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__ARBLST" title="Arbitration Lost Interrupt Mask">ARBLST</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__NACK" title="Not Acknowledge Interrupt Mask">NACK</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td colspan="1">
<a href="#TWI1_IMR__OVRE" title="Overrun Error Interrupt Mask">OVRE</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__GACC" title="General Call Access Interrupt Mask">GACC</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__SVACC" title="Slave Access Interrupt Mask">SVACC</a>
</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_IMR__TXRDY" title="Transmit Holding Register Ready Interrupt Mask">TXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__RXRDY" title="Receive Holding Register Ready Interrupt Mask">RXRDY</a>
</td>
<td colspan="1">
<a href="#TWI1_IMR__TXCOMP" title="Transmission Completed Interrupt Mask">TXCOMP</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_IMR__TXCOMP"><strong>TXCOMP</strong>: Transmission Completed Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__RXRDY"><strong>RXRDY</strong>: Receive Holding Register Ready Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__TXRDY"><strong>TXRDY</strong>: Transmit Holding Register Ready Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__SVACC"><strong>SVACC</strong>: Slave Access Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__GACC"><strong>GACC</strong>: General Call Access Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__OVRE"><strong>OVRE</strong>: Overrun Error Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__NACK"><strong>NACK</strong>: Not Acknowledge Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__ARBLST"><strong>ARBLST</strong>: Arbitration Lost Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__SCL_WS"><strong>SCL_WS</strong>: Clock Wait State Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__EOSACC"><strong>EOSACC</strong>: End Of Slave Access Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__ENDRX"><strong>ENDRX</strong>: End of Receive Buffer Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__ENDTX"><strong>ENDTX</strong>: End of Transmit Buffer Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__RXBUFF"><strong>RXBUFF</strong>: Receive Buffer Full Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
<li id="TWI1_IMR__TXBUFE"><strong>TXBUFE</strong>: Transmit Buffer Empty Interrupt Mask<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">The corresponding interrupt is disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">The corresponding interrupt is enabled.</td></tr></tbody></table></li>
</ul>
<h4 id="TWI1_RHR">TWI1 Receive Holding Register</h4>
<p><strong>Name</strong>: TWI1_RHR</p>
<p><strong>Access</strong>: read-only</p>
<p><strong>Address</strong>: 0x40088030</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RHR__RXDATA" title="Master or Slave Receive Holding Data">RXDATA</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_RHR__RXDATA"><strong>RXDATA</strong>: Master or Slave Receive Holding Data</li>
<p>-</p>
</ul>
<h4 id="TWI1_THR">TWI1 Transmit Holding Register</h4>
<p><strong>Name</strong>: TWI1_THR</p>
<p><strong>Access</strong>: write-only</p>
<p><strong>Address</strong>: 0x40088034</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_THR__TXDATA" title="Master or Slave Transmit Holding Data">TXDATA</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_THR__TXDATA"><strong>TXDATA</strong>: Master or Slave Transmit Holding Data</li>
<p>-</p>
</ul>
<h4 id="TWI1_RPR">TWI1 Receive Pointer Register</h4>
<p><strong>Name</strong>: TWI1_RPR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088100</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RPR__RXPTR" title="Receive Pointer Register">RXPTR</a>
</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RPR__RXPTR" title="Receive Pointer Register">RXPTR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RPR__RXPTR" title="Receive Pointer Register">RXPTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RPR__RXPTR" title="Receive Pointer Register">RXPTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_RPR__RXPTR"><strong>RXPTR</strong>: Receive Pointer Register</li>
<p>-</p>
</ul>
<h4 id="TWI1_RCR">TWI1 Receive Counter Register</h4>
<p><strong>Name</strong>: TWI1_RCR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088104</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RCR__RXCTR" title="Receive Counter Register">RXCTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RCR__RXCTR" title="Receive Counter Register">RXCTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_RCR__RXCTR"><strong>RXCTR</strong>: Receive Counter Register</li>
<p>-</p>
</ul>
<h4 id="TWI1_TPR">TWI1 Transmit Pointer Register</h4>
<p><strong>Name</strong>: TWI1_TPR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088108</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a>
</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TPR__TXPTR" title="Transmit Counter Register">TXPTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_TPR__TXPTR"><strong>TXPTR</strong>: Transmit Counter Register</li>
<p>-</p>
</ul>
<h4 id="TWI1_TCR">TWI1 Transmit Counter Register</h4>
<p><strong>Name</strong>: TWI1_TCR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x4008810C</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TCR__TXCTR" title="Transmit Counter Register">TXCTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TCR__TXCTR" title="Transmit Counter Register">TXCTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_TCR__TXCTR"><strong>TXCTR</strong>: Transmit Counter Register</li>
<p>-</p>
</ul>
<h4 id="TWI1_RNPR">TWI1 Receive Next Pointer Register</h4>
<p><strong>Name</strong>: TWI1_RNPR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088110</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RNPR__RXNPTR" title="Receive Next Pointer">RXNPTR</a>
</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RNPR__RXNPTR" title="Receive Next Pointer">RXNPTR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RNPR__RXNPTR" title="Receive Next Pointer">RXNPTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RNPR__RXNPTR" title="Receive Next Pointer">RXNPTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_RNPR__RXNPTR"><strong>RXNPTR</strong>: Receive Next Pointer</li>
<p>-</p>
</ul>
<h4 id="TWI1_RNCR">TWI1 Receive Next Counter Register</h4>
<p><strong>Name</strong>: TWI1_RNCR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088114</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RNCR__RXNCTR" title="Receive Next Counter">RXNCTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_RNCR__RXNCTR" title="Receive Next Counter">RXNCTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_RNCR__RXNCTR"><strong>RXNCTR</strong>: Receive Next Counter</li>
<p>-</p>
</ul>
<h4 id="TWI1_TNPR">TWI1 Transmit Next Pointer Register</h4>
<p><strong>Name</strong>: TWI1_TNPR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x40088118</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a>
</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a>
</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TNPR__TXNPTR" title="Transmit Next Pointer">TXNPTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_TNPR__TXNPTR"><strong>TXNPTR</strong>: Transmit Next Pointer</li>
<p>-</p>
</ul>
<h4 id="TWI1_TNCR">TWI1 Transmit Next Counter Register</h4>
<p><strong>Name</strong>: TWI1_TNCR</p>
<p><strong>Access</strong>: read-write</p>
<p><strong>Address</strong>: 0x4008811C</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TNCR__TXNCTR" title="Transmit Counter Next">TXNCTR</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td colspan="8">
<a href="#TWI1_TNCR__TXNCTR" title="Transmit Counter Next">TXNCTR</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_TNCR__TXNCTR"><strong>TXNCTR</strong>: Transmit Counter Next</li>
<p>-</p>
</ul>
<h4 id="TWI1_PTCR">TWI1 Transfer Control Register</h4>
<p><strong>Name</strong>: TWI1_PTCR</p>
<p><strong>Access</strong>: write-only</p>
<p><strong>Address</strong>: 0x40088120</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_PTCR__TXTDIS" title="Transmitter Transfer Disable">TXTDIS</a>
</td>
<td colspan="1">
<a href="#TWI1_PTCR__TXTEN" title="Transmitter Transfer Enable">TXTEN</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_PTCR__RXTDIS" title="Receiver Transfer Disable">RXTDIS</a>
</td>
<td colspan="1">
<a href="#TWI1_PTCR__RXTEN" title="Receiver Transfer Enable">RXTEN</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_PTCR__RXTEN"><strong>RXTEN</strong>: Receiver Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables PDC receiver channel requests if RXTDIS is not set.</td></tr></tbody></table></li>
<li id="TWI1_PTCR__RXTDIS"><strong>RXTDIS</strong>: Receiver Transfer Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the PDC receiver channel requests.</td></tr></tbody></table></li>
<li id="TWI1_PTCR__TXTEN"><strong>TXTEN</strong>: Transmitter Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Enables the PDC transmitter channel requests.</td></tr></tbody></table></li>
<li id="TWI1_PTCR__TXTDIS"><strong>TXTDIS</strong>: Transmitter Transfer Disable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">No effect.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">Disables the PDC transmitter channel requests.</td></tr></tbody></table></li>
</ul>
<h4 id="TWI1_PTSR">TWI1 Transfer Status Register</h4>
<p><strong>Name</strong>: TWI1_PTSR</p>
<p><strong>Access</strong>: read-only</p>
<p><strong>Address</strong>: 0x40088124</p>
<table class="fields">
<tbody>
<tr class="offsets">
<td>31</td>
<td>30</td>
<td>29</td>
<td>28</td>
<td>27</td>
<td>26</td>
<td>25</td>
<td>24</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>23</td>
<td>22</td>
<td>21</td>
<td>20</td>
<td>19</td>
<td>18</td>
<td>17</td>
<td>16</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
</tr>
<tr class="offsets">
<td>15</td>
<td>14</td>
<td>13</td>
<td>12</td>
<td>11</td>
<td>10</td>
<td>9</td>
<td>8</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_PTSR__TXTEN" title="Transmitter Transfer Enable">TXTEN</a>
</td>
</tr>
<tr class="offsets">
<td>7</td>
<td>6</td>
<td>5</td>
<td>4</td>
<td>3</td>
<td>2</td>
<td>1</td>
<td>0</td>
</tr>
<tr class="fields">
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td>-</td>
<td colspan="1">
<a href="#TWI1_PTSR__RXTEN" title="Receiver Transfer Enable">RXTEN</a>
</td>
</tr>
</tbody>
</table>
<ul class="values">
<li id="TWI1_PTSR__RXTEN"><strong>RXTEN</strong>: Receiver Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">PDC Receiver channel requests are disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">PDC Receiver channel requests are enabled.</td></tr></tbody></table></li>
<li id="TWI1_PTSR__TXTEN"><strong>TXTEN</strong>: Transmitter Transfer Enable<table class="values"><thead><tr><th>Value</th><th>Name</th><th>Description</th></tr></thead><tbody><tr class="odd"><td class="value">0</td><td class="name">-</td><td class="description">PDC Transmitter channel requests are disabled.</td></tr><tr class="even"><td class="value">1</td><td class="name">-</td><td class="description">PDC Transmitter channel requests are enabled.</td></tr></tbody></table></li>
</ul>
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