| <?xml version="1.0" encoding="UTF-8"?> |
| |
| <!-- ============================================================================ --> |
| <!-- SAM Software Package License --> |
| <!-- ============================================================================ --> |
| <!-- Copyright (c) 2012, Atmel Corporation --> |
| <!-- --> |
| <!-- All rights reserved. --> |
| <!-- --> |
| <!-- Redistribution and use in source and binary forms, with or without --> |
| <!-- modification, are permitted provided that the following condition is met: --> |
| <!-- --> |
| <!-- - Redistributions of source code must retain the above copyright notice, --> |
| <!-- this list of conditions and the disclaimer below. --> |
| <!-- --> |
| <!-- Atmel's name may not be used to endorse or promote products derived from --> |
| <!-- this software without specific prior written permission. --> |
| <!-- --> |
| <!-- DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR --> |
| <!-- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF --> |
| <!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE --> |
| <!-- DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, --> |
| <!-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT --> |
| <!-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, --> |
| <!-- OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF --> |
| <!-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING --> |
| <!-- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, --> |
| <!-- EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --> |
| <!-- ============================================================================ --> |
| |
| <device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.0" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd"> |
| <name>SAM3N2A</name> |
| <version>0</version> |
| <description>Atmel SAM3N2A Microcontroller</description> |
| <addressUnitBits>8</addressUnitBits> |
| <width>32</width> |
| <peripherals> |
| <peripheral> |
| <name>SPI</name> |
| <version>6088R</version> |
| <description>Serial Peripheral Interface</description> |
| <prependToName>SPI_</prependToName> |
| <baseAddress>0x40008000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_SPI</name> |
| <value>21</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>SPIEN</name> |
| <description>SPI Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SPIDIS</name> |
| <description>SPI Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SWRST</name> |
| <description>SPI Software Reset</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LASTXFER</name> |
| <description>Last Transfer</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>MSTR</name> |
| <description>Master/Slave Mode</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>PS</name> |
| <description>Peripheral Select</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>PCSDEC</name> |
| <description>Chip Select Decode</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MODFDIS</name> |
| <description>Mode Fault Detection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDRBT</name> |
| <description>Wait Data Read Before Transfer</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LLB</name> |
| <description>Local Loopback Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>PCS</name> |
| <description>Peripheral Chip Select</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DLYBCS</name> |
| <description>Delay Between Chip Selects</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RDR</name> |
| <description>Receive Data Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RD</name> |
| <description>Receive Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCS</name> |
| <description>Peripheral Chip Select</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TDR</name> |
| <description>Transmit Data Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TD</name> |
| <description>Transmit Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCS</name> |
| <description>Peripheral Chip Select</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LASTXFER</name> |
| <description>Last Transfer</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x000000F0</resetValue> |
| <fields> |
| <field> |
| <name>RDRF</name> |
| <description>Receive Data Register Full</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TDRE</name> |
| <description>Transmit Data Register Empty</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MODF</name> |
| <description>Mode Fault Error</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRES</name> |
| <description>Overrun Error Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of RX buffer</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of TX buffer</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>RX Buffer Full</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>TX Buffer Empty</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NSSR</name> |
| <description>NSS Rising</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmission Registers Empty</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>UNDES</name> |
| <description>Underrun Error Status (Slave Mode Only)</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SPIENS</name> |
| <description>SPI Enable Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RDRF</name> |
| <description>Receive Data Register Full Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TDRE</name> |
| <description>SPI Transmit Data Register Empty Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MODF</name> |
| <description>Mode Fault Error Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRES</name> |
| <description>Overrun Error Interrupt Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NSSR</name> |
| <description>NSS Rising Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmission Registers Empty Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>UNDES</name> |
| <description>Underrun Error Interrupt Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RDRF</name> |
| <description>Receive Data Register Full Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TDRE</name> |
| <description>SPI Transmit Data Register Empty Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MODF</name> |
| <description>Mode Fault Error Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRES</name> |
| <description>Overrun Error Interrupt Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NSSR</name> |
| <description>NSS Rising Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmission Registers Empty Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>UNDES</name> |
| <description>Underrun Error Interrupt Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RDRF</name> |
| <description>Receive Data Register Full Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TDRE</name> |
| <description>SPI Transmit Data Register Empty Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MODF</name> |
| <description>Mode Fault Error Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRES</name> |
| <description>Overrun Error Interrupt Mask</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Mask</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Mask</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Mask</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NSSR</name> |
| <description>NSS Rising Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmission Registers Empty Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>UNDES</name> |
| <description>Underrun Error Interrupt Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <dim>4</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-3</dimIndex> |
| <name>CSR%s</name> |
| <description>Chip Select Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>CPOL</name> |
| <description>Clock Polarity</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>NCPHA</name> |
| <description>Clock Phase</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CSNAAT</name> |
| <description>Chip Select Not Active After Transfer (Ignored if CSAAT = 1)</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CSAAT</name> |
| <description>Chip Select Not Active After Transfer (Ignored if CSAAT = 1)</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BITS</name> |
| <description>Bits Per Transfer</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>8_BIT</name> |
| <description>8 bits for transfer</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>9_BIT</name> |
| <description>9 bits for transfer</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>10_BIT</name> |
| <description>10 bits for transfer</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>11_BIT</name> |
| <description>11 bits for transfer</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>12_BIT</name> |
| <description>12 bits for transfer</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>13_BIT</name> |
| <description>13 bits for transfer</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>14_BIT</name> |
| <description>14 bits for transfer</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>15_BIT</name> |
| <description>15 bits for transfer</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>16_BIT</name> |
| <description>16 bits for transfer</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SCBR</name> |
| <description>Serial Clock Baud Rate</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DLYBS</name> |
| <description>Delay Before SPCK</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DLYBCT</name> |
| <description>Delay Between Consecutive Transfers</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protection Control Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protection Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protection Key Password</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPSR</name> |
| <description>Write Protection Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protection Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protection Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RPR</name> |
| <description>Receive Pointer Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXPTR</name> |
| <description>Receive Pointer Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RCR</name> |
| <description>Receive Counter Register</description> |
| <addressOffset>0x00000104</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCTR</name> |
| <description>Receive Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TPR</name> |
| <description>Transmit Pointer Register</description> |
| <addressOffset>0x00000108</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXPTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TCR</name> |
| <description>Transmit Counter Register</description> |
| <addressOffset>0x0000010C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNPR</name> |
| <description>Receive Next Pointer Register</description> |
| <addressOffset>0x00000110</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNPTR</name> |
| <description>Receive Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNCR</name> |
| <description>Receive Next Counter Register</description> |
| <addressOffset>0x00000114</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNCTR</name> |
| <description>Receive Next Counter</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNPR</name> |
| <description>Transmit Next Pointer Register</description> |
| <addressOffset>0x00000118</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNPTR</name> |
| <description>Transmit Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNCR</name> |
| <description>Transmit Next Counter Register</description> |
| <addressOffset>0x0000011C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNCTR</name> |
| <description>Transmit Counter Next</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTCR</name> |
| <description>Transfer Control Register</description> |
| <addressOffset>0x00000120</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXTDIS</name> |
| <description>Receiver Transfer Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTDIS</name> |
| <description>Transmitter Transfer Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTSR</name> |
| <description>Transfer Status Register</description> |
| <addressOffset>0x00000124</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>TC0</name> |
| <version>6082O</version> |
| <description>Timer Counter 0</description> |
| <groupName>TC</groupName> |
| <prependToName>TC0_</prependToName> |
| <baseAddress>0x40010000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_TC0</name> |
| <value>23</value> |
| </interrupt> |
| <interrupt> |
| <name>ID_TC1</name> |
| <value>24</value> |
| </interrupt> |
| <interrupt> |
| <name>ID_TC2</name> |
| <value>25</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CCR0</name> |
| <description>Channel Control Register (channel = 0)</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CLKEN</name> |
| <description>Counter Clock Enable Command</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CLKDIS</name> |
| <description>Counter Clock Disable Command</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SWTRG</name> |
| <description>Software Trigger Command</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR0</name> |
| <description>Channel Mode Register (channel = 0)</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TCCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIMER_CLOCK1</name> |
| <description>Clock selected: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK2</name> |
| <description>Clock selected: TCLK2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK3</name> |
| <description>Clock selected: TCLK3</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK4</name> |
| <description>Clock selected: TCLK4</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK5</name> |
| <description>Clock selected: TCLK5</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>Clock selected: XC0</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>Clock selected: XC1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>Clock selected: XC2</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CLKI</name> |
| <description>Clock Invert</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BURST</name> |
| <description>Burst Signal Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0 is ANDed with the selected clock.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1 is ANDed with the selected clock.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2 is ANDed with the selected clock.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LDBSTOP</name> |
| <description>Counter Clock Stopped with RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LDBDIS</name> |
| <description>Counter Clock Disable with RB Loading</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ETRGEDG</name> |
| <description>External Trigger Edge Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ABETRG</name> |
| <description>TIOA or TIOB External Trigger Selection</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPCTRG</name> |
| <description>RC Compare Trigger Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WAVE</name> |
| <description>Waveform Mode</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LDRA</name> |
| <description>RA Loading Edge Selection</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge of TIOA</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge of TIOA</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge of TIOA</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LDRB</name> |
| <description>RB Loading Edge Selection</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge of TIOA</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge of TIOA</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge of TIOA</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR0_WAVE_EQ_1</name> |
| <description>Channel Mode Register (channel = 0)</description> |
| <alternateGroup>WAVE_EQ_1</alternateGroup> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TCCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIMER_CLOCK1</name> |
| <description>Clock selected: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK2</name> |
| <description>Clock selected: TCLK2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK3</name> |
| <description>Clock selected: TCLK3</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK4</name> |
| <description>Clock selected: TCLK4</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK5</name> |
| <description>Clock selected: TCLK5</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>Clock selected: XC0</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>Clock selected: XC1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>Clock selected: XC2</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CLKI</name> |
| <description>Clock Invert</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BURST</name> |
| <description>Burst Signal Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0 is ANDed with the selected clock.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1 is ANDed with the selected clock.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2 is ANDed with the selected clock.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CPCSTOP</name> |
| <description>Counter Clock Stopped with RC Compare</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPCDIS</name> |
| <description>Counter Clock Disable with RC Compare</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>EEVTEDG</name> |
| <description>External Event Edge Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>EEVT</name> |
| <description>External Event Selection</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIOB</name> |
| <description>TIOB</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ENETRG</name> |
| <description>External Event Trigger Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WAVSEL</name> |
| <description>Waveform Selection</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>UP</name> |
| <description>UP mode without automatic trigger on RC Compare</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UPDOWN</name> |
| <description>UPDOWN mode without automatic trigger on RC Compare</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UP_RC</name> |
| <description>UP mode with automatic trigger on RC Compare</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UPDOWN_RC</name> |
| <description>UPDOWN mode with automatic trigger on RC Compare</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WAVE</name> |
| <description>Waveform Mode</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ACPA</name> |
| <description>RA Compare Effect on TIOA</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ACPC</name> |
| <description>RC Compare Effect on TIOA</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>AEEVT</name> |
| <description>External Event Effect on TIOA</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ASWTRG</name> |
| <description>Software Trigger Effect on TIOA</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BCPB</name> |
| <description>RB Compare Effect on TIOB</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BCPC</name> |
| <description>RC Compare Effect on TIOB</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BEEVT</name> |
| <description>External Event Effect on TIOB</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BSWTRG</name> |
| <description>Software Trigger Effect on TIOB</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SMMR0</name> |
| <description>Stepper Motor Mode Register (channel = 0)</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>GCEN</name> |
| <description>Gray Count Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DOWN</name> |
| <description>DOWN Count</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CV0</name> |
| <description>Counter Value (channel = 0)</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CV</name> |
| <description>Counter Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RA0</name> |
| <description>Register A (channel = 0)</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RA</name> |
| <description>Register A</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RB0</name> |
| <description>Register B (channel = 0)</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RB</name> |
| <description>Register B</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RC0</name> |
| <description>Register C (channel = 0)</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RC</name> |
| <description>Register C</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR0</name> |
| <description>Status Register (channel = 0)</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CLKSTA</name> |
| <description>Clock Enabling Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MTIOA</name> |
| <description>TIOA Mirror</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MTIOB</name> |
| <description>TIOB Mirror</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER0</name> |
| <description>Interrupt Enable Register (channel = 0)</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR0</name> |
| <description>Interrupt Disable Register (channel = 0)</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR0</name> |
| <description>Interrupt Mask Register (channel = 0)</description> |
| <addressOffset>0x0000002C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCR1</name> |
| <description>Channel Control Register (channel = 1)</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CLKEN</name> |
| <description>Counter Clock Enable Command</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CLKDIS</name> |
| <description>Counter Clock Disable Command</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SWTRG</name> |
| <description>Software Trigger Command</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR1</name> |
| <description>Channel Mode Register (channel = 1)</description> |
| <addressOffset>0x00000044</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TCCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIMER_CLOCK1</name> |
| <description>Clock selected: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK2</name> |
| <description>Clock selected: TCLK2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK3</name> |
| <description>Clock selected: TCLK3</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK4</name> |
| <description>Clock selected: TCLK4</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK5</name> |
| <description>Clock selected: TCLK5</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>Clock selected: XC0</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>Clock selected: XC1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>Clock selected: XC2</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CLKI</name> |
| <description>Clock Invert</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BURST</name> |
| <description>Burst Signal Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0 is ANDed with the selected clock.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1 is ANDed with the selected clock.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2 is ANDed with the selected clock.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LDBSTOP</name> |
| <description>Counter Clock Stopped with RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LDBDIS</name> |
| <description>Counter Clock Disable with RB Loading</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ETRGEDG</name> |
| <description>External Trigger Edge Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ABETRG</name> |
| <description>TIOA or TIOB External Trigger Selection</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPCTRG</name> |
| <description>RC Compare Trigger Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WAVE</name> |
| <description>Waveform Mode</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LDRA</name> |
| <description>RA Loading Edge Selection</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge of TIOA</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge of TIOA</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge of TIOA</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LDRB</name> |
| <description>RB Loading Edge Selection</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge of TIOA</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge of TIOA</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge of TIOA</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR1_WAVE_EQ_1</name> |
| <description>Channel Mode Register (channel = 1)</description> |
| <alternateGroup>WAVE_EQ_1</alternateGroup> |
| <addressOffset>0x00000044</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TCCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIMER_CLOCK1</name> |
| <description>Clock selected: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK2</name> |
| <description>Clock selected: TCLK2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK3</name> |
| <description>Clock selected: TCLK3</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK4</name> |
| <description>Clock selected: TCLK4</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK5</name> |
| <description>Clock selected: TCLK5</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>Clock selected: XC0</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>Clock selected: XC1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>Clock selected: XC2</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CLKI</name> |
| <description>Clock Invert</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BURST</name> |
| <description>Burst Signal Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0 is ANDed with the selected clock.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1 is ANDed with the selected clock.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2 is ANDed with the selected clock.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CPCSTOP</name> |
| <description>Counter Clock Stopped with RC Compare</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPCDIS</name> |
| <description>Counter Clock Disable with RC Compare</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>EEVTEDG</name> |
| <description>External Event Edge Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>EEVT</name> |
| <description>External Event Selection</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIOB</name> |
| <description>TIOB</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ENETRG</name> |
| <description>External Event Trigger Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WAVSEL</name> |
| <description>Waveform Selection</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>UP</name> |
| <description>UP mode without automatic trigger on RC Compare</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UPDOWN</name> |
| <description>UPDOWN mode without automatic trigger on RC Compare</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UP_RC</name> |
| <description>UP mode with automatic trigger on RC Compare</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UPDOWN_RC</name> |
| <description>UPDOWN mode with automatic trigger on RC Compare</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WAVE</name> |
| <description>Waveform Mode</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ACPA</name> |
| <description>RA Compare Effect on TIOA</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ACPC</name> |
| <description>RC Compare Effect on TIOA</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>AEEVT</name> |
| <description>External Event Effect on TIOA</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ASWTRG</name> |
| <description>Software Trigger Effect on TIOA</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BCPB</name> |
| <description>RB Compare Effect on TIOB</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BCPC</name> |
| <description>RC Compare Effect on TIOB</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BEEVT</name> |
| <description>External Event Effect on TIOB</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BSWTRG</name> |
| <description>Software Trigger Effect on TIOB</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SMMR1</name> |
| <description>Stepper Motor Mode Register (channel = 1)</description> |
| <addressOffset>0x00000048</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>GCEN</name> |
| <description>Gray Count Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DOWN</name> |
| <description>DOWN Count</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CV1</name> |
| <description>Counter Value (channel = 1)</description> |
| <addressOffset>0x00000050</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CV</name> |
| <description>Counter Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RA1</name> |
| <description>Register A (channel = 1)</description> |
| <addressOffset>0x00000054</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RA</name> |
| <description>Register A</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RB1</name> |
| <description>Register B (channel = 1)</description> |
| <addressOffset>0x00000058</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RB</name> |
| <description>Register B</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RC1</name> |
| <description>Register C (channel = 1)</description> |
| <addressOffset>0x0000005C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RC</name> |
| <description>Register C</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR1</name> |
| <description>Status Register (channel = 1)</description> |
| <addressOffset>0x00000060</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CLKSTA</name> |
| <description>Clock Enabling Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MTIOA</name> |
| <description>TIOA Mirror</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MTIOB</name> |
| <description>TIOB Mirror</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER1</name> |
| <description>Interrupt Enable Register (channel = 1)</description> |
| <addressOffset>0x00000064</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR1</name> |
| <description>Interrupt Disable Register (channel = 1)</description> |
| <addressOffset>0x00000068</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR1</name> |
| <description>Interrupt Mask Register (channel = 1)</description> |
| <addressOffset>0x0000006C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCR2</name> |
| <description>Channel Control Register (channel = 2)</description> |
| <addressOffset>0x00000080</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CLKEN</name> |
| <description>Counter Clock Enable Command</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CLKDIS</name> |
| <description>Counter Clock Disable Command</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SWTRG</name> |
| <description>Software Trigger Command</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR2</name> |
| <description>Channel Mode Register (channel = 2)</description> |
| <addressOffset>0x00000084</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TCCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIMER_CLOCK1</name> |
| <description>Clock selected: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK2</name> |
| <description>Clock selected: TCLK2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK3</name> |
| <description>Clock selected: TCLK3</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK4</name> |
| <description>Clock selected: TCLK4</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK5</name> |
| <description>Clock selected: TCLK5</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>Clock selected: XC0</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>Clock selected: XC1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>Clock selected: XC2</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CLKI</name> |
| <description>Clock Invert</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BURST</name> |
| <description>Burst Signal Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0 is ANDed with the selected clock.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1 is ANDed with the selected clock.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2 is ANDed with the selected clock.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LDBSTOP</name> |
| <description>Counter Clock Stopped with RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LDBDIS</name> |
| <description>Counter Clock Disable with RB Loading</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ETRGEDG</name> |
| <description>External Trigger Edge Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ABETRG</name> |
| <description>TIOA or TIOB External Trigger Selection</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPCTRG</name> |
| <description>RC Compare Trigger Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WAVE</name> |
| <description>Waveform Mode</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LDRA</name> |
| <description>RA Loading Edge Selection</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge of TIOA</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge of TIOA</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge of TIOA</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LDRB</name> |
| <description>RB Loading Edge Selection</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge of TIOA</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge of TIOA</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge of TIOA</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR2_WAVE_EQ_1</name> |
| <description>Channel Mode Register (channel = 2)</description> |
| <alternateGroup>WAVE_EQ_1</alternateGroup> |
| <addressOffset>0x00000084</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TCCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIMER_CLOCK1</name> |
| <description>Clock selected: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK2</name> |
| <description>Clock selected: TCLK2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK3</name> |
| <description>Clock selected: TCLK3</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK4</name> |
| <description>Clock selected: TCLK4</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIMER_CLOCK5</name> |
| <description>Clock selected: TCLK5</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>Clock selected: XC0</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>Clock selected: XC1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>Clock selected: XC2</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CLKI</name> |
| <description>Clock Invert</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>BURST</name> |
| <description>Burst Signal Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>The clock is not gated by an external signal.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0 is ANDed with the selected clock.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1 is ANDed with the selected clock.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2 is ANDed with the selected clock.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CPCSTOP</name> |
| <description>Counter Clock Stopped with RC Compare</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPCDIS</name> |
| <description>Counter Clock Disable with RC Compare</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>EEVTEDG</name> |
| <description>External Event Edge Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RISING</name> |
| <description>Rising edge</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FALLING</name> |
| <description>Falling edge</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EDGE</name> |
| <description>Each edge</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>EEVT</name> |
| <description>External Event Selection</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TIOB</name> |
| <description>TIOB</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC0</name> |
| <description>XC0</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC1</name> |
| <description>XC1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>XC2</name> |
| <description>XC2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ENETRG</name> |
| <description>External Event Trigger Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WAVSEL</name> |
| <description>Waveform Selection</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>UP</name> |
| <description>UP mode without automatic trigger on RC Compare</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UPDOWN</name> |
| <description>UPDOWN mode without automatic trigger on RC Compare</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UP_RC</name> |
| <description>UP mode with automatic trigger on RC Compare</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>UPDOWN_RC</name> |
| <description>UPDOWN mode with automatic trigger on RC Compare</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WAVE</name> |
| <description>Waveform Mode</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ACPA</name> |
| <description>RA Compare Effect on TIOA</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ACPC</name> |
| <description>RC Compare Effect on TIOA</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>AEEVT</name> |
| <description>External Event Effect on TIOA</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ASWTRG</name> |
| <description>Software Trigger Effect on TIOA</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BCPB</name> |
| <description>RB Compare Effect on TIOB</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BCPC</name> |
| <description>RC Compare Effect on TIOB</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BEEVT</name> |
| <description>External Event Effect on TIOB</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BSWTRG</name> |
| <description>Software Trigger Effect on TIOB</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SET</name> |
| <description>Set</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLEAR</name> |
| <description>Clear</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TOGGLE</name> |
| <description>Toggle</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SMMR2</name> |
| <description>Stepper Motor Mode Register (channel = 2)</description> |
| <addressOffset>0x00000088</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>GCEN</name> |
| <description>Gray Count Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DOWN</name> |
| <description>DOWN Count</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CV2</name> |
| <description>Counter Value (channel = 2)</description> |
| <addressOffset>0x00000090</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CV</name> |
| <description>Counter Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RA2</name> |
| <description>Register A (channel = 2)</description> |
| <addressOffset>0x00000094</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RA</name> |
| <description>Register A</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RB2</name> |
| <description>Register B (channel = 2)</description> |
| <addressOffset>0x00000098</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RB</name> |
| <description>Register B</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RC2</name> |
| <description>Register C (channel = 2)</description> |
| <addressOffset>0x0000009C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RC</name> |
| <description>Register C</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR2</name> |
| <description>Status Register (channel = 2)</description> |
| <addressOffset>0x000000A0</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CLKSTA</name> |
| <description>Clock Enabling Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MTIOA</name> |
| <description>TIOA Mirror</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MTIOB</name> |
| <description>TIOB Mirror</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER2</name> |
| <description>Interrupt Enable Register (channel = 2)</description> |
| <addressOffset>0x000000A4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR2</name> |
| <description>Interrupt Disable Register (channel = 2)</description> |
| <addressOffset>0x000000A8</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR2</name> |
| <description>Interrupt Mask Register (channel = 2)</description> |
| <addressOffset>0x000000AC</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>COVFS</name> |
| <description>Counter Overflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOVRS</name> |
| <description>Load Overrun</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPAS</name> |
| <description>RA Compare</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPBS</name> |
| <description>RB Compare</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CPCS</name> |
| <description>RC Compare</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRAS</name> |
| <description>RA Loading</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LDRBS</name> |
| <description>RB Loading</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ETRGS</name> |
| <description>External Trigger</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>BCR</name> |
| <description>Block Control Register</description> |
| <addressOffset>0x000000C0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>SYNC</name> |
| <description>Synchro Command</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>BMR</name> |
| <description>Block Mode Register</description> |
| <addressOffset>0x000000C4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TC0XC0S</name> |
| <description>External Clock Signal 0 Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TCLK0</name> |
| <description>Signal connected to XC0: TCLK0</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIOA1</name> |
| <description>Signal connected to XC0: TIOA1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIOA2</name> |
| <description>Signal connected to XC0: TIOA2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>TC1XC1S</name> |
| <description>External Clock Signal 1 Selection</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TCLK1</name> |
| <description>Signal connected to XC1: TCLK1</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIOA0</name> |
| <description>Signal connected to XC1: TIOA0</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIOA2</name> |
| <description>Signal connected to XC1: TIOA2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>TC2XC2S</name> |
| <description>External Clock Signal 2 Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TCLK2</name> |
| <description>Signal connected to XC2: TCLK2</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIOA1</name> |
| <description>Signal connected to XC2: TIOA1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TIOA2</name> |
| <description>Signal connected to XC2: TIOA2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>QDEN</name> |
| <description>Quadrature Decoder ENabled</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>POSEN</name> |
| <description>POSition ENabled</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SPEEDEN</name> |
| <description>SPEED ENabled</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>QDTRANS</name> |
| <description>Quadrature Decoding TRANSparent</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>EDGPHA</name> |
| <description>EDGe on PHA count mode</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>INVA</name> |
| <description>INVerted phA</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>INVB</name> |
| <description>INVerted phB</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>INVIDX</name> |
| <description>INVerted InDeX</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SWAP</name> |
| <description>SWAP PHA and PHB</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>IDXPHB</name> |
| <description>InDeX pin is PHB pin</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FILTER</name> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MAXFILT</name> |
| <description>MAXimum FILTer</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>6</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>QIER</name> |
| <description>QDEC Interrupt Enable Register</description> |
| <addressOffset>0x000000C8</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>IDX</name> |
| <description>InDeX</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>DIRCHG</name> |
| <description>DIRection CHanGe</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>QERR</name> |
| <description>Quadrature ERRor</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>QIDR</name> |
| <description>QDEC Interrupt Disable Register</description> |
| <addressOffset>0x000000CC</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>IDX</name> |
| <description>InDeX</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>DIRCHG</name> |
| <description>DIRection CHanGe</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>QERR</name> |
| <description>Quadrature ERRor</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>QIMR</name> |
| <description>QDEC Interrupt Mask Register</description> |
| <addressOffset>0x000000D0</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IDX</name> |
| <description>InDeX</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>DIRCHG</name> |
| <description>DIRection CHanGe</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>QERR</name> |
| <description>Quadrature ERRor</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>QISR</name> |
| <description>QDEC Interrupt Status Register</description> |
| <addressOffset>0x000000D4</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IDX</name> |
| <description>InDeX</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>DIRCHG</name> |
| <description>DIRection CHanGe</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>QERR</name> |
| <description>Quadrature ERRor</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>DIR</name> |
| <description>Direction</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>TWI0</name> |
| <version>6212L</version> |
| <description>Two-wire Interface 0</description> |
| <groupName>TWI</groupName> |
| <prependToName>TWI0_</prependToName> |
| <baseAddress>0x40018000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_TWI0</name> |
| <value>19</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>START</name> |
| <description>Send a START Condition</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>STOP</name> |
| <description>Send a STOP Condition</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MSEN</name> |
| <description>TWI Master Mode Enabled</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MSDIS</name> |
| <description>TWI Master Mode Disabled</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVEN</name> |
| <description>TWI Slave Mode Enabled</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVDIS</name> |
| <description>TWI Slave Mode Disabled</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>QUICK</name> |
| <description>SMBUS Quick Command</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SWRST</name> |
| <description>Software Reset</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MMR</name> |
| <description>Master Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IADRSZ</name> |
| <description>Internal Device Address Size</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>No internal device address</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>1_BYTE</name> |
| <description>One-byte internal device address</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_BYTE</name> |
| <description>Two-byte internal device address</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_BYTE</name> |
| <description>Three-byte internal device address</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>MREAD</name> |
| <description>Master Read Direction</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DADR</name> |
| <description>Device Address</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SMR</name> |
| <description>Slave Mode Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SADR</name> |
| <description>Slave Address</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IADR</name> |
| <description>Internal Address Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IADR</name> |
| <description>Internal Address</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CWGR</name> |
| <description>Clock Waveform Generator Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CLDIV</name> |
| <description>Clock Low Divider</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CHDIV</name> |
| <description>Clock High Divider</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CKDIV</name> |
| <description>Clock Divider</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x0000F009</resetValue> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed (automatically set / reset)</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready (automatically set / reset)</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready (automatically set / reset)</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SVREAD</name> |
| <description>Slave Read (automatically set / reset)</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access (automatically set / reset)</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access (clear on read)</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error (clear on read)</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledged (clear on read)</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost (clear on read)</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SCLWS</name> |
| <description>Clock Wait State (automatically set / reset)</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access (clear on read)</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of RX buffer</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of TX buffer</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>RX Buffer Full</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>TX Buffer Empty</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access Interrupt Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledge Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost Interrupt Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SCL_WS</name> |
| <description>Clock Wait State Interrupt Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access Interrupt Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access Interrupt Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledge Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost Interrupt Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SCL_WS</name> |
| <description>Clock Wait State Interrupt Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access Interrupt Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x0000002C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access Interrupt Mask</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Mask</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledge Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost Interrupt Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SCL_WS</name> |
| <description>Clock Wait State Interrupt Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access Interrupt Mask</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Mask</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Mask</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Mask</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Mask</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RHR</name> |
| <description>Receive Holding Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXDATA</name> |
| <description>Master or Slave Receive Holding Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>THR</name> |
| <description>Transmit Holding Register</description> |
| <addressOffset>0x00000034</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXDATA</name> |
| <description>Master or Slave Transmit Holding Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RPR</name> |
| <description>Receive Pointer Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXPTR</name> |
| <description>Receive Pointer Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RCR</name> |
| <description>Receive Counter Register</description> |
| <addressOffset>0x00000104</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCTR</name> |
| <description>Receive Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TPR</name> |
| <description>Transmit Pointer Register</description> |
| <addressOffset>0x00000108</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXPTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TCR</name> |
| <description>Transmit Counter Register</description> |
| <addressOffset>0x0000010C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNPR</name> |
| <description>Receive Next Pointer Register</description> |
| <addressOffset>0x00000110</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNPTR</name> |
| <description>Receive Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNCR</name> |
| <description>Receive Next Counter Register</description> |
| <addressOffset>0x00000114</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNCTR</name> |
| <description>Receive Next Counter</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNPR</name> |
| <description>Transmit Next Pointer Register</description> |
| <addressOffset>0x00000118</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNPTR</name> |
| <description>Transmit Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNCR</name> |
| <description>Transmit Next Counter Register</description> |
| <addressOffset>0x0000011C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNCTR</name> |
| <description>Transmit Counter Next</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTCR</name> |
| <description>Transfer Control Register</description> |
| <addressOffset>0x00000120</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXTDIS</name> |
| <description>Receiver Transfer Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTDIS</name> |
| <description>Transmitter Transfer Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTSR</name> |
| <description>Transfer Status Register</description> |
| <addressOffset>0x00000124</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>TWI1</name> |
| <version>6212L</version> |
| <description>Two-wire Interface 1</description> |
| <groupName>TWI</groupName> |
| <prependToName>TWI1_</prependToName> |
| <baseAddress>0x4001C000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_TWI1</name> |
| <value>20</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>START</name> |
| <description>Send a START Condition</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>STOP</name> |
| <description>Send a STOP Condition</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MSEN</name> |
| <description>TWI Master Mode Enabled</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MSDIS</name> |
| <description>TWI Master Mode Disabled</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVEN</name> |
| <description>TWI Slave Mode Enabled</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVDIS</name> |
| <description>TWI Slave Mode Disabled</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>QUICK</name> |
| <description>SMBUS Quick Command</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SWRST</name> |
| <description>Software Reset</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MMR</name> |
| <description>Master Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IADRSZ</name> |
| <description>Internal Device Address Size</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>No internal device address</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>1_BYTE</name> |
| <description>One-byte internal device address</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_BYTE</name> |
| <description>Two-byte internal device address</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_BYTE</name> |
| <description>Three-byte internal device address</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>MREAD</name> |
| <description>Master Read Direction</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DADR</name> |
| <description>Device Address</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SMR</name> |
| <description>Slave Mode Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SADR</name> |
| <description>Slave Address</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IADR</name> |
| <description>Internal Address Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IADR</name> |
| <description>Internal Address</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CWGR</name> |
| <description>Clock Waveform Generator Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CLDIV</name> |
| <description>Clock Low Divider</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CHDIV</name> |
| <description>Clock High Divider</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CKDIV</name> |
| <description>Clock Divider</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x0000F009</resetValue> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed (automatically set / reset)</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready (automatically set / reset)</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready (automatically set / reset)</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SVREAD</name> |
| <description>Slave Read (automatically set / reset)</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access (automatically set / reset)</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access (clear on read)</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error (clear on read)</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledged (clear on read)</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost (clear on read)</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SCLWS</name> |
| <description>Clock Wait State (automatically set / reset)</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access (clear on read)</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of RX buffer</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of TX buffer</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>RX Buffer Full</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>TX Buffer Empty</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access Interrupt Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledge Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost Interrupt Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SCL_WS</name> |
| <description>Clock Wait State Interrupt Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access Interrupt Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access Interrupt Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledge Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost Interrupt Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SCL_WS</name> |
| <description>Clock Wait State Interrupt Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access Interrupt Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x0000002C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCOMP</name> |
| <description>Transmission Completed Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXRDY</name> |
| <description>Receive Holding Register Ready Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmit Holding Register Ready Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SVACC</name> |
| <description>Slave Access Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>GACC</name> |
| <description>General Call Access Interrupt Mask</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Mask</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Not Acknowledge Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ARBLST</name> |
| <description>Arbitration Lost Interrupt Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SCL_WS</name> |
| <description>Clock Wait State Interrupt Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOSACC</name> |
| <description>End Of Slave Access Interrupt Mask</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Mask</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Buffer Interrupt Mask</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Mask</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmit Buffer Empty Interrupt Mask</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RHR</name> |
| <description>Receive Holding Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXDATA</name> |
| <description>Master or Slave Receive Holding Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>THR</name> |
| <description>Transmit Holding Register</description> |
| <addressOffset>0x00000034</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXDATA</name> |
| <description>Master or Slave Transmit Holding Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>PWM</name> |
| <version>6044I</version> |
| <description>Pulse Width Modulation Controller</description> |
| <prependToName>PWM_</prependToName> |
| <baseAddress>0x40020000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_PWM</name> |
| <value>31</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>MR</name> |
| <description>PWM Mode Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>DIVA</name> |
| <description>CLKA, CLKB Divide Factor</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>CLK_OFF</name> |
| <description>CLKA, CLKB clock is turned off</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_DIV1</name> |
| <description>CLKA, CLKB clock is clock selected by PREA, PREB</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>PREA</name> |
| <bitOffset>8</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV2</name> |
| <description>Master Clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV4</name> |
| <description>Master Clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV8</name> |
| <description>Master Clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV16</name> |
| <description>Master Clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV32</name> |
| <description>Master Clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV64</name> |
| <description>Master Clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV128</name> |
| <description>Master Clock divided by 128</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV256</name> |
| <description>Master Clock divided by 256</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV512</name> |
| <description>Master Clock divided by 512</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV1024</name> |
| <description>Master Clock divided by 1024</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>DIVB</name> |
| <description>CLKA, CLKB Divide Factor</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>CLK_OFF</name> |
| <description>CLKA, CLKB clock is turned off</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_DIV1</name> |
| <description>CLKA, CLKB clock is clock selected by PREA, PREB</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>PREB</name> |
| <bitOffset>24</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV2</name> |
| <description>Master Clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV4</name> |
| <description>Master Clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV8</name> |
| <description>Master Clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV16</name> |
| <description>Master Clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV32</name> |
| <description>Master Clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV64</name> |
| <description>Master Clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV128</name> |
| <description>Master Clock divided by 128</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV256</name> |
| <description>Master Clock divided by 256</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV512</name> |
| <description>Master Clock divided by 512</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV1024</name> |
| <description>Master Clock divided by 1024</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ENA</name> |
| <description>PWM Enable Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>DIS</name> |
| <description>PWM Disable Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>PWM Status Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>PWM Interrupt Enable Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>PWM Interrupt Disable Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>PWM Interrupt Mask Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ISR</name> |
| <description>PWM Interrupt Status Register</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CHID0</name> |
| <description>Channel ID</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID1</name> |
| <description>Channel ID</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID2</name> |
| <description>Channel ID</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHID3</name> |
| <description>Channel ID</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR0</name> |
| <description>PWM Channel Mode Register (ch_num = 0)</description> |
| <addressOffset>0x00000200</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRE</name> |
| <description>Channel Pre-scaler</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV2</name> |
| <description>Master Clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV4</name> |
| <description>Master Clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV8</name> |
| <description>Master Clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV16</name> |
| <description>Master Clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV32</name> |
| <description>Master Clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV64</name> |
| <description>Master Clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV128</name> |
| <description>Master Clock divided by 128</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV256</name> |
| <description>Master Clock divided by 256</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV512</name> |
| <description>Master Clock divided by 512</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV1024</name> |
| <description>Master Clock divided by 1024</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKA</name> |
| <description>Clock A</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKB</name> |
| <description>Clock B</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CALG</name> |
| <description>Channel Alignment</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPOL</name> |
| <description>Channel Polarity</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPD</name> |
| <description>Channel Update Period</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CDTY0</name> |
| <description>PWM Channel Duty Cycle Register (ch_num = 0)</description> |
| <addressOffset>0x00000204</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CDTY</name> |
| <description>Channel Duty Cycle</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CPRD0</name> |
| <description>PWM Channel Period Register (ch_num = 0)</description> |
| <addressOffset>0x00000208</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRD</name> |
| <description>Channel Period</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCNT0</name> |
| <description>PWM Channel Counter Register (ch_num = 0)</description> |
| <addressOffset>0x0000020C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CNT</name> |
| <description>Channel Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CUPD0</name> |
| <description>PWM Channel Update Register (ch_num = 0)</description> |
| <addressOffset>0x00000210</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CUPD</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR1</name> |
| <description>PWM Channel Mode Register (ch_num = 1)</description> |
| <addressOffset>0x00000220</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRE</name> |
| <description>Channel Pre-scaler</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV2</name> |
| <description>Master Clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV4</name> |
| <description>Master Clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV8</name> |
| <description>Master Clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV16</name> |
| <description>Master Clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV32</name> |
| <description>Master Clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV64</name> |
| <description>Master Clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV128</name> |
| <description>Master Clock divided by 128</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV256</name> |
| <description>Master Clock divided by 256</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV512</name> |
| <description>Master Clock divided by 512</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV1024</name> |
| <description>Master Clock divided by 1024</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKA</name> |
| <description>Clock A</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKB</name> |
| <description>Clock B</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CALG</name> |
| <description>Channel Alignment</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPOL</name> |
| <description>Channel Polarity</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPD</name> |
| <description>Channel Update Period</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CDTY1</name> |
| <description>PWM Channel Duty Cycle Register (ch_num = 1)</description> |
| <addressOffset>0x00000224</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CDTY</name> |
| <description>Channel Duty Cycle</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CPRD1</name> |
| <description>PWM Channel Period Register (ch_num = 1)</description> |
| <addressOffset>0x00000228</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRD</name> |
| <description>Channel Period</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCNT1</name> |
| <description>PWM Channel Counter Register (ch_num = 1)</description> |
| <addressOffset>0x0000022C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CNT</name> |
| <description>Channel Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CUPD1</name> |
| <description>PWM Channel Update Register (ch_num = 1)</description> |
| <addressOffset>0x00000230</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CUPD</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR2</name> |
| <description>PWM Channel Mode Register (ch_num = 2)</description> |
| <addressOffset>0x00000240</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRE</name> |
| <description>Channel Pre-scaler</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV2</name> |
| <description>Master Clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV4</name> |
| <description>Master Clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV8</name> |
| <description>Master Clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV16</name> |
| <description>Master Clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV32</name> |
| <description>Master Clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV64</name> |
| <description>Master Clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV128</name> |
| <description>Master Clock divided by 128</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV256</name> |
| <description>Master Clock divided by 256</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV512</name> |
| <description>Master Clock divided by 512</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV1024</name> |
| <description>Master Clock divided by 1024</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKA</name> |
| <description>Clock A</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKB</name> |
| <description>Clock B</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CALG</name> |
| <description>Channel Alignment</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPOL</name> |
| <description>Channel Polarity</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPD</name> |
| <description>Channel Update Period</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CDTY2</name> |
| <description>PWM Channel Duty Cycle Register (ch_num = 2)</description> |
| <addressOffset>0x00000244</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CDTY</name> |
| <description>Channel Duty Cycle</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CPRD2</name> |
| <description>PWM Channel Period Register (ch_num = 2)</description> |
| <addressOffset>0x00000248</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRD</name> |
| <description>Channel Period</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCNT2</name> |
| <description>PWM Channel Counter Register (ch_num = 2)</description> |
| <addressOffset>0x0000024C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CNT</name> |
| <description>Channel Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CUPD2</name> |
| <description>PWM Channel Update Register (ch_num = 2)</description> |
| <addressOffset>0x00000250</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CUPD</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CMR3</name> |
| <description>PWM Channel Mode Register (ch_num = 3)</description> |
| <addressOffset>0x00000260</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRE</name> |
| <description>Channel Pre-scaler</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV2</name> |
| <description>Master Clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV4</name> |
| <description>Master Clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV8</name> |
| <description>Master Clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV16</name> |
| <description>Master Clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV32</name> |
| <description>Master Clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV64</name> |
| <description>Master Clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV128</name> |
| <description>Master Clock divided by 128</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV256</name> |
| <description>Master Clock divided by 256</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV512</name> |
| <description>Master Clock divided by 512</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCKDIV1024</name> |
| <description>Master Clock divided by 1024</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKA</name> |
| <description>Clock A</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLKB</name> |
| <description>Clock B</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CALG</name> |
| <description>Channel Alignment</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPOL</name> |
| <description>Channel Polarity</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPD</name> |
| <description>Channel Update Period</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CDTY3</name> |
| <description>PWM Channel Duty Cycle Register (ch_num = 3)</description> |
| <addressOffset>0x00000264</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CDTY</name> |
| <description>Channel Duty Cycle</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CPRD3</name> |
| <description>PWM Channel Period Register (ch_num = 3)</description> |
| <addressOffset>0x00000268</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CPRD</name> |
| <description>Channel Period</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCNT3</name> |
| <description>PWM Channel Counter Register (ch_num = 3)</description> |
| <addressOffset>0x0000026C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CNT</name> |
| <description>Channel Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CUPD3</name> |
| <description>PWM Channel Update Register (ch_num = 3)</description> |
| <addressOffset>0x00000270</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CUPD</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>USART0</name> |
| <version>6089W</version> |
| <description>Universal Synchronous Asynchronous Receiver Transmitter 0</description> |
| <groupName>USART</groupName> |
| <prependToName>USART0_</prependToName> |
| <baseAddress>0x40024000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_USART0</name> |
| <value>14</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RSTRX</name> |
| <description>Reset Receiver</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTTX</name> |
| <description>Reset Transmitter</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXEN</name> |
| <description>Receiver Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXDIS</name> |
| <description>Receiver Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEN</name> |
| <description>Transmitter Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXDIS</name> |
| <description>Transmitter Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTSTA</name> |
| <description>Reset Status Bits</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>STTBRK</name> |
| <description>Start Break</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>STPBRK</name> |
| <description>Stop Break</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>STTTO</name> |
| <description>Start Time-out</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SENDA</name> |
| <description>Send Address</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTIT</name> |
| <description>Reset Iterations</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTNACK</name> |
| <description>Reset Non Acknowledge</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RETTO</name> |
| <description>Rearm Time-out</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RTSEN</name> |
| <description>Request to Send Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FCS</name> |
| <description>Force SPI Chip Select</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RTSDIS</name> |
| <description>Request to Send Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RCS</name> |
| <description>Release SPI Chip Select</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>USART_MODE</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NORMAL</name> |
| <description>Normal mode</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>RS485</name> |
| <description>RS485</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>HW_HANDSHAKING</name> |
| <description>Hardware Handshaking</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>IS07816_T_0</name> |
| <description>IS07816 Protocol: T = 0</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>IS07816_T_1</name> |
| <description>IS07816 Protocol: T = 1</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>IRDA</name> |
| <description>IrDA</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SPI_MASTER</name> |
| <description>SPI Master</description> |
| <value>0xE</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SPI_SLAVE</name> |
| <description>SPI Slave</description> |
| <value>0xF</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>USCLKS</name> |
| <description>Clock Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock MCK is selected</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>DIV</name> |
| <description>Internal Clock Divided MCK/DIV (DIV=8) is selected</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SCK</name> |
| <description>Serial Clock SLK is selected</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CHRL</name> |
| <description>Character Length.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>5_BIT</name> |
| <description>Character length is 5 bits</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>6_BIT</name> |
| <description>Character length is 6 bits</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>7_BIT</name> |
| <description>Character length is 7 bits</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>8_BIT</name> |
| <description>Character length is 8 bits</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SYNC</name> |
| <description>Synchronous Mode Select</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPHA</name> |
| <description>SPI Clock Phase</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>PAR</name> |
| <description>Parity Type</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>EVEN</name> |
| <description>Even parity</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ODD</name> |
| <description>Odd parity</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SPACE</name> |
| <description>Parity forced to 0 (Space)</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MARK</name> |
| <description>Parity forced to 1 (Mark)</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>No parity</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MULTIDROP</name> |
| <description>Multidrop mode</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>NBSTOP</name> |
| <description>Number of Stop Bits</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>1_BIT</name> |
| <description>1 stop bit</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>1_5_BIT</name> |
| <description>1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_BIT</name> |
| <description>2 stop bits</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CHMODE</name> |
| <description>Channel Mode</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NORMAL</name> |
| <description>Normal Mode</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AUTOMATIC</name> |
| <description>Automatic Echo. Receiver input is connected to the TXD pin.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOCAL_LOOPBACK</name> |
| <description>Local Loopback. Transmitter output is connected to the Receiver Input.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>REMOTE_LOOPBACK</name> |
| <description>Remote Loopback. RXD pin is internally connected to the TXD pin.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>MSBF</name> |
| <description>Bit Order</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CPOL</name> |
| <description>SPI Clock Polarity</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MODE9</name> |
| <description>9-bit Character Length</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CLKO</name> |
| <description>Clock Output Select</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>OVER</name> |
| <description>Oversampling Mode</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>INACK</name> |
| <description>Inhibit Non Acknowledge</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DSNACK</name> |
| <description>Disable Successive NACK</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>INVDATA</name> |
| <description>INverted Data</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MAX_ITERATION</name> |
| <bitOffset>24</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FILTER</name> |
| <description>Infrared Receive Line Filter</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>RXRDY Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>TXRDY Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBRK</name> |
| <description>Receiver Break Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Transfer Interrupt Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Framing Error Interrupt Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Parity Error Interrupt Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TIMEOUT</name> |
| <description>Time-out Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>TXEMPTY Interrupt Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ITER</name> |
| <description>Max number of Repetitions Reached</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>UNRE</name> |
| <description>SPI Underrun Error</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Buffer Full Interrupt Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Non AcknowledgeInterrupt Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CTSIC</name> |
| <description>Clear to Send Input Change Interrupt Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>RXRDY Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>TXRDY Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBRK</name> |
| <description>Receiver Break Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Transfer Interrupt Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Framing Error Interrupt Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Parity Error Interrupt Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TIMEOUT</name> |
| <description>Time-out Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>TXEMPTY Interrupt Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ITER</name> |
| <description>Max number of Repetitions Reached Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>UNRE</name> |
| <description>SPI Underrun Error Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Buffer Full Interrupt Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Non AcknowledgeInterrupt Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CTSIC</name> |
| <description>Clear to Send Input Change Interrupt Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>RXRDY Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>TXRDY Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBRK</name> |
| <description>Receiver Break Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Transfer Interrupt Mask</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmit Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error Interrupt Mask</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Framing Error Interrupt Mask</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Parity Error Interrupt Mask</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TIMEOUT</name> |
| <description>Time-out Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>TXEMPTY Interrupt Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ITER</name> |
| <description>Max number of Repetitions Reached Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>UNRE</name> |
| <description>SPI Underrun Error Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Mask</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Buffer Full Interrupt Mask</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Non AcknowledgeInterrupt Mask</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CTSIC</name> |
| <description>Clear to Send Input Change Interrupt Mask</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CSR</name> |
| <description>Channel Status Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Receiver Ready</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmitter Ready</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBRK</name> |
| <description>Break Received/End of Break</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receiver Transfer</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmitter Transfer</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Framing Error</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Parity Error</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TIMEOUT</name> |
| <description>Receiver Time-out</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmitter Empty</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ITER</name> |
| <description>Max number of Repetitions Reached</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>UNRE</name> |
| <description>SPI Underrun Error</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmission Buffer Empty</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Reception Buffer Full</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NACK</name> |
| <description>Non AcknowledgeInterrupt</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CTSIC</name> |
| <description>Clear to Send Input Change Flag</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CTS</name> |
| <description>Image of CTS Input</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RHR</name> |
| <description>Receiver Holding Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCHR</name> |
| <description>Received Character</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>9</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXSYNH</name> |
| <description>Received Sync</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>THR</name> |
| <description>Transmitter Holding Register</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCHR</name> |
| <description>Character to be Transmitted</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>9</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXSYNH</name> |
| <description>Sync Field to be transmitted</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>BRGR</name> |
| <description>Baud Rate Generator Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CD</name> |
| <description>Clock Divider</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FP</name> |
| <description>Fractional Part</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RTOR</name> |
| <description>Receiver Time-out Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TO</name> |
| <description>Time-out Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TTGR</name> |
| <description>Transmitter Timeguard Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TG</name> |
| <description>Timeguard Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FIDI</name> |
| <description>FI DI Ratio Register</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000174</resetValue> |
| <fields> |
| <field> |
| <name>FI_DI_RATIO</name> |
| <description>FI Over DI Ratio Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>11</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>NER</name> |
| <description>Number of Errors Register</description> |
| <addressOffset>0x00000044</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>NB_ERRORS</name> |
| <description>Number of Errors</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IF</name> |
| <description>IrDA Filter Register</description> |
| <addressOffset>0x0000004C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>IRDA_FILTER</name> |
| <description>IrDA Filter</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protect Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protect Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RPR</name> |
| <description>Receive Pointer Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXPTR</name> |
| <description>Receive Pointer Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RCR</name> |
| <description>Receive Counter Register</description> |
| <addressOffset>0x00000104</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCTR</name> |
| <description>Receive Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TPR</name> |
| <description>Transmit Pointer Register</description> |
| <addressOffset>0x00000108</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXPTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TCR</name> |
| <description>Transmit Counter Register</description> |
| <addressOffset>0x0000010C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNPR</name> |
| <description>Receive Next Pointer Register</description> |
| <addressOffset>0x00000110</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNPTR</name> |
| <description>Receive Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNCR</name> |
| <description>Receive Next Counter Register</description> |
| <addressOffset>0x00000114</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNCTR</name> |
| <description>Receive Next Counter</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNPR</name> |
| <description>Transmit Next Pointer Register</description> |
| <addressOffset>0x00000118</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNPTR</name> |
| <description>Transmit Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNCR</name> |
| <description>Transmit Next Counter Register</description> |
| <addressOffset>0x0000011C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNCTR</name> |
| <description>Transmit Counter Next</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTCR</name> |
| <description>Transfer Control Register</description> |
| <addressOffset>0x00000120</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXTDIS</name> |
| <description>Receiver Transfer Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTDIS</name> |
| <description>Transmitter Transfer Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTSR</name> |
| <description>Transfer Status Register</description> |
| <addressOffset>0x00000124</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>ADC</name> |
| <version>6489I</version> |
| <description>Analog-to-digital Converter</description> |
| <prependToName>ADC_</prependToName> |
| <baseAddress>0x40038000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_ADC</name> |
| <value>29</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>SWRST</name> |
| <description>Software Reset</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>START</name> |
| <description>Start Conversion</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TRGEN</name> |
| <description>Trigger Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>Hardware triggers are disabled. Starting a conversion is only possible by software.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>Hardware trigger selected by TRGSEL field is enabled.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>TRGSEL</name> |
| <description>Trigger Selection</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>ADC_TRIG0</name> |
| <description>External trigger</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ADC_TRIG1</name> |
| <description>TIO Output of the Timer Counter Channel 0</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ADC_TRIG2</name> |
| <description>TIO Output of the Timer Counter Channel 1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ADC_TRIG3</name> |
| <description>TIO Output of the Timer Counter Channel 2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>LOWRES</name> |
| <description>Resolution</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>BITS_10</name> |
| <description>10-bit resolution</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>BITS_8</name> |
| <description>8-bit resolution</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SLEEP</name> |
| <description>Sleep Mode</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NORMAL</name> |
| <description>Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SLEEP</name> |
| <description>Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>FWUP</name> |
| <description>Fast Wake Up</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>OFF</name> |
| <description>Normal Sleep Mode: The sleep mode is defined by the SLEEP bit</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ON</name> |
| <description>Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>FREERUN</name> |
| <description>Free Run Mode</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>OFF</name> |
| <description>Normal Mode</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ON</name> |
| <description>Free Run Mode: Never wait for any trigger.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>PRESCAL</name> |
| <description>Prescaler Rate Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>STARTUP</name> |
| <description>Start Up Time</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>SUT0</name> |
| <description>0 periods of ADCClock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT8</name> |
| <description>8 periods of ADCClock</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT16</name> |
| <description>16 periods of ADCClock</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT24</name> |
| <description>24 periods of ADCClock</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT64</name> |
| <description>64 periods of ADCClock</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT80</name> |
| <description>80 periods of ADCClock</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT96</name> |
| <description>96 periods of ADCClock</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT112</name> |
| <description>112 periods of ADCClock</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT512</name> |
| <description>512 periods of ADCClock</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT576</name> |
| <description>576 periods of ADCClock</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT640</name> |
| <description>640 periods of ADCClock</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT704</name> |
| <description>704 periods of ADCClock</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT768</name> |
| <description>768 periods of ADCClock</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT832</name> |
| <description>832 periods of ADCClock</description> |
| <value>0xD</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT896</name> |
| <description>896 periods of ADCClock</description> |
| <value>0xE</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SUT960</name> |
| <description>960 periods of ADCClock</description> |
| <value>0xF</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>TRACKTIM</name> |
| <description>Tracking Time</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USEQ</name> |
| <description>Use Sequence Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NUM_ORDER</name> |
| <description>Normal Mode: The controller converts channels in a simple numeric order.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>REG_ORDER</name> |
| <description>User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SEQR1</name> |
| <description>Channel Sequence Register 1</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>USCH1</name> |
| <description>User Sequence Number 1</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH2</name> |
| <description>User Sequence Number 2</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH3</name> |
| <description>User Sequence Number 3</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH4</name> |
| <description>User Sequence Number 4</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH5</name> |
| <description>User Sequence Number 5</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH6</name> |
| <description>User Sequence Number 6</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH7</name> |
| <description>User Sequence Number 7</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH8</name> |
| <description>User Sequence Number 8</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SEQR2</name> |
| <description>Channel Sequence Register 2</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>USCH9</name> |
| <description>User Sequence Number 9</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH10</name> |
| <description>User Sequence Number 10</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH11</name> |
| <description>User Sequence Number 11</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH12</name> |
| <description>User Sequence Number 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH13</name> |
| <description>User Sequence Number 13</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH14</name> |
| <description>User Sequence Number 14</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH15</name> |
| <description>User Sequence Number 15</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>USCH16</name> |
| <description>User Sequence Number 16</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CHER</name> |
| <description>Channel Enable Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CH0</name> |
| <description>Channel 0 Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH1</name> |
| <description>Channel 1 Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH2</name> |
| <description>Channel 2 Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH3</name> |
| <description>Channel 3 Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH4</name> |
| <description>Channel 4 Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH5</name> |
| <description>Channel 5 Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH6</name> |
| <description>Channel 6 Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH7</name> |
| <description>Channel 7 Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH8</name> |
| <description>Channel 8 Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH9</name> |
| <description>Channel 9 Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH10</name> |
| <description>Channel 10 Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH11</name> |
| <description>Channel 11 Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH12</name> |
| <description>Channel 12 Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH13</name> |
| <description>Channel 13 Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH14</name> |
| <description>Channel 14 Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH15</name> |
| <description>Channel 15 Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CHDR</name> |
| <description>Channel Disable Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>CH0</name> |
| <description>Channel 0 Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH1</name> |
| <description>Channel 1 Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH2</name> |
| <description>Channel 2 Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH3</name> |
| <description>Channel 3 Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH4</name> |
| <description>Channel 4 Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH5</name> |
| <description>Channel 5 Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH6</name> |
| <description>Channel 6 Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH7</name> |
| <description>Channel 7 Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH8</name> |
| <description>Channel 8 Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH9</name> |
| <description>Channel 9 Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH10</name> |
| <description>Channel 10 Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH11</name> |
| <description>Channel 11 Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH12</name> |
| <description>Channel 12 Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH13</name> |
| <description>Channel 13 Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH14</name> |
| <description>Channel 14 Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CH15</name> |
| <description>Channel 15 Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CHSR</name> |
| <description>Channel Status Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CH0</name> |
| <description>Channel 0 Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH1</name> |
| <description>Channel 1 Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH2</name> |
| <description>Channel 2 Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH3</name> |
| <description>Channel 3 Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH4</name> |
| <description>Channel 4 Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH5</name> |
| <description>Channel 5 Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH6</name> |
| <description>Channel 6 Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH7</name> |
| <description>Channel 7 Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH8</name> |
| <description>Channel 8 Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH9</name> |
| <description>Channel 9 Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH10</name> |
| <description>Channel 10 Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH11</name> |
| <description>Channel 11 Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH12</name> |
| <description>Channel 12 Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH13</name> |
| <description>Channel 13 Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH14</name> |
| <description>Channel 14 Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CH15</name> |
| <description>Channel 15 Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>LCDR</name> |
| <description>Last Converted Data Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>LDATA</name> |
| <description>Last Data Converted</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>12</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CHNB</name> |
| <description>Channel Number</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>EOC0</name> |
| <description>End of Conversion Interrupt Enable 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC1</name> |
| <description>End of Conversion Interrupt Enable 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC2</name> |
| <description>End of Conversion Interrupt Enable 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC3</name> |
| <description>End of Conversion Interrupt Enable 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC4</name> |
| <description>End of Conversion Interrupt Enable 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC5</name> |
| <description>End of Conversion Interrupt Enable 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC6</name> |
| <description>End of Conversion Interrupt Enable 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC7</name> |
| <description>End of Conversion Interrupt Enable 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC8</name> |
| <description>End of Conversion Interrupt Enable 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC9</name> |
| <description>End of Conversion Interrupt Enable 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC10</name> |
| <description>End of Conversion Interrupt Enable 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC11</name> |
| <description>End of Conversion Interrupt Enable 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC12</name> |
| <description>End of Conversion Interrupt Enable 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC13</name> |
| <description>End of Conversion Interrupt Enable 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC14</name> |
| <description>End of Conversion Interrupt Enable 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC15</name> |
| <description>End of Conversion Interrupt Enable 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>DRDY</name> |
| <description>Data Ready Interrupt Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>GOVRE</name> |
| <description>General Overrun Error Interrupt Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>COMPE</name> |
| <description>Comparison Event Interrupt Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>EOC0</name> |
| <description>End of Conversion Interrupt Disable 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC1</name> |
| <description>End of Conversion Interrupt Disable 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC2</name> |
| <description>End of Conversion Interrupt Disable 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC3</name> |
| <description>End of Conversion Interrupt Disable 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC4</name> |
| <description>End of Conversion Interrupt Disable 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC5</name> |
| <description>End of Conversion Interrupt Disable 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC6</name> |
| <description>End of Conversion Interrupt Disable 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC7</name> |
| <description>End of Conversion Interrupt Disable 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC8</name> |
| <description>End of Conversion Interrupt Disable 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC9</name> |
| <description>End of Conversion Interrupt Disable 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC10</name> |
| <description>End of Conversion Interrupt Disable 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC11</name> |
| <description>End of Conversion Interrupt Disable 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC12</name> |
| <description>End of Conversion Interrupt Disable 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC13</name> |
| <description>End of Conversion Interrupt Disable 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC14</name> |
| <description>End of Conversion Interrupt Disable 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EOC15</name> |
| <description>End of Conversion Interrupt Disable 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>DRDY</name> |
| <description>Data Ready Interrupt Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>GOVRE</name> |
| <description>General Overrun Error Interrupt Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>COMPE</name> |
| <description>Comparison Event Interrupt Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x0000002C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>EOC0</name> |
| <description>End of Conversion Interrupt Mask 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC1</name> |
| <description>End of Conversion Interrupt Mask 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC2</name> |
| <description>End of Conversion Interrupt Mask 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC3</name> |
| <description>End of Conversion Interrupt Mask 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC4</name> |
| <description>End of Conversion Interrupt Mask 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC5</name> |
| <description>End of Conversion Interrupt Mask 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC6</name> |
| <description>End of Conversion Interrupt Mask 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC7</name> |
| <description>End of Conversion Interrupt Mask 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC8</name> |
| <description>End of Conversion Interrupt Mask 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC9</name> |
| <description>End of Conversion Interrupt Mask 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC10</name> |
| <description>End of Conversion Interrupt Mask 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC11</name> |
| <description>End of Conversion Interrupt Mask 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC12</name> |
| <description>End of Conversion Interrupt Mask 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC13</name> |
| <description>End of Conversion Interrupt Mask 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC14</name> |
| <description>End of Conversion Interrupt Mask 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC15</name> |
| <description>End of Conversion Interrupt Mask 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>DRDY</name> |
| <description>Data Ready Interrupt Mask</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>GOVRE</name> |
| <description>General Overrun Error Interrupt Mask</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>COMPE</name> |
| <description>Comparison Event Interrupt Mask</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receive Buffer Interrupt Mask</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full Interrupt Mask</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ISR</name> |
| <description>Interrupt Status Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>EOC0</name> |
| <description>End of Conversion 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC1</name> |
| <description>End of Conversion 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC2</name> |
| <description>End of Conversion 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC3</name> |
| <description>End of Conversion 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC4</name> |
| <description>End of Conversion 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC5</name> |
| <description>End of Conversion 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC6</name> |
| <description>End of Conversion 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC7</name> |
| <description>End of Conversion 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC8</name> |
| <description>End of Conversion 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC9</name> |
| <description>End of Conversion 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC10</name> |
| <description>End of Conversion 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC11</name> |
| <description>End of Conversion 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC12</name> |
| <description>End of Conversion 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC13</name> |
| <description>End of Conversion 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC14</name> |
| <description>End of Conversion 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EOC15</name> |
| <description>End of Conversion 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>DRDY</name> |
| <description>Data Ready</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>GOVRE</name> |
| <description>General Overrun Error</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>COMPE</name> |
| <description>Comparison Error</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of RX Buffer</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>RX Buffer Full</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OVER</name> |
| <description>Overrun Status Register</description> |
| <addressOffset>0x0000003C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>OVRE0</name> |
| <description>Overrun Error 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE1</name> |
| <description>Overrun Error 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE2</name> |
| <description>Overrun Error 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE3</name> |
| <description>Overrun Error 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE4</name> |
| <description>Overrun Error 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE5</name> |
| <description>Overrun Error 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE6</name> |
| <description>Overrun Error 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE7</name> |
| <description>Overrun Error 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE8</name> |
| <description>Overrun Error 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE9</name> |
| <description>Overrun Error 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE10</name> |
| <description>Overrun Error 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE11</name> |
| <description>Overrun Error 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE12</name> |
| <description>Overrun Error 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE13</name> |
| <description>Overrun Error 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE14</name> |
| <description>Overrun Error 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE15</name> |
| <description>Overrun Error 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>EMR</name> |
| <description>Extended Mode Register</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CMPMODE</name> |
| <description>Comparison Mode</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>LOW</name> |
| <description>Generates an event when the converted data is lower than the low threshold of the window.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>HIGH</name> |
| <description>Generates an event when the converted data is higher than the high threshold of the window.</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>IN</name> |
| <description>Generates an event when the converted data is in the comparison window.</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>OUT</name> |
| <description>Generates an event when the converted data is out of the comparison window.</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CMPSEL</name> |
| <description>Comparison Selected Channel</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CMPALL</name> |
| <description>Compare All Channels</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>TAG</name> |
| <description>TAG of ADC_LDCR register</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CWR</name> |
| <description>Compare Window Register</description> |
| <addressOffset>0x00000044</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>LOWTHRES</name> |
| <description>Low Threshold</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>12</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>HIGHTHRES</name> |
| <description>High Threshold</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>12</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <dim>16</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-15</dimIndex> |
| <name>CDR%s</name> |
| <description>Channel Data Register</description> |
| <addressOffset>0x00000050</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>DATA</name> |
| <description>Converted Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>12</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protect Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protect Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RPR</name> |
| <description>Receive Pointer Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXPTR</name> |
| <description>Receive Pointer Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RCR</name> |
| <description>Receive Counter Register</description> |
| <addressOffset>0x00000104</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCTR</name> |
| <description>Receive Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNPR</name> |
| <description>Receive Next Pointer Register</description> |
| <addressOffset>0x00000110</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNPTR</name> |
| <description>Receive Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNCR</name> |
| <description>Receive Next Counter Register</description> |
| <addressOffset>0x00000114</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNCTR</name> |
| <description>Receive Next Counter</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTCR</name> |
| <description>Transfer Control Register</description> |
| <addressOffset>0x00000120</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXTDIS</name> |
| <description>Receiver Transfer Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTDIS</name> |
| <description>Transmitter Transfer Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTSR</name> |
| <description>Transfer Status Register</description> |
| <addressOffset>0x00000124</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>DACC</name> |
| <version>11025A</version> |
| <description>Digital-to-Analog Converter Controller</description> |
| <prependToName>DACC_</prependToName> |
| <baseAddress>0x4003C000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x4000</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_DACC</name> |
| <value>30</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>SWRST</name> |
| <description>Software Reset</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TRGEN</name> |
| <description>Trigger Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>TRGSEL</name> |
| <description>Trigger Selection</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>TRGSEL0</name> |
| <description>External trigger</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TRGSEL1</name> |
| <description>TIO Output of the Timer Counter Channel 0</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TRGSEL2</name> |
| <description>TIO Output of the Timer Counter Channel 1</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>TRGSEL3</name> |
| <description>TIO Output of the Timer Counter Channel 2</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>DACEN</name> |
| <description>DAC enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WORD</name> |
| <description>Word Transfer</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>STARTUP</name> |
| <description>Startup Time Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CLKDIV</name> |
| <description>DAC Clock Divider for Internal Trigger</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CDR</name> |
| <description>Conversion Data Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>DATA</name> |
| <description>Data to Convert</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmission Ready Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of PDC Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmission Ready Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of PDC Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmission Ready Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of PDC Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ISR</name> |
| <description>Interrupt Status Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmission Ready Interrupt Flag</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of PDC Interrupt Flag</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Buffer Empty Interrupt Flag</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPROTERR</name> |
| <description>Write protection error</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPROTADDR</name> |
| <description>Write protection error address</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TPR</name> |
| <description>Transmit Pointer Register</description> |
| <addressOffset>0x00000108</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXPTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TCR</name> |
| <description>Transmit Counter Register</description> |
| <addressOffset>0x0000010C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNPR</name> |
| <description>Transmit Next Pointer Register</description> |
| <addressOffset>0x00000118</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNPTR</name> |
| <description>Transmit Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNCR</name> |
| <description>Transmit Next Counter Register</description> |
| <addressOffset>0x0000011C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNCTR</name> |
| <description>Transmit Counter Next</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTCR</name> |
| <description>Transfer Control Register</description> |
| <addressOffset>0x00000120</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXTDIS</name> |
| <description>Receiver Transfer Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTDIS</name> |
| <description>Transmitter Transfer Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTSR</name> |
| <description>Transfer Status Register</description> |
| <addressOffset>0x00000124</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>MATRIX</name> |
| <version>11049A</version> |
| <description>AHB Bus Matrix</description> |
| <baseAddress>0x400E0200</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <dim>3</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-2</dimIndex> |
| <name>MATRIX_MCFG%s</name> |
| <description>Master Configuration Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>ULBT</name> |
| <description>Undefined Length Burst Type</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <dim>4</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-3</dimIndex> |
| <name>MATRIX_SCFG%s</name> |
| <description>Slave Configuration Register</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>SLOT_CYCLE</name> |
| <description>Maximum Number of Allowed Cycles for a Burst</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DEFMSTR_TYPE</name> |
| <description>Default Master Type</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FIXED_DEFMSTR</name> |
| <description>Fixed Default Master</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ARBT</name> |
| <description>Arbitration Type</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MATRIX_PRAS0</name> |
| <description>Priority Register A for Slave 0</description> |
| <addressOffset>0x00000080</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>M0PR</name> |
| <description>Master 0 Priority</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M1PR</name> |
| <description>Master 1 Priority</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M2PR</name> |
| <description>Master 2 Priority</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M3PR</name> |
| <description>Master 3 Priority</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MATRIX_PRAS1</name> |
| <description>Priority Register A for Slave 1</description> |
| <addressOffset>0x00000088</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>M0PR</name> |
| <description>Master 0 Priority</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M1PR</name> |
| <description>Master 1 Priority</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M2PR</name> |
| <description>Master 2 Priority</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M3PR</name> |
| <description>Master 3 Priority</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MATRIX_PRAS2</name> |
| <description>Priority Register A for Slave 2</description> |
| <addressOffset>0x00000090</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>M0PR</name> |
| <description>Master 0 Priority</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M1PR</name> |
| <description>Master 1 Priority</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M2PR</name> |
| <description>Master 2 Priority</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M3PR</name> |
| <description>Master 3 Priority</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MATRIX_PRAS3</name> |
| <description>Priority Register A for Slave 3</description> |
| <addressOffset>0x00000098</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>M0PR</name> |
| <description>Master 0 Priority</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M1PR</name> |
| <description>Master 1 Priority</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M2PR</name> |
| <description>Master 2 Priority</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>M3PR</name> |
| <description>Master 3 Priority</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CCFG_SYSIO</name> |
| <description>System I/O Configuration register</description> |
| <addressOffset>0x00000114</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SYSIO4</name> |
| <description>PB4 or TDI Assignment</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SYSIO5</name> |
| <description>PB5 or TDO/TRACESWO Assignment</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SYSIO6</name> |
| <description>PB6 or TMS/SWDIO Assignment</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SYSIO7</name> |
| <description>PB7 or TCK/SWCLK Assignment</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SYSIO12</name> |
| <description>PB12 or ERASE Assignment</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MATRIX_WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000001E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect ENable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY (Write-only)</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MATRIX_WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000001E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protect Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protect Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>PMC</name> |
| <version>11116C</version> |
| <description>Power Management Controller</description> |
| <baseAddress>0x400E0400</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x140</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_PMC</name> |
| <value>5</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>PMC_SCER</name> |
| <description>System Clock Enable Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>PCK0</name> |
| <description>Programmable Clock 0 Output Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCK1</name> |
| <description>Programmable Clock 1 Output Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCK2</name> |
| <description>Programmable Clock 2 Output Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_SCDR</name> |
| <description>System Clock Disable Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>PCK0</name> |
| <description>Programmable Clock 0 Output Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCK1</name> |
| <description>Programmable Clock 1 Output Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCK2</name> |
| <description>Programmable Clock 2 Output Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_SCSR</name> |
| <description>System Clock Status Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000001</resetValue> |
| <fields> |
| <field> |
| <name>PCK0</name> |
| <description>Programmable Clock 0 Output Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCK1</name> |
| <description>Programmable Clock 1 Output Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCK2</name> |
| <description>Programmable Clock 2 Output Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_PCER0</name> |
| <description>Peripheral Clock Enable Register 0</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>PID2</name> |
| <description>Peripheral Clock 2 Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID3</name> |
| <description>Peripheral Clock 3 Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID4</name> |
| <description>Peripheral Clock 4 Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID5</name> |
| <description>Peripheral Clock 5 Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID6</name> |
| <description>Peripheral Clock 6 Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID7</name> |
| <description>Peripheral Clock 7 Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID8</name> |
| <description>Peripheral Clock 8 Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID9</name> |
| <description>Peripheral Clock 9 Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID10</name> |
| <description>Peripheral Clock 10 Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID11</name> |
| <description>Peripheral Clock 11 Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID12</name> |
| <description>Peripheral Clock 12 Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID13</name> |
| <description>Peripheral Clock 13 Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID14</name> |
| <description>Peripheral Clock 14 Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID15</name> |
| <description>Peripheral Clock 15 Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID19</name> |
| <description>Peripheral Clock 19 Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID20</name> |
| <description>Peripheral Clock 20 Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID21</name> |
| <description>Peripheral Clock 21 Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID23</name> |
| <description>Peripheral Clock 23 Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID24</name> |
| <description>Peripheral Clock 24 Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID25</name> |
| <description>Peripheral Clock 25 Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID26</name> |
| <description>Peripheral Clock 26 Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID27</name> |
| <description>Peripheral Clock 27 Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID28</name> |
| <description>Peripheral Clock 28 Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID29</name> |
| <description>Peripheral Clock 29 Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID30</name> |
| <description>Peripheral Clock 30 Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID31</name> |
| <description>Peripheral Clock 31 Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_PCDR0</name> |
| <description>Peripheral Clock Disable Register 0</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>PID2</name> |
| <description>Peripheral Clock 2 Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID3</name> |
| <description>Peripheral Clock 3 Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID4</name> |
| <description>Peripheral Clock 4 Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID5</name> |
| <description>Peripheral Clock 5 Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID6</name> |
| <description>Peripheral Clock 6 Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID7</name> |
| <description>Peripheral Clock 7 Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID8</name> |
| <description>Peripheral Clock 8 Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID9</name> |
| <description>Peripheral Clock 9 Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID10</name> |
| <description>Peripheral Clock 10 Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID11</name> |
| <description>Peripheral Clock 11 Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID12</name> |
| <description>Peripheral Clock 12 Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID13</name> |
| <description>Peripheral Clock 13 Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID14</name> |
| <description>Peripheral Clock 14 Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID15</name> |
| <description>Peripheral Clock 15 Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID19</name> |
| <description>Peripheral Clock 19 Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID20</name> |
| <description>Peripheral Clock 20 Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID21</name> |
| <description>Peripheral Clock 21 Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID23</name> |
| <description>Peripheral Clock 23 Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID24</name> |
| <description>Peripheral Clock 24 Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID25</name> |
| <description>Peripheral Clock 25 Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID26</name> |
| <description>Peripheral Clock 26 Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID27</name> |
| <description>Peripheral Clock 27 Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID28</name> |
| <description>Peripheral Clock 28 Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID29</name> |
| <description>Peripheral Clock 29 Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID30</name> |
| <description>Peripheral Clock 30 Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PID31</name> |
| <description>Peripheral Clock 31 Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_PCSR0</name> |
| <description>Peripheral Clock Status Register 0</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>PID2</name> |
| <description>Peripheral Clock 2 Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID3</name> |
| <description>Peripheral Clock 3 Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID4</name> |
| <description>Peripheral Clock 4 Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID5</name> |
| <description>Peripheral Clock 5 Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID6</name> |
| <description>Peripheral Clock 6 Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID7</name> |
| <description>Peripheral Clock 7 Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID8</name> |
| <description>Peripheral Clock 8 Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID9</name> |
| <description>Peripheral Clock 9 Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID10</name> |
| <description>Peripheral Clock 10 Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID11</name> |
| <description>Peripheral Clock 11 Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID12</name> |
| <description>Peripheral Clock 12 Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID13</name> |
| <description>Peripheral Clock 13 Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID14</name> |
| <description>Peripheral Clock 14 Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID15</name> |
| <description>Peripheral Clock 15 Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID19</name> |
| <description>Peripheral Clock 19 Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID20</name> |
| <description>Peripheral Clock 20 Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID21</name> |
| <description>Peripheral Clock 21 Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID23</name> |
| <description>Peripheral Clock 23 Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID24</name> |
| <description>Peripheral Clock 24 Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID25</name> |
| <description>Peripheral Clock 25 Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID26</name> |
| <description>Peripheral Clock 26 Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID27</name> |
| <description>Peripheral Clock 27 Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID28</name> |
| <description>Peripheral Clock 28 Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID29</name> |
| <description>Peripheral Clock 29 Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID30</name> |
| <description>Peripheral Clock 30 Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PID31</name> |
| <description>Peripheral Clock 31 Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CKGR_MOR</name> |
| <description>Main Oscillator Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000001</resetValue> |
| <fields> |
| <field> |
| <name>MOSCXTEN</name> |
| <description>Main Crystal Oscillator Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MOSCXTBY</name> |
| <description>Main Crystal Oscillator Bypass</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MOSCRCEN</name> |
| <description>Main On-Chip RC Oscillator Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MOSCRCF</name> |
| <description>Main On-Chip RC Oscillator Frequency Selection</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>4_MHz</name> |
| <description>The Fast RC Oscillator Frequency is at 4 MHz (default)</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>8_MHz</name> |
| <description>The Fast RC Oscillator Frequency is at 8 MHz</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>12_MHz</name> |
| <description>The Fast RC Oscillator Frequency is at 12 MHz</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>MOSCXTST</name> |
| <description>Main Crystal Oscillator Start-up Time</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>KEY</name> |
| <description>Password</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MOSCSEL</name> |
| <description>Main Oscillator Selection</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>CFDEN</name> |
| <description>Clock Failure Detector Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CKGR_MCFR</name> |
| <description>Main Clock Frequency Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>MAINF</name> |
| <description>Main Clock Frequency</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MAINFRDY</name> |
| <description>Main Clock Ready</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CKGR_PLLAR</name> |
| <description>PLLA Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00003F00</resetValue> |
| <fields> |
| <field> |
| <name>DIVA</name> |
| <description>Divider</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>PLLACOUNT</name> |
| <description>PLLA Counter</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>6</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MULA</name> |
| <description>PLLA Multiplier</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>11</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ONE</name> |
| <description>Must Be Set to 1</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_MCKR</name> |
| <description>Master Clock Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000001</resetValue> |
| <fields> |
| <field> |
| <name>CSS</name> |
| <description>Master Clock Source Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>SLOW_CLK</name> |
| <description>Slow Clock is selected</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MAIN_CLK</name> |
| <description>Main Clock is selected</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PLLA_CLK</name> |
| <description>PLLA Clock is selected</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>PRES</name> |
| <description>Processor Clock Prescaler</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>CLK_1</name> |
| <description>Selected clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_2</name> |
| <description>Selected clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_4</name> |
| <description>Selected clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_8</name> |
| <description>Selected clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_16</name> |
| <description>Selected clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_32</name> |
| <description>Selected clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_64</name> |
| <description>Selected clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_3</name> |
| <description>Selected clock divided by 3</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>PLLADIV2</name> |
| <description>PLLA Divisor by 2</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <dim>3</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-2</dimIndex> |
| <name>PMC_PCK%s</name> |
| <description>Programmable Clock 0 Register</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>CSS</name> |
| <description>Master Clock Source Selection</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>SLOW_CLK</name> |
| <description>Slow Clock is selected</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MAIN_CLK</name> |
| <description>Main Clock is selected</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PLLA_CLK</name> |
| <description>PLLA Clock is selected</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MCK</name> |
| <description>Master Clock is selected</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>PRES</name> |
| <description>Programmable Clock Prescaler</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>CLK_1</name> |
| <description>Selected clock</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_2</name> |
| <description>Selected clock divided by 2</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_4</name> |
| <description>Selected clock divided by 4</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_8</name> |
| <description>Selected clock divided by 8</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_16</name> |
| <description>Selected clock divided by 16</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_32</name> |
| <description>Selected clock divided by 32</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CLK_64</name> |
| <description>Selected clock divided by 64</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000060</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>MOSCXTS</name> |
| <description>Main Crystal Oscillator Status Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOCKA</name> |
| <description>PLLA Lock Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MCKRDY</name> |
| <description>Master Clock Ready Interrupt Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCKRDY0</name> |
| <description>Programmable Clock Ready 0 Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCKRDY1</name> |
| <description>Programmable Clock Ready 1 Interrupt Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCKRDY2</name> |
| <description>Programmable Clock Ready 2 Interrupt Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MOSCSELS</name> |
| <description>Main Oscillator Selection Status Interrupt Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MOSCRCS</name> |
| <description>Main On-Chip RC Status Interrupt Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CFDEV</name> |
| <description>Clock Failure Detector Event Interrupt Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000064</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>MOSCXTS</name> |
| <description>Main Crystal Oscillator Status Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>LOCKA</name> |
| <description>PLLA Lock Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MCKRDY</name> |
| <description>Master Clock Ready Interrupt Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCKRDY0</name> |
| <description>Programmable Clock Ready 0 Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCKRDY1</name> |
| <description>Programmable Clock Ready 1 Interrupt Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PCKRDY2</name> |
| <description>Programmable Clock Ready 2 Interrupt Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MOSCSELS</name> |
| <description>Main Oscillator Selection Status Interrupt Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>MOSCRCS</name> |
| <description>Main On-Chip RC Status Interrupt Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CFDEV</name> |
| <description>Clock Failure Detector Event Interrupt Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000068</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00010008</resetValue> |
| <fields> |
| <field> |
| <name>MOSCXTS</name> |
| <description>Main XTAL Oscillator Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOCKA</name> |
| <description>PLLA Lock Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MCKRDY</name> |
| <description>Master Clock Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OSCSELS</name> |
| <description>Slow Clock Oscillator Selection</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCKRDY0</name> |
| <description>Programmable Clock Ready Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCKRDY1</name> |
| <description>Programmable Clock Ready Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCKRDY2</name> |
| <description>Programmable Clock Ready Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MOSCSELS</name> |
| <description>Main Oscillator Selection Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MOSCRCS</name> |
| <description>Main On-Chip RC Oscillator Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CFDEV</name> |
| <description>Clock Failure Detector Event</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CFDS</name> |
| <description>Clock Failure Detector Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FOS</name> |
| <description>Clock Failure Detector Fault Output Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x0000006C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>MOSCXTS</name> |
| <description>Main Crystal Oscillator Status Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>LOCKA</name> |
| <description>PLLA Lock Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MCKRDY</name> |
| <description>Master Clock Ready Interrupt Mask</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCKRDY0</name> |
| <description>Programmable Clock Ready 0 Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCKRDY1</name> |
| <description>Programmable Clock Ready 1 Interrupt Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PCKRDY2</name> |
| <description>Programmable Clock Ready 2 Interrupt Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MOSCSELS</name> |
| <description>Main Oscillator Selection Status Interrupt Mask</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>MOSCRCS</name> |
| <description>Main On-Chip RC Status Interrupt Mask</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CFDEV</name> |
| <description>Clock Failure Detector Event Interrupt Mask</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_FSMR</name> |
| <description>Fast Startup Mode Register</description> |
| <addressOffset>0x00000070</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>FSTT0</name> |
| <description>Fast Startup Input Enable 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT1</name> |
| <description>Fast Startup Input Enable 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT2</name> |
| <description>Fast Startup Input Enable 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT3</name> |
| <description>Fast Startup Input Enable 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT4</name> |
| <description>Fast Startup Input Enable 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT5</name> |
| <description>Fast Startup Input Enable 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT6</name> |
| <description>Fast Startup Input Enable 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT7</name> |
| <description>Fast Startup Input Enable 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT8</name> |
| <description>Fast Startup Input Enable 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT9</name> |
| <description>Fast Startup Input Enable 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT10</name> |
| <description>Fast Startup Input Enable 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT11</name> |
| <description>Fast Startup Input Enable 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT12</name> |
| <description>Fast Startup Input Enable 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT13</name> |
| <description>Fast Startup Input Enable 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT14</name> |
| <description>Fast Startup Input Enable 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTT15</name> |
| <description>Fast Startup Input Enable 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>RTTAL</name> |
| <description>RTT Alarm Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>RTCAL</name> |
| <description>RTC Alarm Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>LPM</name> |
| <description>Low Power Mode</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_FSPR</name> |
| <description>Fast Startup Polarity Register</description> |
| <addressOffset>0x00000074</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>FSTP0</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP1</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP2</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP3</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP4</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP5</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP6</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP7</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP8</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP9</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP10</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP11</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP12</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP13</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP14</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FSTP15</name> |
| <description>Fast Startup Input Polarityx</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_FOCR</name> |
| <description>Fault Output Clear Register</description> |
| <addressOffset>0x00000078</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>FOCLR</name> |
| <description>Fault Output Clear</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PMC_WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protect Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protect Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>UART0</name> |
| <version>6418E</version> |
| <description>Universal Asynchronous Receiver Transmitter 0</description> |
| <groupName>UART</groupName> |
| <prependToName>UART0_</prependToName> |
| <baseAddress>0x400E0600</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x128</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_UART0</name> |
| <value>8</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RSTRX</name> |
| <description>Reset Receiver</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTTX</name> |
| <description>Reset Transmitter</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXEN</name> |
| <description>Receiver Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXDIS</name> |
| <description>Receiver Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEN</name> |
| <description>Transmitter Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXDIS</name> |
| <description>Transmitter Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTSTA</name> |
| <description>Reset Status Bits</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>PAR</name> |
| <description>Parity Type</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>EVEN</name> |
| <description>Even parity</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ODD</name> |
| <description>Odd parity</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SPACE</name> |
| <description>Space: parity forced to 0</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MARK</name> |
| <description>Mark: parity forced to 1</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>No parity</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CHMODE</name> |
| <description>Channel Mode</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NORMAL</name> |
| <description>Normal Mode</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AUTOMATIC</name> |
| <description>Automatic Echo</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOCAL_LOOPBACK</name> |
| <description>Local Loopback</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>REMOTE_LOOPBACK</name> |
| <description>Remote Loopback</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Enable RXRDY Interrupt</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Enable TXRDY Interrupt</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>Enable End of Receive Transfer Interrupt</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>Enable End of Transmit Interrupt</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Enable Overrun Error Interrupt</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Enable Framing Error Interrupt</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Enable Parity Error Interrupt</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Enable TXEMPTY Interrupt</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Enable Buffer Empty Interrupt</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Enable Buffer Full Interrupt</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Disable RXRDY Interrupt</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Disable TXRDY Interrupt</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>Disable End of Receive Transfer Interrupt</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>Disable End of Transmit Interrupt</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Disable Overrun Error Interrupt</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Disable Framing Error Interrupt</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Disable Parity Error Interrupt</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Disable TXEMPTY Interrupt</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Disable Buffer Empty Interrupt</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Disable Buffer Full Interrupt</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Mask RXRDY Interrupt</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Disable TXRDY Interrupt</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>Mask End of Receive Transfer Interrupt</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>Mask End of Transmit Interrupt</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Mask Overrun Error Interrupt</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Mask Framing Error Interrupt</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Mask Parity Error Interrupt</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Mask TXEMPTY Interrupt</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Mask TXBUFE Interrupt</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Mask RXBUFF Interrupt</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Receiver Ready</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmitter Ready</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receiver Transfer</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmitter Transfer</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Framing Error</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Parity Error</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmitter Empty</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmission Buffer Empty</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RHR</name> |
| <description>Receive Holding Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCHR</name> |
| <description>Received Character</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>THR</name> |
| <description>Transmit Holding Register</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCHR</name> |
| <description>Character to be Transmitted</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>BRGR</name> |
| <description>Baud Rate Generator Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CD</name> |
| <description>Clock Divisor</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RPR</name> |
| <description>Receive Pointer Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXPTR</name> |
| <description>Receive Pointer Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RCR</name> |
| <description>Receive Counter Register</description> |
| <addressOffset>0x00000104</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCTR</name> |
| <description>Receive Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TPR</name> |
| <description>Transmit Pointer Register</description> |
| <addressOffset>0x00000108</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXPTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TCR</name> |
| <description>Transmit Counter Register</description> |
| <addressOffset>0x0000010C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXCTR</name> |
| <description>Transmit Counter Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNPR</name> |
| <description>Receive Next Pointer Register</description> |
| <addressOffset>0x00000110</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNPTR</name> |
| <description>Receive Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RNCR</name> |
| <description>Receive Next Counter Register</description> |
| <addressOffset>0x00000114</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXNCTR</name> |
| <description>Receive Next Counter</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNPR</name> |
| <description>Transmit Next Pointer Register</description> |
| <addressOffset>0x00000118</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNPTR</name> |
| <description>Transmit Next Pointer</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TNCR</name> |
| <description>Transmit Next Counter Register</description> |
| <addressOffset>0x0000011C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>TXNCTR</name> |
| <description>Transmit Counter Next</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTCR</name> |
| <description>Transfer Control Register</description> |
| <addressOffset>0x00000120</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXTDIS</name> |
| <description>Receiver Transfer Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXTDIS</name> |
| <description>Transmitter Transfer Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PTSR</name> |
| <description>Transfer Status Register</description> |
| <addressOffset>0x00000124</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXTEN</name> |
| <description>Receiver Transfer Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXTEN</name> |
| <description>Transmitter Transfer Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>CHIPID</name> |
| <version>6417K</version> |
| <description>Chip Identifier</description> |
| <prependToName>CHIPID_</prependToName> |
| <baseAddress>0x400E0740</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <name>CIDR</name> |
| <description>Chip ID Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>VERSION</name> |
| <description>Version of the Device</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>5</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>EPROC</name> |
| <description>Embedded Processor</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>ARM946ES</name> |
| <description>ARM946ES</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ARM7TDMI</name> |
| <description>ARM7TDMI</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CM3</name> |
| <description>Cortex-M3</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ARM920T</name> |
| <description>ARM920T</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ARM926EJS</name> |
| <description>ARM926EJS</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CA5</name> |
| <description>Cortex-A5</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CM4</name> |
| <description>Cortex-M4</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>NVPSIZ</name> |
| <description>Nonvolatile Program Memory Size</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>8K</name> |
| <description>8K bytes</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>16K</name> |
| <description>16K bytes</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>32K</name> |
| <description>32K bytes</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>64K</name> |
| <description>64K bytes</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>128K</name> |
| <description>128K bytes</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>256K</name> |
| <description>256K bytes</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>512K</name> |
| <description>512K bytes</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>1024K</name> |
| <description>1024K bytes</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2048K</name> |
| <description>2048K bytes</description> |
| <value>0xE</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>NVPSIZ2</name> |
| <description>Second Nonvolatile Program Memory Size</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NONE</name> |
| <description>None</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>8K</name> |
| <description>8K bytes</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>16K</name> |
| <description>16K bytes</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>32K</name> |
| <description>32K bytes</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>64K</name> |
| <description>64K bytes</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>128K</name> |
| <description>128K bytes</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>256K</name> |
| <description>256K bytes</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>512K</name> |
| <description>512K bytes</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>1024K</name> |
| <description>1024K bytes</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2048K</name> |
| <description>2048K bytes</description> |
| <value>0xE</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SRAMSIZ</name> |
| <description>Internal SRAM Size</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>48K</name> |
| <description>48K bytes</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>1K</name> |
| <description>1K bytes</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2K</name> |
| <description>2K bytes</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>6K</name> |
| <description>6K bytes</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>24K</name> |
| <description>24K bytes</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>4K</name> |
| <description>4K bytes</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>80K</name> |
| <description>80K bytes</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>160K</name> |
| <description>160K bytes</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>8K</name> |
| <description>8K bytes</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>16K</name> |
| <description>16K bytes</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>32K</name> |
| <description>32K bytes</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>64K</name> |
| <description>64K bytes</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>128K</name> |
| <description>128K bytes</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>256K</name> |
| <description>256K bytes</description> |
| <value>0xD</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>96K</name> |
| <description>96K bytes</description> |
| <value>0xE</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>512K</name> |
| <description>512K bytes</description> |
| <value>0xF</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ARCH</name> |
| <description>Architecture Identifier</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>AT91SAM9xx</name> |
| <description>AT91SAM9xx Series</description> |
| <value>0x19</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM9XExx</name> |
| <description>AT91SAM9XExx Series</description> |
| <value>0x29</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91x34</name> |
| <description>AT91x34 Series</description> |
| <value>0x34</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CAP7</name> |
| <description>CAP7 Series</description> |
| <value>0x37</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CAP9</name> |
| <description>CAP9 Series</description> |
| <value>0x39</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CAP11</name> |
| <description>CAP11 Series</description> |
| <value>0x3B</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91x40</name> |
| <description>AT91x40 Series</description> |
| <value>0x40</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91x42</name> |
| <description>AT91x42 Series</description> |
| <value>0x42</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91x55</name> |
| <description>AT91x55 Series</description> |
| <value>0x55</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7Axx</name> |
| <description>AT91SAM7Axx Series</description> |
| <value>0x60</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7AQxx</name> |
| <description>AT91SAM7AQxx Series</description> |
| <value>0x61</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91x63</name> |
| <description>AT91x63 Series</description> |
| <value>0x63</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7Sxx</name> |
| <description>AT91SAM7Sxx Series</description> |
| <value>0x70</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7XCxx</name> |
| <description>AT91SAM7XCxx Series</description> |
| <value>0x71</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7SExx</name> |
| <description>AT91SAM7SExx Series</description> |
| <value>0x72</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7Lxx</name> |
| <description>AT91SAM7Lxx Series</description> |
| <value>0x73</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7Xxx</name> |
| <description>AT91SAM7Xxx Series</description> |
| <value>0x75</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91SAM7SLxx</name> |
| <description>AT91SAM7SLxx Series</description> |
| <value>0x76</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3UxC</name> |
| <description>SAM3UxC Series (100-pin version)</description> |
| <value>0x80</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3UxE</name> |
| <description>SAM3UxE Series (144-pin version)</description> |
| <value>0x81</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3AxC</name> |
| <description>SAM3AxC Series (100-pin version)</description> |
| <value>0x83</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4AxC</name> |
| <description>SAM4AxC Series (100-pin version)</description> |
| <value>0x83</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3XxC</name> |
| <description>SAM3XxC Series (100-pin version)</description> |
| <value>0x84</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4XxC</name> |
| <description>SAM4XxC Series (100-pin version)</description> |
| <value>0x84</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3XxE</name> |
| <description>SAM3XxE Series (144-pin version)</description> |
| <value>0x85</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4XxE</name> |
| <description>SAM4XxE Series (144-pin version)</description> |
| <value>0x85</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3XxG</name> |
| <description>SAM3XxG Series (208/217-pin version)</description> |
| <value>0x86</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4XxG</name> |
| <description>SAM4XxG Series (208/217-pin version)</description> |
| <value>0x86</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3SxA</name> |
| <description>SAM3SxASeries (48-pin version)</description> |
| <value>0x88</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4SxA</name> |
| <description>SAM4SxA Series (48-pin version)</description> |
| <value>0x88</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3SxB</name> |
| <description>SAM3SxB Series (64-pin version)</description> |
| <value>0x89</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4SxB</name> |
| <description>SAM4SxB Series (64-pin version)</description> |
| <value>0x89</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3SxC</name> |
| <description>SAM3SxC Series (100-pin version)</description> |
| <value>0x8A</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM4SxC</name> |
| <description>SAM4SxC Series (100-pin version)</description> |
| <value>0x8A</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT91x92</name> |
| <description>AT91x92 Series</description> |
| <value>0x92</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3NxA</name> |
| <description>SAM3NxA Series (48-pin version)</description> |
| <value>0x93</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3NxB</name> |
| <description>SAM3NxB Series (64-pin version)</description> |
| <value>0x94</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3NxC</name> |
| <description>SAM3NxC Series (100-pin version)</description> |
| <value>0x95</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3SDxB</name> |
| <description>SAM3SDxB Series (64-pin version)</description> |
| <value>0x99</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM3SDxC</name> |
| <description>SAM3SDxC Series (100-pin version)</description> |
| <value>0x9A</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SAM5A</name> |
| <description>SAM5A</description> |
| <value>0xA5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AT75Cxx</name> |
| <description>AT75Cxx Series</description> |
| <value>0xF0</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>NVPTYP</name> |
| <description>Nonvolatile Program Memory Type</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>ROM</name> |
| <description>ROM</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ROMLESS</name> |
| <description>ROMless or on-chip Flash</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>FLASH</name> |
| <description>Embedded Flash Memory</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ROM_FLASH</name> |
| <description>ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SRAM</name> |
| <description>SRAM emulating ROM</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>EXT</name> |
| <description>Extension Flag</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>EXID</name> |
| <description>Chip ID Extension Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>EXID</name> |
| <description>Chip ID Extension</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>UART1</name> |
| <version>6418E</version> |
| <description>Universal Asynchronous Receiver Transmitter 1</description> |
| <groupName>UART</groupName> |
| <prependToName>UART1_</prependToName> |
| <baseAddress>0x400E0800</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x128</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_UART1</name> |
| <value>9</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RSTRX</name> |
| <description>Reset Receiver</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTTX</name> |
| <description>Reset Transmitter</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXEN</name> |
| <description>Receiver Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXDIS</name> |
| <description>Receiver Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEN</name> |
| <description>Transmitter Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXDIS</name> |
| <description>Transmitter Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RSTSTA</name> |
| <description>Reset Status Bits</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>PAR</name> |
| <description>Parity Type</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>EVEN</name> |
| <description>Even parity</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ODD</name> |
| <description>Odd parity</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>SPACE</name> |
| <description>Space: parity forced to 0</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MARK</name> |
| <description>Mark: parity forced to 1</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>No parity</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CHMODE</name> |
| <description>Channel Mode</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NORMAL</name> |
| <description>Normal Mode</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>AUTOMATIC</name> |
| <description>Automatic Echo</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOCAL_LOOPBACK</name> |
| <description>Local Loopback</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>REMOTE_LOOPBACK</name> |
| <description>Remote Loopback</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Enable RXRDY Interrupt</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Enable TXRDY Interrupt</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>Enable End of Receive Transfer Interrupt</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>Enable End of Transmit Interrupt</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Enable Overrun Error Interrupt</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Enable Framing Error Interrupt</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Enable Parity Error Interrupt</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Enable TXEMPTY Interrupt</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Enable Buffer Empty Interrupt</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Enable Buffer Full Interrupt</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Disable RXRDY Interrupt</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Disable TXRDY Interrupt</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>Disable End of Receive Transfer Interrupt</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>Disable End of Transmit Interrupt</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Disable Overrun Error Interrupt</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Disable Framing Error Interrupt</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Disable Parity Error Interrupt</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Disable TXEMPTY Interrupt</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Disable Buffer Empty Interrupt</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Disable Buffer Full Interrupt</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Mask RXRDY Interrupt</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Disable TXRDY Interrupt</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>Mask End of Receive Transfer Interrupt</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>Mask End of Transmit Interrupt</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Mask Overrun Error Interrupt</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Mask Framing Error Interrupt</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Mask Parity Error Interrupt</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Mask TXEMPTY Interrupt</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Mask TXBUFE Interrupt</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Mask RXBUFF Interrupt</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>RXRDY</name> |
| <description>Receiver Ready</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXRDY</name> |
| <description>Transmitter Ready</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDRX</name> |
| <description>End of Receiver Transfer</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ENDTX</name> |
| <description>End of Transmitter Transfer</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>OVRE</name> |
| <description>Overrun Error</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FRAME</name> |
| <description>Framing Error</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>PARE</name> |
| <description>Parity Error</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXEMPTY</name> |
| <description>Transmitter Empty</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TXBUFE</name> |
| <description>Transmission Buffer Empty</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RXBUFF</name> |
| <description>Receive Buffer Full</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>RHR</name> |
| <description>Receive Holding Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>RXCHR</name> |
| <description>Received Character</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>THR</name> |
| <description>Transmit Holding Register</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>TXCHR</name> |
| <description>Character to be Transmitted</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>BRGR</name> |
| <description>Baud Rate Generator Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CD</name> |
| <description>Clock Divisor</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>EFC</name> |
| <version>6450E</version> |
| <description>Embedded Flash Controller</description> |
| <prependToName>EFC_</prependToName> |
| <baseAddress>0x400E0A00</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_EFC</name> |
| <value>6</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>FMR</name> |
| <description>EEFC Flash Mode Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>FRDY</name> |
| <description>Ready Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FWS</name> |
| <description>Flash Wait State</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCOD</name> |
| <description>Sequential Code Optimization Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>FAM</name> |
| <description>Flash Access Mode</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FCR</name> |
| <description>EEFC Flash Command Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>FCMD</name> |
| <description>Flash Command</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FARG</name> |
| <description>Flash Command Argument</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>FKEY</name> |
| <description>Flash Writing Protection Key</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FSR</name> |
| <description>EEFC Flash Status Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000001</resetValue> |
| <fields> |
| <field> |
| <name>FRDY</name> |
| <description>Flash Ready Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FCMDE</name> |
| <description>Flash Command Error Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>FLOCKE</name> |
| <description>Flash Lock Error Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FRR</name> |
| <description>EEFC Flash Result Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>FVALUE</name> |
| <description>Flash Result Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>PIOA</name> |
| <version>11004F</version> |
| <description>Parallel Input/Output Controller A</description> |
| <groupName>PIO</groupName> |
| <prependToName>PIOA_</prependToName> |
| <baseAddress>0x400E0E00</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_PIOA</name> |
| <value>11</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>PER</name> |
| <description>PIO Enable Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PDR</name> |
| <description>PIO Disable Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PSR</name> |
| <description>PIO Status Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OER</name> |
| <description>Output Enable Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ODR</name> |
| <description>Output Disable Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OSR</name> |
| <description>Output Status Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFER</name> |
| <description>Glitch Input Filter Enable Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFDR</name> |
| <description>Glitch Input Filter Disable Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSR</name> |
| <description>Glitch Input Filter Status Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Filer Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Filer Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Filer Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Filer Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Filer Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Filer Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Filer Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Filer Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Filer Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Filer Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Filer Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Filer Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Filer Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Filer Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Filer Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Filer Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Filer Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Filer Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Filer Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Filer Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Filer Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Filer Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Filer Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Filer Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Filer Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Filer Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Filer Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Filer Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Filer Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Filer Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Filer Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Filer Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SODR</name> |
| <description>Set Output Data Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Set Output Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Set Output Data</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Set Output Data</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Set Output Data</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Set Output Data</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Set Output Data</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Set Output Data</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Set Output Data</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Set Output Data</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Set Output Data</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Set Output Data</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Set Output Data</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Set Output Data</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Set Output Data</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Set Output Data</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Set Output Data</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Set Output Data</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Set Output Data</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Set Output Data</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Set Output Data</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Set Output Data</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Set Output Data</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Set Output Data</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Set Output Data</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Set Output Data</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Set Output Data</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Set Output Data</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Set Output Data</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Set Output Data</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Set Output Data</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Set Output Data</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Set Output Data</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CODR</name> |
| <description>Clear Output Data Register</description> |
| <addressOffset>0x00000034</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Clear Output Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Clear Output Data</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Clear Output Data</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Clear Output Data</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Clear Output Data</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Clear Output Data</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Clear Output Data</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Clear Output Data</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Clear Output Data</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Clear Output Data</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Clear Output Data</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Clear Output Data</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Clear Output Data</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Clear Output Data</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Clear Output Data</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Clear Output Data</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Clear Output Data</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Clear Output Data</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Clear Output Data</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Clear Output Data</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Clear Output Data</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Clear Output Data</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Clear Output Data</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Clear Output Data</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Clear Output Data</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Clear Output Data</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Clear Output Data</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Clear Output Data</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Clear Output Data</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Clear Output Data</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Clear Output Data</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Clear Output Data</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ODSR</name> |
| <description>Output Data Status Register</description> |
| <addressOffset>0x00000038</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Data Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Data Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Data Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Data Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Data Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Data Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Data Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Data Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Data Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Data Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Data Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Data Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Data Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Data Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Data Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Data Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Data Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Data Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Data Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Data Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Data Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Data Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Data Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Data Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Data Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Data Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Data Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Data Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Data Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Data Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Data Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Data Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PDSR</name> |
| <description>Pin Data Status Register</description> |
| <addressOffset>0x0000003C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Data Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Data Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Data Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Data Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Data Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Data Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Data Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Data Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Data Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Data Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Data Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Data Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Data Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Data Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Data Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Data Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Data Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Data Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Data Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Data Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Data Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Data Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Data Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Data Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Data Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Data Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Data Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Data Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Data Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Data Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Data Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Data Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000044</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000048</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ISR</name> |
| <description>Interrupt Status Register</description> |
| <addressOffset>0x0000004C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MDER</name> |
| <description>Multi-driver Enable Register</description> |
| <addressOffset>0x00000050</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MDDR</name> |
| <description>Multi-driver Disable Register</description> |
| <addressOffset>0x00000054</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MDSR</name> |
| <description>Multi-driver Status Register</description> |
| <addressOffset>0x00000058</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PUDR</name> |
| <description>Pull-up Disable Register</description> |
| <addressOffset>0x00000060</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PUER</name> |
| <description>Pull-up Enable Register</description> |
| <addressOffset>0x00000064</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PUSR</name> |
| <description>Pad Pull-up Status Register</description> |
| <addressOffset>0x00000068</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <dim>2</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-1</dimIndex> |
| <name>ABCDSR%s</name> |
| <description>Peripheral Select Register</description> |
| <addressOffset>0x00000070</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSCDR</name> |
| <description>Input Filter Slow Clock Disable Register</description> |
| <addressOffset>0x00000080</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSCER</name> |
| <description>Input Filter Slow Clock Enable Register</description> |
| <addressOffset>0x00000084</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSCSR</name> |
| <description>Input Filter Slow Clock Status Register</description> |
| <addressOffset>0x00000088</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SCDR</name> |
| <description>Slow Clock Divider Debouncing Register</description> |
| <addressOffset>0x0000008C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>DIV</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>14</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PPDDR</name> |
| <description>Pad Pull-down Disable Register</description> |
| <addressOffset>0x00000090</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PPDER</name> |
| <description>Pad Pull-down Enable Register</description> |
| <addressOffset>0x00000094</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PPDSR</name> |
| <description>Pad Pull-down Status Register</description> |
| <addressOffset>0x00000098</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OWER</name> |
| <description>Output Write Enable</description> |
| <addressOffset>0x000000A0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OWDR</name> |
| <description>Output Write Disable</description> |
| <addressOffset>0x000000A4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OWSR</name> |
| <description>Output Write Status Register</description> |
| <addressOffset>0x000000A8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Write Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Write Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Write Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Write Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Write Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Write Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Write Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Write Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Write Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Write Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Write Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Write Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Write Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Write Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Write Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Write Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Write Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Write Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Write Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Write Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Write Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Write Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Write Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Write Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Write Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Write Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Write Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Write Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Write Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Write Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Write Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Write Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AIMER</name> |
| <description>Additional Interrupt Modes Enable Register</description> |
| <addressOffset>0x000000B0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AIMDR</name> |
| <description>Additional Interrupt Modes Disables Register</description> |
| <addressOffset>0x000000B4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AIMMR</name> |
| <description>Additional Interrupt Modes Mask Register</description> |
| <addressOffset>0x000000B8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ESR</name> |
| <description>Edge Select Register</description> |
| <addressOffset>0x000000C0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>LSR</name> |
| <description>Level Select Register</description> |
| <addressOffset>0x000000C4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ELSR</name> |
| <description>Edge/Level Status Register</description> |
| <addressOffset>0x000000C8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FELLSR</name> |
| <description>Falling Edge/Low Level Select Register</description> |
| <addressOffset>0x000000D0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>REHLSR</name> |
| <description>Rising Edge/ High Level Select Register</description> |
| <addressOffset>0x000000D4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FRLHSR</name> |
| <description>Fall/Rise - Low/High Status Register</description> |
| <addressOffset>0x000000D8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>LOCKSR</name> |
| <description>Lock Status</description> |
| <addressOffset>0x000000E0</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Lock Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Lock Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Lock Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Lock Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Lock Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Lock Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Lock Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Lock Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Lock Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Lock Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Lock Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Lock Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Lock Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Lock Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Lock Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Lock Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Lock Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Lock Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Lock Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Lock Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Lock Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Lock Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Lock Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Lock Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Lock Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Lock Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Lock Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Lock Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Lock Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Lock Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Lock Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Lock Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protect Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protect Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SCHMITT</name> |
| <description>Schmitt Trigger Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SCHMITT0</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT1</name> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT2</name> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT3</name> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT4</name> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT5</name> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT6</name> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT7</name> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT8</name> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT9</name> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT10</name> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT11</name> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT12</name> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT13</name> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT14</name> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT15</name> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT16</name> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT17</name> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT18</name> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT19</name> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT20</name> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT21</name> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT22</name> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT23</name> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT24</name> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT25</name> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT26</name> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT27</name> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT28</name> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT29</name> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT30</name> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT31</name> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>PIOB</name> |
| <version>11004F</version> |
| <description>Parallel Input/Output Controller B</description> |
| <groupName>PIO</groupName> |
| <prependToName>PIOB_</prependToName> |
| <baseAddress>0x400E1000</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <interrupt> |
| <name>ID_PIOB</name> |
| <value>12</value> |
| </interrupt> |
| <registers> |
| <register> |
| <name>PER</name> |
| <description>PIO Enable Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PDR</name> |
| <description>PIO Disable Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PSR</name> |
| <description>PIO Status Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OER</name> |
| <description>Output Enable Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ODR</name> |
| <description>Output Disable Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OSR</name> |
| <description>Output Status Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFER</name> |
| <description>Glitch Input Filter Enable Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Filter Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFDR</name> |
| <description>Glitch Input Filter Disable Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Filter Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSR</name> |
| <description>Glitch Input Filter Status Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Filer Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Filer Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Filer Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Filer Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Filer Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Filer Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Filer Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Filer Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Filer Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Filer Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Filer Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Filer Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Filer Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Filer Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Filer Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Filer Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Filer Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Filer Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Filer Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Filer Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Filer Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Filer Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Filer Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Filer Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Filer Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Filer Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Filer Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Filer Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Filer Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Filer Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Filer Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Filer Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SODR</name> |
| <description>Set Output Data Register</description> |
| <addressOffset>0x00000030</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Set Output Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Set Output Data</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Set Output Data</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Set Output Data</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Set Output Data</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Set Output Data</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Set Output Data</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Set Output Data</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Set Output Data</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Set Output Data</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Set Output Data</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Set Output Data</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Set Output Data</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Set Output Data</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Set Output Data</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Set Output Data</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Set Output Data</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Set Output Data</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Set Output Data</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Set Output Data</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Set Output Data</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Set Output Data</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Set Output Data</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Set Output Data</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Set Output Data</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Set Output Data</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Set Output Data</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Set Output Data</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Set Output Data</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Set Output Data</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Set Output Data</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Set Output Data</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CODR</name> |
| <description>Clear Output Data Register</description> |
| <addressOffset>0x00000034</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Clear Output Data</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Clear Output Data</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Clear Output Data</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Clear Output Data</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Clear Output Data</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Clear Output Data</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Clear Output Data</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Clear Output Data</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Clear Output Data</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Clear Output Data</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Clear Output Data</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Clear Output Data</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Clear Output Data</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Clear Output Data</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Clear Output Data</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Clear Output Data</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Clear Output Data</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Clear Output Data</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Clear Output Data</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Clear Output Data</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Clear Output Data</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Clear Output Data</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Clear Output Data</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Clear Output Data</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Clear Output Data</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Clear Output Data</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Clear Output Data</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Clear Output Data</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Clear Output Data</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Clear Output Data</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Clear Output Data</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Clear Output Data</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ODSR</name> |
| <description>Output Data Status Register</description> |
| <addressOffset>0x00000038</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Data Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Data Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Data Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Data Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Data Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Data Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Data Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Data Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Data Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Data Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Data Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Data Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Data Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Data Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Data Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Data Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Data Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Data Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Data Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Data Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Data Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Data Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Data Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Data Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Data Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Data Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Data Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Data Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Data Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Data Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Data Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Data Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PDSR</name> |
| <description>Pin Data Status Register</description> |
| <addressOffset>0x0000003C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Data Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Data Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Data Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Data Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Data Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Data Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Data Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Data Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Data Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Data Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Data Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Data Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Data Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Data Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Data Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Data Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Data Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Data Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Data Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Data Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Data Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Data Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Data Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Data Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Data Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Data Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Data Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Data Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Data Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Data Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Data Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Data Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000040</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000044</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Disable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000048</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Mask</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ISR</name> |
| <description>Interrupt Status Register</description> |
| <addressOffset>0x0000004C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Input Change Interrupt Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MDER</name> |
| <description>Multi-driver Enable Register</description> |
| <addressOffset>0x00000050</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Multi Drive Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MDDR</name> |
| <description>Multi-driver Disable Register</description> |
| <addressOffset>0x00000054</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Multi Drive Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MDSR</name> |
| <description>Multi-driver Status Register</description> |
| <addressOffset>0x00000058</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Multi Drive Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PUDR</name> |
| <description>Pull-up Disable Register</description> |
| <addressOffset>0x00000060</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Up Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PUER</name> |
| <description>Pull-up Enable Register</description> |
| <addressOffset>0x00000064</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Up Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PUSR</name> |
| <description>Pad Pull-up Status Register</description> |
| <addressOffset>0x00000068</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Up Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <dim>2</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-1</dimIndex> |
| <name>ABCDSR%s</name> |
| <description>Peripheral Select Register</description> |
| <addressOffset>0x00000070</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Peripheral Select.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSCDR</name> |
| <description>Input Filter Slow Clock Disable Register</description> |
| <addressOffset>0x00000080</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>PIO Clock Glitch Filtering Select.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSCER</name> |
| <description>Input Filter Slow Clock Enable Register</description> |
| <addressOffset>0x00000084</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Debouncing Filtering Select.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IFSCSR</name> |
| <description>Input Filter Slow Clock Status Register</description> |
| <addressOffset>0x00000088</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Glitch or Debouncing Filter Selection Status</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SCDR</name> |
| <description>Slow Clock Divider Debouncing Register</description> |
| <addressOffset>0x0000008C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>DIV</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>14</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PPDDR</name> |
| <description>Pad Pull-down Disable Register</description> |
| <addressOffset>0x00000090</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Down Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PPDER</name> |
| <description>Pad Pull-down Enable Register</description> |
| <addressOffset>0x00000094</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Down Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>PPDSR</name> |
| <description>Pad Pull-down Status Register</description> |
| <addressOffset>0x00000098</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Pull Down Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OWER</name> |
| <description>Output Write Enable</description> |
| <addressOffset>0x000000A0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Write Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OWDR</name> |
| <description>Output Write Disable</description> |
| <addressOffset>0x000000A4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Write Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>OWSR</name> |
| <description>Output Write Status Register</description> |
| <addressOffset>0x000000A8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Output Write Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Output Write Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Output Write Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Output Write Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Output Write Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Output Write Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Output Write Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Output Write Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Output Write Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Output Write Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Output Write Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Output Write Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Output Write Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Output Write Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Output Write Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Output Write Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Output Write Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Output Write Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Output Write Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Output Write Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Output Write Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Output Write Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Output Write Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Output Write Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Output Write Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Output Write Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Output Write Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Output Write Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Output Write Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Output Write Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Output Write Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Output Write Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AIMER</name> |
| <description>Additional Interrupt Modes Enable Register</description> |
| <addressOffset>0x000000B0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Additional Interrupt Modes Enable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AIMDR</name> |
| <description>Additional Interrupt Modes Disables Register</description> |
| <addressOffset>0x000000B4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Additional Interrupt Modes Disable.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AIMMR</name> |
| <description>Additional Interrupt Modes Mask Register</description> |
| <addressOffset>0x000000B8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Peripheral CD Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ESR</name> |
| <description>Edge Select Register</description> |
| <addressOffset>0x000000C0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Edge Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>LSR</name> |
| <description>Level Select Register</description> |
| <addressOffset>0x000000C4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Level Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>ELSR</name> |
| <description>Edge/Level Status Register</description> |
| <addressOffset>0x000000C8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Edge/Level Interrupt source selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FELLSR</name> |
| <description>Falling Edge/Low Level Select Register</description> |
| <addressOffset>0x000000D0</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Falling Edge/Low Level Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>REHLSR</name> |
| <description>Rising Edge/ High Level Select Register</description> |
| <addressOffset>0x000000D4</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Rising Edge /High Level Interrupt Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>FRLHSR</name> |
| <description>Fall/Rise - Low/High Status Register</description> |
| <addressOffset>0x000000D8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Edge /Level Interrupt Source Selection.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>LOCKSR</name> |
| <description>Lock Status</description> |
| <addressOffset>0x000000E0</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>P0</name> |
| <description>Lock Status.</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P1</name> |
| <description>Lock Status.</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P2</name> |
| <description>Lock Status.</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P3</name> |
| <description>Lock Status.</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P4</name> |
| <description>Lock Status.</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P5</name> |
| <description>Lock Status.</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P6</name> |
| <description>Lock Status.</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P7</name> |
| <description>Lock Status.</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P8</name> |
| <description>Lock Status.</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P9</name> |
| <description>Lock Status.</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P10</name> |
| <description>Lock Status.</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P11</name> |
| <description>Lock Status.</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P12</name> |
| <description>Lock Status.</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P13</name> |
| <description>Lock Status.</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P14</name> |
| <description>Lock Status.</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P15</name> |
| <description>Lock Status.</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P16</name> |
| <description>Lock Status.</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P17</name> |
| <description>Lock Status.</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P18</name> |
| <description>Lock Status.</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P19</name> |
| <description>Lock Status.</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P20</name> |
| <description>Lock Status.</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P21</name> |
| <description>Lock Status.</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P22</name> |
| <description>Lock Status.</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P23</name> |
| <description>Lock Status.</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P24</name> |
| <description>Lock Status.</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P25</name> |
| <description>Lock Status.</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P26</name> |
| <description>Lock Status.</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P27</name> |
| <description>Lock Status.</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P28</name> |
| <description>Lock Status.</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P29</name> |
| <description>Lock Status.</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P30</name> |
| <description>Lock Status.</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>P31</name> |
| <description>Lock Status.</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <description>Write Protect KEY</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPSR</name> |
| <description>Write Protect Status Register</description> |
| <addressOffset>0x000000E8</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPVS</name> |
| <description>Write Protect Violation Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WPVSRC</name> |
| <description>Write Protect Violation Source</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SCHMITT</name> |
| <description>Schmitt Trigger Register</description> |
| <addressOffset>0x00000100</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SCHMITT0</name> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT1</name> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT2</name> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT3</name> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT4</name> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT5</name> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT6</name> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT7</name> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT8</name> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT9</name> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT10</name> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT11</name> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT12</name> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT13</name> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT14</name> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT15</name> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT16</name> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT17</name> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT18</name> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT19</name> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT20</name> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT21</name> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT22</name> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT23</name> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT24</name> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT25</name> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT26</name> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT27</name> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT28</name> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT29</name> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT30</name> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SCHMITT31</name> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>RSTC</name> |
| <version>11009A</version> |
| <description>Reset Controller</description> |
| <groupName>SYSC</groupName> |
| <prependToName>RSTC_</prependToName> |
| <baseAddress>0x400E1400</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>PROCRST</name> |
| <description>Processor Reset</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>PERRST</name> |
| <description>Peripheral Reset</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>EXTRST</name> |
| <description>External Reset</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>KEY</name> |
| <description>Password</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>URSTS</name> |
| <description>User Reset Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RSTTYP</name> |
| <description>Reset Type</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NRSTL</name> |
| <description>NRST Pin Level</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SRCMP</name> |
| <description>Software Reset Command in Progress</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000001</resetValue> |
| <fields> |
| <field> |
| <name>URSTEN</name> |
| <description>User Reset Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>URSTIEN</name> |
| <description>User Reset Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ERSTL</name> |
| <description>External Reset Length</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>KEY</name> |
| <description>Password</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>SUPC</name> |
| <version>6452L</version> |
| <description>Supply Controller</description> |
| <groupName>SYSC</groupName> |
| <prependToName>SUPC_</prependToName> |
| <baseAddress>0x400E1410</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Supply Controller Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>VROFF</name> |
| <description>Voltage Regulator Off</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO_EFFECT</name> |
| <description>no effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>STOP_VREG</name> |
| <description>if KEY is correct, asserts vddcore_nreset and stops the voltage regulator.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>XTALSEL</name> |
| <description>Crystal Oscillator Select</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO_EFFECT</name> |
| <description>no effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CRYSTAL_SEL</name> |
| <description>if KEY is correct, switches the slow clock on the crystal oscillator output.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>KEY</name> |
| <description>Password</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SMMR</name> |
| <description>Supply Controller Supply Monitor Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SMTH</name> |
| <description>Supply Monitor Threshold</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>4</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>1_9V</name> |
| <description>1.9 V</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_0V</name> |
| <description>2.0 V</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_1V</name> |
| <description>2.1 V</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_2V</name> |
| <description>2.2 V</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_3V</name> |
| <description>2.3 V</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_4V</name> |
| <description>2.4 V</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_5V</name> |
| <description>2.5 V</description> |
| <value>0x6</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_6V</name> |
| <description>2.6 V</description> |
| <value>0x7</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_7V</name> |
| <description>2.7 V</description> |
| <value>0x8</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_8V</name> |
| <description>2.8 V</description> |
| <value>0x9</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2_9V</name> |
| <description>2.9 V</description> |
| <value>0xA</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_0V</name> |
| <description>3.0 V</description> |
| <value>0xB</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_1V</name> |
| <description>3.1 V</description> |
| <value>0xC</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_2V</name> |
| <description>3.2 V</description> |
| <value>0xD</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_3V</name> |
| <description>3.3 V</description> |
| <value>0xE</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_4V</name> |
| <description>3.4 V</description> |
| <value>0xF</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMSMPL</name> |
| <description>Supply Monitor Sampling Period</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>SMD</name> |
| <description>Supply Monitor disabled</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CSM</name> |
| <description>Continuous Supply Monitor</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>32SLCK</name> |
| <description>Supply Monitor enabled one SLCK period every 32 SLCK periods</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>256SLCK</name> |
| <description>Supply Monitor enabled one SLCK period every 256 SLCK periods</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>2048SLCK</name> |
| <description>Supply Monitor enabled one SLCK period every 2,048 SLCK periods</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMRSTEN</name> |
| <description>Supply Monitor Reset Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMIEN</name> |
| <description>Supply Monitor Interrupt Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the SUPC interrupt signal is not affected when a supply monitor detection occurs.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the SUPC interrupt signal is asserted when a supply monitor detection occurs.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Supply Controller Mode Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00005A00</resetValue> |
| <fields> |
| <field> |
| <name>BODRSTEN</name> |
| <description>Brownout Detector Reset Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the core reset signal, vddcore_nreset is asserted when a brownout detection occurs.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BODDIS</name> |
| <description>Brownout Detector Disable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the core brownout detector is enabled.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>DISABLE</name> |
| <description>the core brownout detector is disabled.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>ONREG</name> |
| <description>Voltage Regulator enable</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>ONREG_UNUSED</name> |
| <description>Voltage Regulator is not used</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ONREG_USED</name> |
| <description>Voltage Regulator is used</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>OSCBYPASS</name> |
| <description>Oscillator Bypass</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO_EFFECT</name> |
| <description>no effect. Clock selection depends on XTALSEL value.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>BYPASS</name> |
| <description>the 32-KHz XTAL oscillator is selected and is put in bypass mode.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>KEY</name> |
| <description>Password Key</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WUMR</name> |
| <description>Supply Controller Wake Up Mode Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SMEN</name> |
| <description>Supply Monitor Wake Up Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the supply monitor detection has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the supply monitor detection forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>RTTEN</name> |
| <description>Real Time Timer Wake Up Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the RTT alarm signal has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the RTT alarm signal forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>RTCEN</name> |
| <description>Real Time Clock Wake Up Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the RTC alarm signal has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the RTC alarm signal forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPDBC</name> |
| <description>Wake Up Inputs Debouncer Period</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>IMMEDIATE</name> |
| <description>Immediate, no debouncing, detected active at least on one Slow Clock edge.</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>3_SCLK</name> |
| <description>WKUPx shall be in its active state for at least 3 SLCK periods</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>32_SCLK</name> |
| <description>WKUPx shall be in its active state for at least 32 SLCK periods</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>512_SCLK</name> |
| <description>WKUPx shall be in its active state for at least 512 SLCK periods</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>4096_SCLK</name> |
| <description>WKUPx shall be in its active state for at least 4,096 SLCK periods</description> |
| <value>0x4</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>32768_SCLK</name> |
| <description>WKUPx shall be in its active state for at least 32,768 SLCK periods</description> |
| <value>0x5</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WUIR</name> |
| <description>Supply Controller Wake Up Inputs Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WKUPEN0</name> |
| <description>Wake Up Input Enable 0</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN1</name> |
| <description>Wake Up Input Enable 1</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN2</name> |
| <description>Wake Up Input Enable 2</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN3</name> |
| <description>Wake Up Input Enable 3</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN4</name> |
| <description>Wake Up Input Enable 4</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN5</name> |
| <description>Wake Up Input Enable 5</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN6</name> |
| <description>Wake Up Input Enable 6</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN7</name> |
| <description>Wake Up Input Enable 7</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN8</name> |
| <description>Wake Up Input Enable 8</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN9</name> |
| <description>Wake Up Input Enable 9</description> |
| <bitOffset>9</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN10</name> |
| <description>Wake Up Input Enable 10</description> |
| <bitOffset>10</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN11</name> |
| <description>Wake Up Input Enable 11</description> |
| <bitOffset>11</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN12</name> |
| <description>Wake Up Input Enable 12</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN13</name> |
| <description>Wake Up Input Enable 13</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN14</name> |
| <description>Wake Up Input Enable 14</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPEN15</name> |
| <description>Wake Up Input Enable 15</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NOT_ENABLE</name> |
| <description>the corresponding wake-up input has no wake up effect.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>ENABLE</name> |
| <description>the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT0</name> |
| <description>Wake Up Input Transition 0</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT1</name> |
| <description>Wake Up Input Transition 1</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT2</name> |
| <description>Wake Up Input Transition 2</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT3</name> |
| <description>Wake Up Input Transition 3</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT4</name> |
| <description>Wake Up Input Transition 4</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT5</name> |
| <description>Wake Up Input Transition 5</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT6</name> |
| <description>Wake Up Input Transition 6</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT7</name> |
| <description>Wake Up Input Transition 7</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT8</name> |
| <description>Wake Up Input Transition 8</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT9</name> |
| <description>Wake Up Input Transition 9</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT10</name> |
| <description>Wake Up Input Transition 10</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT11</name> |
| <description>Wake Up Input Transition 11</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT12</name> |
| <description>Wake Up Input Transition 12</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT13</name> |
| <description>Wake Up Input Transition 13</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT14</name> |
| <description>Wake Up Input Transition 14</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPT15</name> |
| <description>Wake Up Input Transition 15</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH_TO_LOW</name> |
| <description>a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW_TO_HIGH</name> |
| <description>a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Supply Controller Status Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000800</resetValue> |
| <fields> |
| <field> |
| <name>WKUPS</name> |
| <description>WKUP Wake Up Status</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PRESENT</name> |
| <description>at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMWS</name> |
| <description>Supply Monitor Detection Wake Up Status</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PRESENT</name> |
| <description>at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>BODRSTS</name> |
| <description>Brownout Detector Reset Status</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>no core brownout rising edge event has been detected since the last read of the SUPC_SR.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PRESENT</name> |
| <description>at least one brownout output rising edge event has been detected since the last read of the SUPC_SR.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMRSTS</name> |
| <description>Supply Monitor Reset Status</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>no supply monitor detection has generated a core reset since the last read of the SUPC_SR.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PRESENT</name> |
| <description>at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMS</name> |
| <description>Supply Monitor Status</description> |
| <bitOffset>5</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>NO</name> |
| <description>no supply monitor detection since the last read of SUPC_SR.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>PRESENT</name> |
| <description>at least one supply monitor detection since the last read of SUPC_SR.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>SMOS</name> |
| <description>Supply Monitor Output Status</description> |
| <bitOffset>6</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>HIGH</name> |
| <description>the supply monitor detected VDDIO higher than its threshold at its last measurement.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>LOW</name> |
| <description>the supply monitor detected VDDIO lower than its threshold at its last measurement.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>OSCSEL</name> |
| <description>32-kHz Oscillator Selection Status</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>RC</name> |
| <description>the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>CRYST</name> |
| <description>the slow clock, SLCK is generated by the 32-kHz crystal oscillator.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS0</name> |
| <description>WKUP Input Status 0</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS1</name> |
| <description>WKUP Input Status 1</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS2</name> |
| <description>WKUP Input Status 2</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS3</name> |
| <description>WKUP Input Status 3</description> |
| <bitOffset>19</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS4</name> |
| <description>WKUP Input Status 4</description> |
| <bitOffset>20</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS5</name> |
| <description>WKUP Input Status 5</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS6</name> |
| <description>WKUP Input Status 6</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS7</name> |
| <description>WKUP Input Status 7</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS8</name> |
| <description>WKUP Input Status 8</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS9</name> |
| <description>WKUP Input Status 9</description> |
| <bitOffset>25</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS10</name> |
| <description>WKUP Input Status 10</description> |
| <bitOffset>26</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS11</name> |
| <description>WKUP Input Status 11</description> |
| <bitOffset>27</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS12</name> |
| <description>WKUP Input Status 12</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS13</name> |
| <description>WKUP Input Status 13</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS14</name> |
| <description>WKUP Input Status 14</description> |
| <bitOffset>30</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>WKUPIS15</name> |
| <description>WKUP Input Status 15</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>DIS</name> |
| <description>the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.</description> |
| <value>0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>EN</name> |
| <description>the corresponding wake-up input was active at the time the debouncer triggered a wake up event.</description> |
| <value>1</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>RTT</name> |
| <version>6081F</version> |
| <description>Real-time Timer</description> |
| <groupName>SYSC</groupName> |
| <prependToName>RTT_</prependToName> |
| <baseAddress>0x400E1430</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00008000</resetValue> |
| <fields> |
| <field> |
| <name>RTPRES</name> |
| <description>Real-time Timer Prescaler Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>16</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>ALMIEN</name> |
| <description>Alarm Interrupt Enable</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>RTTINCIEN</name> |
| <description>Real-time Timer Increment Interrupt Enable</description> |
| <bitOffset>17</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>RTTRST</name> |
| <description>Real-time Timer Restart</description> |
| <bitOffset>18</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>AR</name> |
| <description>Alarm Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0xFFFFFFFF</resetValue> |
| <fields> |
| <field> |
| <name>ALMV</name> |
| <description>Alarm Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>VR</name> |
| <description>Value Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>CRTV</name> |
| <description>Current Real-time Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>ALMS</name> |
| <description>Real-time Alarm Status</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>RTTINC</name> |
| <description>Real-time Timer Increment</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>WDT</name> |
| <version>6080B</version> |
| <description>Watchdog Timer</description> |
| <groupName>SYSC</groupName> |
| <prependToName>WDT_</prependToName> |
| <baseAddress>0x400E1450</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>WDRSTT</name> |
| <description>Watchdog Restart</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>KEY</name> |
| <description>Password</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x3FFF2FFF</resetValue> |
| <fields> |
| <field> |
| <name>WDV</name> |
| <description>Watchdog Counter Value</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>12</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDFIEN</name> |
| <description>Watchdog Fault Interrupt Enable</description> |
| <bitOffset>12</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDRSTEN</name> |
| <description>Watchdog Reset Enable</description> |
| <bitOffset>13</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDRPROC</name> |
| <description>Watchdog Reset Processor</description> |
| <bitOffset>14</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDDIS</name> |
| <description>Watchdog Disable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDD</name> |
| <description>Watchdog Delta Value</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>12</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDDBGHLT</name> |
| <description>Watchdog Debug Halt</description> |
| <bitOffset>28</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WDIDLEHLT</name> |
| <description>Watchdog Idle Halt</description> |
| <bitOffset>29</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WDUNF</name> |
| <description>Watchdog Underflow</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>WDERR</name> |
| <description>Watchdog Error</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>RTC</name> |
| <version>6056I</version> |
| <description>Real-time Clock</description> |
| <groupName>SYSC</groupName> |
| <prependToName>RTC_</prependToName> |
| <baseAddress>0x400E1460</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <name>CR</name> |
| <description>Control Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>UPDTIM</name> |
| <description>Update Request Time Register</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>UPDCAL</name> |
| <description>Update Request Calendar Register</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>TIMEVSEL</name> |
| <description>Time Event Selection</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>MINUTE</name> |
| <description>Minute change</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>HOUR</name> |
| <description>Hour change</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MIDNIGHT</name> |
| <description>Every day at midnight</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>NOON</name> |
| <description>Every day at noon</description> |
| <value>0x3</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| <field> |
| <name>CALEVSEL</name> |
| <description>Calendar Event Selection</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>2</bitWidth> |
| <access>read-write</access> |
| <enumeratedValues> |
| <enumeratedValue> |
| <name>WEEK</name> |
| <description>Week change (every Monday at time 00:00:00)</description> |
| <value>0x0</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>MONTH</name> |
| <description>Month change (every 01 of each month at time 00:00:00)</description> |
| <value>0x1</value> |
| </enumeratedValue> |
| <enumeratedValue> |
| <name>YEAR</name> |
| <description>Year change (every January 1 at time 00:00:00)</description> |
| <value>0x2</value> |
| </enumeratedValue> |
| </enumeratedValues> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>MR</name> |
| <description>Mode Register</description> |
| <addressOffset>0x00000004</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>HRMOD</name> |
| <description>12-/24-hour Mode</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TIMR</name> |
| <description>Time Register</description> |
| <addressOffset>0x00000008</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SEC</name> |
| <description>Current Second</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MIN</name> |
| <description>Current Minute</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>HOUR</name> |
| <description>Current Hour</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>6</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>AMPM</name> |
| <description>Ante Meridiem Post Meridiem Indicator</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CALR</name> |
| <description>Calendar Register</description> |
| <addressOffset>0x0000000C</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x01210720</resetValue> |
| <fields> |
| <field> |
| <name>CENT</name> |
| <description>Current Century</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>YEAR</name> |
| <description>Current Year</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>8</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MONTH</name> |
| <description>Current Month</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>5</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DAY</name> |
| <description>Current Day in Current Week</description> |
| <bitOffset>21</bitOffset> |
| <bitWidth>3</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DATE</name> |
| <description>Current Day in Current Month</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>6</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>TIMALR</name> |
| <description>Time Alarm Register</description> |
| <addressOffset>0x00000010</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>SEC</name> |
| <description>Second Alarm</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>SECEN</name> |
| <description>Second Alarm Enable</description> |
| <bitOffset>7</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MIN</name> |
| <description>Minute Alarm</description> |
| <bitOffset>8</bitOffset> |
| <bitWidth>7</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MINEN</name> |
| <description>Minute Alarm Enable</description> |
| <bitOffset>15</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>HOUR</name> |
| <description>Hour Alarm</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>6</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>AMPM</name> |
| <description>AM/PM Indicator</description> |
| <bitOffset>22</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>HOUREN</name> |
| <description>Hour Alarm Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>CALALR</name> |
| <description>Calendar Alarm Register</description> |
| <addressOffset>0x00000014</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x01010000</resetValue> |
| <fields> |
| <field> |
| <name>MONTH</name> |
| <description>Month Alarm</description> |
| <bitOffset>16</bitOffset> |
| <bitWidth>5</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>MTHEN</name> |
| <description>Month Alarm Enable</description> |
| <bitOffset>23</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DATE</name> |
| <description>Date Alarm</description> |
| <bitOffset>24</bitOffset> |
| <bitWidth>6</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>DATEEN</name> |
| <description>Date Alarm Enable</description> |
| <bitOffset>31</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SR</name> |
| <description>Status Register</description> |
| <addressOffset>0x00000018</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>ACKUPD</name> |
| <description>Acknowledge for Update</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ALARM</name> |
| <description>Alarm Flag</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SEC</name> |
| <description>Second Event</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TIMEV</name> |
| <description>Time Event</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CALEV</name> |
| <description>Calendar Event</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>SCCR</name> |
| <description>Status Clear Command Register</description> |
| <addressOffset>0x0000001C</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>ACKCLR</name> |
| <description>Acknowledge Clear</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ALRCLR</name> |
| <description>Alarm Clear</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SECCLR</name> |
| <description>Second Clear</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TIMCLR</name> |
| <description>Time Clear</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CALCLR</name> |
| <description>Calendar Clear</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IER</name> |
| <description>Interrupt Enable Register</description> |
| <addressOffset>0x00000020</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>ACKEN</name> |
| <description>Acknowledge Update Interrupt Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ALREN</name> |
| <description>Alarm Interrupt Enable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SECEN</name> |
| <description>Second Event Interrupt Enable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TIMEN</name> |
| <description>Time Event Interrupt Enable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CALEN</name> |
| <description>Calendar Event Interrupt Enable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IDR</name> |
| <description>Interrupt Disable Register</description> |
| <addressOffset>0x00000024</addressOffset> |
| <size>32</size> |
| <access>write-only</access> |
| <fields> |
| <field> |
| <name>ACKDIS</name> |
| <description>Acknowledge Update Interrupt Disable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>ALRDIS</name> |
| <description>Alarm Interrupt Disable</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>SECDIS</name> |
| <description>Second Event Interrupt Disable</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>TIMDIS</name> |
| <description>Time Event Interrupt Disable</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| <field> |
| <name>CALDIS</name> |
| <description>Calendar Event Interrupt Disable</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>write-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>IMR</name> |
| <description>Interrupt Mask Register</description> |
| <addressOffset>0x00000028</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>ACK</name> |
| <description>Acknowledge Update Interrupt Mask</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>ALR</name> |
| <description>Alarm Interrupt Mask</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>SEC</name> |
| <description>Second Event Interrupt Mask</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>TIM</name> |
| <description>Time Event Interrupt Mask</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>CAL</name> |
| <description>Calendar Event Interrupt Mask</description> |
| <bitOffset>4</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>VER</name> |
| <description>Valid Entry Register</description> |
| <addressOffset>0x0000002C</addressOffset> |
| <size>32</size> |
| <access>read-only</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>NVTIM</name> |
| <description>Non-valid Time</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NVCAL</name> |
| <description>Non-valid Calendar</description> |
| <bitOffset>1</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NVTIMALR</name> |
| <description>Non-valid Time Alarm</description> |
| <bitOffset>2</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| <field> |
| <name>NVCALALR</name> |
| <description>Non-valid Calendar Alarm</description> |
| <bitOffset>3</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-only</access> |
| </field> |
| </fields> |
| </register> |
| <register> |
| <name>WPMR</name> |
| <description>Write Protect Mode Register</description> |
| <addressOffset>0x000000E4</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <resetValue>0x00000000</resetValue> |
| <fields> |
| <field> |
| <name>WPEN</name> |
| <description>Write Protect Enable</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>1</bitWidth> |
| <access>read-write</access> |
| </field> |
| <field> |
| <name>WPKEY</name> |
| <bitOffset>8</bitOffset> |
| <bitWidth>24</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| <peripheral> |
| <name>GPBR</name> |
| <version>6378C</version> |
| <description>General Purpose Backup Register</description> |
| <groupName>SYSC</groupName> |
| <prependToName>GPBR_</prependToName> |
| <baseAddress>0x400E1490</baseAddress> |
| <addressBlock> |
| <offset>0</offset> |
| <size>0x200</size> |
| <usage>registers</usage> |
| </addressBlock> |
| <registers> |
| <register> |
| <dim>8</dim> |
| <dimIncrement>4</dimIncrement> |
| <dimIndex>0-7</dimIndex> |
| <name>GPBR%s</name> |
| <description>General Purpose Backup Register</description> |
| <addressOffset>0x00000000</addressOffset> |
| <size>32</size> |
| <access>read-write</access> |
| <fields> |
| <field> |
| <name>GPBR_VALUE</name> |
| <description>Value of GPBR x</description> |
| <bitOffset>0</bitOffset> |
| <bitWidth>32</bitWidth> |
| <access>read-write</access> |
| </field> |
| </fields> |
| </register> |
| </registers> |
| </peripheral> |
| </peripherals> |
| </device> |