diff --git a/platform/imx/platform.c b/platform/imx/platform.c
index 0370e04..285feb5 100644
--- a/platform/imx/platform.c
+++ b/platform/imx/platform.c
@@ -129,7 +129,7 @@
 	else
 		dprintf(CRITICAL, "TZASC inited.\n");
 #endif
-	generic_arm64_map_regs("caam", CAAM_ARB_BASE_ADDR, CAAM_PHY_ARB_BASE_ADDR, CAAM_REG_SIZE + CAAM_SEC_RAM_SIZE);
+	generic_arm64_map_regs("caam-ram", CAAM_ARB_BASE_ADDR, CAAM_PHY_ARB_BASE_ADDR, CAAM_SEC_RAM_SIZE);
 
 }
 
diff --git a/platform/imx/soc/imx6ul/include/imx-regs.h b/platform/imx/soc/imx6ul/include/imx-regs.h
index 50354f6..c4e9bef 100644
--- a/platform/imx/soc/imx6ul/include/imx-regs.h
+++ b/platform/imx/soc/imx6ul/include/imx-regs.h
@@ -38,14 +38,14 @@
 
 #define CAAM_PHY_BASE_ADDR 0x02140000
 #define CAAM_BASE_ADDR  (0x70000000 + CAAM_PHY_BASE_ADDR)
+#define CAAM_REG_SIZE 0x3C000
+
 #define CAAM_PHY_ARB_BASE_ADDR 0x00100000
 #define CAAM_ARB_BASE_ADDR (0x70000000 + 0x00100000)
-
-#define CAAM_REG_SIZE 0x3C000
+#define CAAM_SEC_RAM_SIZE 0x8000
 
 #define CCM_BASE_ADDR (0x02000000 + 0x80000 + 0x44000)
 #define CCM_BASE_ADDR_VIRT (0x70000000 + CCM_BASE_ADDR)
-#define CAAM_SEC_RAM_SIZE 0x8000
 
 /* Registers for GIC */
 #define MAX_INT 160
diff --git a/platform/imx/soc/imx7d/include/imx-regs.h b/platform/imx/soc/imx7d/include/imx-regs.h
index ea595e7..b79eb24 100644
--- a/platform/imx/soc/imx7d/include/imx-regs.h
+++ b/platform/imx/soc/imx7d/include/imx-regs.h
@@ -38,14 +38,14 @@
 
 #define CAAM_PHY_BASE_ADDR 0x30900000
 #define CAAM_BASE_ADDR  (0x40000000 + CAAM_PHY_BASE_ADDR)
+#define CAAM_REG_SIZE 0x40000
+
 #define CAAM_PHY_ARB_BASE_ADDR 0x00100000
 #define CAAM_ARB_BASE_ADDR (0x71000000 + 0x00100000)
-
-#define CAAM_REG_SIZE 0x40000
+#define CAAM_SEC_RAM_SIZE 0x8000
 
 #define CCM_BASE_ADDR 0x30380000
 #define CCM_BASE_ADDR_VIRT (0x40000000 + CCM_BASE_ADDR)
-#define CAAM_SEC_RAM_SIZE 0x8000
 
 /* Registers for GIC */
 #define MAX_INT 160
@@ -72,4 +72,5 @@
 #define SECURE_RAM_START_ADDR_PHY CAAM_PHY_ARB_BASE_ADDR
 #define SECURE_RAM_START_ADDR CAAM_ARB_BASE_ADDR
 #define SECURE_RAM_SIZE 0x4000
+
 #endif